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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 8978f860a64eecfa088c1088bc0c2002ec316362 / . / board / nvidia / dts / tegra20-seaboard.dts
blob: 9cb9b5bdb1b9c750647984641cd47032ad0cff83 [file] [log] [blame]
Simon Glass6710b5b2012-02-27 10:52:39 +0000[diff] [blame]1/dts-v1/;
2
3/memreserve/ 0x1c000000 0x04000000;
4/include/ ARCH_CPU_DTS
5
6/ {
7 model = "NVIDIA Seaboard";
8 compatible = "nvidia,seaboard", "nvidia,tegra20";
9
10 chosen {
11 bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
12 };
13
Simon Glass19201722012-02-27 10:52:46 +0000[diff] [blame]14 aliases {
15 /* This defines the order of our USB ports */
16 usb0 = "/usb@c5008000";
17 usb1 = "/usb@c5000000";
Simon Glass3682cc32012-02-29 07:31:27 +0000[diff] [blame]18
19 i2c0 = "/i2c@7000d000";
20 i2c1 = "/i2c@7000c000";
21 i2c2 = "/i2c@7000c400";
22 i2c3 = "/i2c@7000c500";
Simon Glass19201722012-02-27 10:52:46 +0000[diff] [blame]23 };
24
Simon Glass6710b5b2012-02-27 10:52:39 +0000[diff] [blame]25 memory {
26 device_type = "memory";
27 reg = < 0x00000000 0x40000000 >;
28 };
29
Simon Glasscd474cb2012-02-28 08:07:49 +0000[diff] [blame]30 /* This is not used in U-Boot, but is expected to be in kernel .dts */
31 i2c@7000d000 {
Simon Glass3682cc32012-02-29 07:31:27 +0000[diff] [blame]32 clock-frequency = <100000>;
Simon Glasscd474cb2012-02-28 08:07:49 +0000[diff] [blame]33 pmic@34 {
34 compatible = "ti,tps6586x";
35 reg = <0x34>;
36
37 clk_32k: clock {
38 compatible = "fixed-clock";
39 /*
40 * leave out for now due to CPP:
41 * #clock-cells = <0>;
42 */
43 clock-frequency = <32768>;
44 };
45 };
46 };
47
Simon Glass6710b5b2012-02-27 10:52:39 +0000[diff] [blame]48 serial@70006300 {
49 clock-frequency = < 216000000 >;
50 };
51
Allen Martinb7723f32013-01-16 13:12:24 +0000[diff] [blame]52 nand-controller@70008000 {
53 nvidia,wp-gpios = <&gpio 59 0>; /* PH3 */
54 nvidia,width = <8>;
55 nvidia,timing = <26 100 20 80 20 10 12 10 70>;
56 nand@0 {
57 reg = <0>;
58 compatible = "hynix,hy27uf4g2b", "nand-flash";
59 };
Simon Glass6710b5b2012-02-27 10:52:39 +0000[diff] [blame]60 };
Simon Glass3682cc32012-02-29 07:31:27 +0000[diff] [blame]61
62 i2c@7000c000 {
63 clock-frequency = <100000>;
64 };
65
66 i2c@7000c400 {
67 status = "disabled";
68 };
69
70 i2c@7000c500 {
71 clock-frequency = <100000>;
72 };
Simon Glassd376e8d2012-04-05 11:55:15 +0000[diff] [blame]73
Allen Martinb7723f32013-01-16 13:12:24 +0000[diff] [blame]74 kbc@7000e200 {
75 linux,keymap = <0x00020011 0x0003001f 0x0004001e 0x0005002c
76 0x000701d0 0x0107007d 0x02060064 0x02070038 0x03000006
77 0x03010005 0x03020013 0x03030012 0x03040021 0x03050020
78 0x0306002d 0x04000008 0x04010007 0x04020014 0x04030023
79 0x04040022 0x0405002f 0x0406002e 0x04070039 0x0500000a
80 0x05010009 0x05020016 0x05030015 0x05040024 0x05050031
81 0x05060030 0x0507002b 0x0600000c 0x0601000b 0x06020018
82 0x06030017 0x06040026 0x06050025 0x06060033 0x06070032
83 0x0701000d 0x0702001b 0x0703001c 0x0707008b 0x08040036
84 0x0805002a 0x09050061 0x0907001d 0x0b00001a 0x0b010019
85 0x0b020028 0x0b030027 0x0b040035 0x0b050034 0x0c000044
86 0x0c010043 0x0c02000e 0x0c030004 0x0c040003 0x0c050067
87 0x0c0600d2 0x0c070077 0x0d00006e 0x0d01006f 0x0d030068
88 0x0d04006d 0x0d05006a 0x0d06006c 0x0d070069 0x0e000057
89 0x0e010058 0x0e020042 0x0e030010 0x0e04003e 0x0e05003d
90 0x0e060002 0x0e070041 0x0f000001 0x0f010029 0x0f02003f
91 0x0f03000f 0x0f04003b 0x0f05003c 0x0f06003a 0x0f070040
92 0x14000047 0x15000049 0x15010048 0x1502004b 0x1504004f
93 0x16010062 0x1602004d 0x1603004c 0x16040051 0x16050050
94 0x16070052 0x1b010037 0x1b03004a 0x1b04004e 0x1b050053
95 0x1c050073 0x1d030066 0x1d04006b 0x1d0500e0 0x1d060072
96 0x1d0700e1 0x1e000045 0x1e010046 0x1e020071
97 0x1f04008a>;
98 linux,fn-keymap = <0x05040002>;
99 };
100
Simon Glassd376e8d2012-04-05 11:55:15 +0000[diff] [blame]101 emc@7000f400 {
102 emc-table@190000 {
103 reg = < 190000 >;
104 compatible = "nvidia,tegra20-emc-table";
105 clock-frequency = < 190000 >;
106 nvidia,emc-registers = < 0x0000000c 0x00000026
107 0x00000009 0x00000003 0x00000004 0x00000004
108 0x00000002 0x0000000c 0x00000003 0x00000003
109 0x00000002 0x00000001 0x00000004 0x00000005
110 0x00000004 0x00000009 0x0000000d 0x0000059f
111 0x00000000 0x00000003 0x00000003 0x00000003
112 0x00000003 0x00000001 0x0000000b 0x000000c8
113 0x00000003 0x00000007 0x00000004 0x0000000f
114 0x00000002 0x00000000 0x00000000 0x00000002
115 0x00000000 0x00000000 0x00000083 0xa06204ae
116 0x007dc010 0x00000000 0x00000000 0x00000000
117 0x00000000 0x00000000 0x00000000 0x00000000 >;
118 };
119 emc-table@380000 {
120 reg = < 380000 >;
121 compatible = "nvidia,tegra20-emc-table";
122 clock-frequency = < 380000 >;
123 nvidia,emc-registers = < 0x00000017 0x0000004b
124 0x00000012 0x00000006 0x00000004 0x00000005
125 0x00000003 0x0000000c 0x00000006 0x00000006
126 0x00000003 0x00000001 0x00000004 0x00000005
127 0x00000004 0x00000009 0x0000000d 0x00000b5f
128 0x00000000 0x00000003 0x00000003 0x00000006
129 0x00000006 0x00000001 0x00000011 0x000000c8
130 0x00000003 0x0000000e 0x00000007 0x0000000f
131 0x00000002 0x00000000 0x00000000 0x00000002
132 0x00000000 0x00000000 0x00000083 0xe044048b
133 0x007d8010 0x00000000 0x00000000 0x00000000
134 0x00000000 0x00000000 0x00000000 0x00000000 >;
135 };
136 };
Anton Staffc3ab91f2012-04-17 09:01:34 +0000[diff] [blame]137
Allen Martinb7723f32013-01-16 13:12:24 +0000[diff] [blame]138 usb@c5000000 {
139 nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
140 dr_mode = "otg";
Anton Staffc3ab91f2012-04-17 09:01:34 +0000[diff] [blame]141 };
Simon Glass7cedd1812012-07-29 20:53:28 +0000[diff] [blame]142
Allen Martinb7723f32013-01-16 13:12:24 +0000[diff] [blame]143 usb@c5004000 {
144 status = "disabled";
Simon Glass7cedd1812012-07-29 20:53:28 +0000[diff] [blame]145 };
Simon Glass77139f52012-10-17 13:24:58 +0000[diff] [blame]146
Allen Martinb7723f32013-01-16 13:12:24 +0000[diff] [blame]147 sdhci@c8000400 {
148 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
149 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
150 power-gpios = <&gpio 70 0>; /* gpio PI6 */
151 };
152
153 sdhci@c8000600 {
154 support-8bit;
Simon Glass77139f52012-10-17 13:24:58 +0000[diff] [blame]155 };
156
157 lcd_panel: panel {
158 /* Seaboard has 1366x768 */
159 clock = <70600000>;
160 xres = <1366>;
161 yres = <768>;
162 left-margin = <58>;
163 right-margin = <58>;
164 hsync-len = <58>;
165 lower-margin = <4>;
166 upper-margin = <4>;
167 vsync-len = <4>;
168 hsync-active-high;
169 nvidia,bits-per-pixel = <16>;
170 nvidia,pwm = <&pwm 2 0>;
171 nvidia,backlight-enable-gpios = <&gpio 28 0>; /* PD4 */
172 nvidia,lvds-shutdown-gpios = <&gpio 10 0>; /* PB2 */
173 nvidia,backlight-vdd-gpios = <&gpio 176 0>; /* PW0 */
174 nvidia,panel-vdd-gpios = <&gpio 22 0>; /* PC6 */
175 nvidia,panel-timings = <400 4 203 17 15>;
176 };
Simon Glass6710b5b2012-02-27 10:52:39 +0000[diff] [blame]177};