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wdenk5653fc32004-02-08 22:55:38 +00001/*
wdenkbf9e3b32004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk5653fc32004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
wdenk5653fc32004-02-08 22:55:38 +00007 *
wdenkbf9e3b32004-02-12 00:47:09 +00008 * Copyright (C) 2004
9 * Ed Okerson
Stefan Roese260421a2006-11-13 13:55:24 +010010 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
wdenkbf9e3b32004-02-12 00:47:09 +000013 *
wdenk5653fc32004-02-08 22:55:38 +000014 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
wdenk5653fc32004-02-08 22:55:38 +000032 */
33
34/* The DEBUG define must be before common to enable debugging */
wdenk2d1a5372004-02-23 19:30:57 +000035/* #define DEBUG */
36
wdenk5653fc32004-02-08 22:55:38 +000037#include <common.h>
38#include <asm/processor.h>
Haiying Wang3a197b22007-02-21 16:52:31 +010039#include <asm/io.h>
wdenk4c0d4c32004-06-09 17:34:58 +000040#include <asm/byteorder.h>
wdenk2a8af182005-04-13 10:02:42 +000041#include <environment.h>
wdenk028ab6b2004-02-23 23:54:43 +000042
wdenk5653fc32004-02-08 22:55:38 +000043/*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +010044 * This file implements a Common Flash Interface (CFI) driver for
45 * U-Boot.
46 *
47 * The width of the port and the width of the chips are determined at
48 * initialization. These widths are used to calculate the address for
49 * access CFI data structures.
wdenk5653fc32004-02-08 22:55:38 +000050 *
51 * References
52 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
Stefan Roese260421a2006-11-13 13:55:24 +010056 * AMD CFI Specification, Release 2.0 December 1, 2001
57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
wdenk5653fc32004-02-08 22:55:38 +000059 *
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
Heiko Schocherd0b6e142007-01-19 18:05:26 +010061 * reading and writing ... (yes there is such a Hardware).
wdenk5653fc32004-02-08 22:55:38 +000062 */
63
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#ifndef CONFIG_SYS_FLASH_BANKS_LIST
65#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
wdenkbf9e3b32004-02-12 00:47:09 +000066#endif
67
wdenk5653fc32004-02-08 22:55:38 +000068#define FLASH_CMD_CFI 0x98
69#define FLASH_CMD_READ_ID 0x90
70#define FLASH_CMD_RESET 0xff
71#define FLASH_CMD_BLOCK_ERASE 0x20
72#define FLASH_CMD_ERASE_CONFIRM 0xD0
73#define FLASH_CMD_WRITE 0x40
74#define FLASH_CMD_PROTECT 0x60
75#define FLASH_CMD_PROTECT_SET 0x01
76#define FLASH_CMD_PROTECT_CLEAR 0xD0
77#define FLASH_CMD_CLEAR_STATUS 0x50
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +040078#define FLASH_CMD_READ_STATUS 0x70
wdenkbf9e3b32004-02-12 00:47:09 +000079#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +040080#define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
wdenkbf9e3b32004-02-12 00:47:09 +000081#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
wdenk5653fc32004-02-08 22:55:38 +000082
83#define FLASH_STATUS_DONE 0x80
84#define FLASH_STATUS_ESS 0x40
85#define FLASH_STATUS_ECLBS 0x20
86#define FLASH_STATUS_PSLBS 0x10
87#define FLASH_STATUS_VPENS 0x08
88#define FLASH_STATUS_PSS 0x04
89#define FLASH_STATUS_DPS 0x02
90#define FLASH_STATUS_R 0x01
91#define FLASH_STATUS_PROTECT 0x01
92
93#define AMD_CMD_RESET 0xF0
94#define AMD_CMD_WRITE 0xA0
95#define AMD_CMD_ERASE_START 0x80
96#define AMD_CMD_ERASE_SECTOR 0x30
wdenk855a4962004-03-14 18:23:55 +000097#define AMD_CMD_UNLOCK_START 0xAA
98#define AMD_CMD_UNLOCK_ACK 0x55
Stefan Roese79b4cda2006-02-28 15:29:58 +010099#define AMD_CMD_WRITE_TO_BUFFER 0x25
100#define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
wdenk5653fc32004-02-08 22:55:38 +0000101
102#define AMD_STATUS_TOGGLE 0x40
103#define AMD_STATUS_ERROR 0x20
Stefan Roese79b4cda2006-02-28 15:29:58 +0100104
Rafael Camposbc9019e2008-07-31 10:22:20 +0200105#define ATM_CMD_UNLOCK_SECT 0x70
106#define ATM_CMD_SOFTLOCK_START 0x80
107#define ATM_CMD_LOCK_SECT 0x40
108
Stefan Roese260421a2006-11-13 13:55:24 +0100109#define FLASH_OFFSET_MANUFACTURER_ID 0x00
110#define FLASH_OFFSET_DEVICE_ID 0x01
111#define FLASH_OFFSET_DEVICE_ID2 0x0E
112#define FLASH_OFFSET_DEVICE_ID3 0x0F
wdenk5653fc32004-02-08 22:55:38 +0000113#define FLASH_OFFSET_CFI 0x55
Wolfgang Denk92eb7292006-12-27 01:26:13 +0100114#define FLASH_OFFSET_CFI_ALT 0x555
wdenk5653fc32004-02-08 22:55:38 +0000115#define FLASH_OFFSET_CFI_RESP 0x10
wdenkbf9e3b32004-02-12 00:47:09 +0000116#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +0100117/* extended query table primary address */
118#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
wdenk5653fc32004-02-08 22:55:38 +0000119#define FLASH_OFFSET_WTOUT 0x1F
wdenkbf9e3b32004-02-12 00:47:09 +0000120#define FLASH_OFFSET_WBTOUT 0x20
wdenk5653fc32004-02-08 22:55:38 +0000121#define FLASH_OFFSET_ETOUT 0x21
wdenkbf9e3b32004-02-12 00:47:09 +0000122#define FLASH_OFFSET_CETOUT 0x22
wdenk5653fc32004-02-08 22:55:38 +0000123#define FLASH_OFFSET_WMAX_TOUT 0x23
wdenkbf9e3b32004-02-12 00:47:09 +0000124#define FLASH_OFFSET_WBMAX_TOUT 0x24
wdenk5653fc32004-02-08 22:55:38 +0000125#define FLASH_OFFSET_EMAX_TOUT 0x25
wdenkbf9e3b32004-02-12 00:47:09 +0000126#define FLASH_OFFSET_CEMAX_TOUT 0x26
wdenk5653fc32004-02-08 22:55:38 +0000127#define FLASH_OFFSET_SIZE 0x27
wdenkbf9e3b32004-02-12 00:47:09 +0000128#define FLASH_OFFSET_INTERFACE 0x28
129#define FLASH_OFFSET_BUFFER_SIZE 0x2A
wdenk5653fc32004-02-08 22:55:38 +0000130#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
131#define FLASH_OFFSET_ERASE_REGIONS 0x2D
132#define FLASH_OFFSET_PROTECT 0x02
wdenkbf9e3b32004-02-12 00:47:09 +0000133#define FLASH_OFFSET_USER_PROTECTION 0x85
134#define FLASH_OFFSET_INTEL_PROTECTION 0x81
wdenk5653fc32004-02-08 22:55:38 +0000135
Stefan Roese260421a2006-11-13 13:55:24 +0100136#define CFI_CMDSET_NONE 0
137#define CFI_CMDSET_INTEL_EXTENDED 1
138#define CFI_CMDSET_AMD_STANDARD 2
139#define CFI_CMDSET_INTEL_STANDARD 3
140#define CFI_CMDSET_AMD_EXTENDED 4
141#define CFI_CMDSET_MITSU_STANDARD 256
142#define CFI_CMDSET_MITSU_EXTENDED 257
143#define CFI_CMDSET_SST 258
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400144#define CFI_CMDSET_INTEL_PROG_REGIONS 512
wdenk5653fc32004-02-08 22:55:38 +0000145
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
wdenkf7d15722004-12-18 22:35:43 +0000147# undef FLASH_CMD_RESET
Stefan Roese260421a2006-11-13 13:55:24 +0100148# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
wdenkf7d15722004-12-18 22:35:43 +0000149#endif
150
wdenk5653fc32004-02-08 22:55:38 +0000151typedef union {
152 unsigned char c;
153 unsigned short w;
154 unsigned long l;
155 unsigned long long ll;
156} cfiword_t;
157
Stefan Roese260421a2006-11-13 13:55:24 +0100158#define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
wdenk5653fc32004-02-08 22:55:38 +0000159
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +0100160static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
Piotr Ziecik6ea808e2008-11-17 15:49:32 +0100161static uint flash_verbose = 1;
Wolfgang Denk92eb7292006-12-27 01:26:13 +0100162
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163/* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
164#ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
165# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200166#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167# define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
Marian Balakowicze6f2e902005-10-11 19:09:42 +0200168#endif
wdenk5653fc32004-02-08 22:55:38 +0000169
Wolfgang Denk2a112b22008-08-08 16:39:54 +0200170flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
171
Stefan Roese79b4cda2006-02-28 15:29:58 +0100172/*
173 * Check if chip width is defined. If not, start detecting with 8bit.
174 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200175#ifndef CONFIG_SYS_FLASH_CFI_WIDTH
176#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Stefan Roese79b4cda2006-02-28 15:29:58 +0100177#endif
178
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100179/* CFI standard query structure */
180struct cfi_qry {
181 u8 qry[3];
182 u16 p_id;
183 u16 p_adr;
184 u16 a_id;
185 u16 a_adr;
186 u8 vcc_min;
187 u8 vcc_max;
188 u8 vpp_min;
189 u8 vpp_max;
190 u8 word_write_timeout_typ;
191 u8 buf_write_timeout_typ;
192 u8 block_erase_timeout_typ;
193 u8 chip_erase_timeout_typ;
194 u8 word_write_timeout_max;
195 u8 buf_write_timeout_max;
196 u8 block_erase_timeout_max;
197 u8 chip_erase_timeout_max;
198 u8 dev_size;
199 u16 interface_desc;
200 u16 max_buf_write_size;
201 u8 num_erase_regions;
202 u32 erase_region_info[NUM_ERASE_REGIONS];
203} __attribute__((packed));
204
205struct cfi_pri_hdr {
206 u8 pri[3];
207 u8 major_version;
208 u8 minor_version;
209} __attribute__((packed));
210
Stefan Roese45aa5a72008-11-17 14:45:22 +0100211static void __flash_write8(u8 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100212{
213 __raw_writeb(value, addr);
214}
215
Stefan Roese45aa5a72008-11-17 14:45:22 +0100216static void __flash_write16(u16 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100217{
218 __raw_writew(value, addr);
219}
220
Stefan Roese45aa5a72008-11-17 14:45:22 +0100221static void __flash_write32(u32 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100222{
223 __raw_writel(value, addr);
224}
225
Stefan Roese45aa5a72008-11-17 14:45:22 +0100226static void __flash_write64(u64 value, void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100227{
228 /* No architectures currently implement __raw_writeq() */
229 *(volatile u64 *)addr = value;
230}
231
Stefan Roese45aa5a72008-11-17 14:45:22 +0100232static u8 __flash_read8(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100233{
234 return __raw_readb(addr);
235}
236
Stefan Roese45aa5a72008-11-17 14:45:22 +0100237static u16 __flash_read16(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100238{
239 return __raw_readw(addr);
240}
241
Stefan Roese45aa5a72008-11-17 14:45:22 +0100242static u32 __flash_read32(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100243{
244 return __raw_readl(addr);
245}
246
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100247static u64 __flash_read64(void *addr)
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100248{
249 /* No architectures currently implement __raw_readq() */
250 return *(volatile u64 *)addr;
251}
252
Stefan Roese45aa5a72008-11-17 14:45:22 +0100253#ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
254void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
255void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
256void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
257void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
258u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
259u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
260u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100261u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
Stefan Roese45aa5a72008-11-17 14:45:22 +0100262#else
263#define flash_write8 __flash_write8
264#define flash_write16 __flash_write16
265#define flash_write32 __flash_write32
266#define flash_write64 __flash_write64
267#define flash_read8 __flash_read8
268#define flash_read16 __flash_read16
269#define flash_read32 __flash_read32
270#define flash_read64 __flash_read64
271#endif
Daniel Hellstrom97bf85d2008-03-28 20:40:19 +0100272
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200273/*-----------------------------------------------------------------------
274 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200275#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Heiko Schocher4f975672009-02-10 09:53:29 +0100276flash_info_t *flash_get_info(ulong base)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200277{
278 int i;
279 flash_info_t * info = 0;
280
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200281 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200282 info = & flash_info[i];
283 if (info->size && info->start[0] <= base &&
284 base <= info->start[0] + info->size - 1)
285 break;
286 }
287
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200288 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200289}
wdenk5653fc32004-02-08 22:55:38 +0000290#endif
291
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100292unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
293{
294 if (sect != (info->sector_count - 1))
295 return info->start[sect + 1] - info->start[sect];
296 else
297 return info->start[0] + info->size - info->start[sect];
298}
299
wdenk5653fc32004-02-08 22:55:38 +0000300/*-----------------------------------------------------------------------
301 * create an address based on the offset and the port width
302 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100303static inline void *
304flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000305{
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100306 unsigned int byte_offset = offset * info->portwidth;
307
Becky Bruce09ce9922009-02-02 16:34:51 -0600308 return (void *)(info->start[sect] + byte_offset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100309}
310
311static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
312 unsigned int offset, void *addr)
313{
wdenk5653fc32004-02-08 22:55:38 +0000314}
wdenkbf9e3b32004-02-12 00:47:09 +0000315
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200316/*-----------------------------------------------------------------------
317 * make a proper sized command based on the port and chip widths
318 */
Sebastian Siewior7288f972008-07-15 13:35:23 +0200319static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200320{
321 int i;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400322 int cword_offset;
323 int cp_offset;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200324#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200325 u32 cmd_le = cpu_to_le32(cmd);
326#endif
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400327 uchar val;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200328 uchar *cp = (uchar *) cmdbuf;
329
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400330 for (i = info->portwidth; i > 0; i--){
331 cword_offset = (info->portwidth-i)%info->chipwidth;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200332#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400333 cp_offset = info->portwidth - i;
Sebastian Siewior340ccb22008-07-16 20:04:49 +0200334 val = *((uchar*)&cmd_le + cword_offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200335#else
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400336 cp_offset = i - 1;
Sebastian Siewior7288f972008-07-15 13:35:23 +0200337 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200338#endif
Sebastian Siewior7288f972008-07-15 13:35:23 +0200339 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400340 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200341}
342
wdenkbf9e3b32004-02-12 00:47:09 +0000343#ifdef DEBUG
344/*-----------------------------------------------------------------------
345 * Debug support
346 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100347static void print_longlong (char *str, unsigned long long data)
wdenkbf9e3b32004-02-12 00:47:09 +0000348{
349 int i;
350 char *cp;
351
Wolfgang Denk657f2062009-02-04 09:42:20 +0100352 cp = (char *) &data;
wdenkbf9e3b32004-02-12 00:47:09 +0000353 for (i = 0; i < 8; i++)
354 sprintf (&str[i * 2], "%2.2x", *cp++);
355}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200356
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100357static void flash_printqry (struct cfi_qry *qry)
wdenkbf9e3b32004-02-12 00:47:09 +0000358{
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100359 u8 *p = (u8 *)qry;
wdenkbf9e3b32004-02-12 00:47:09 +0000360 int x, y;
361
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100362 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
363 debug("%02x : ", x);
364 for (y = 0; y < 16; y++)
365 debug("%2.2x ", p[x + y]);
366 debug(" ");
wdenkbf9e3b32004-02-12 00:47:09 +0000367 for (y = 0; y < 16; y++) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100368 unsigned char c = p[x + y];
369 if (c >= 0x20 && c <= 0x7e)
370 debug("%c", c);
371 else
372 debug(".");
wdenkbf9e3b32004-02-12 00:47:09 +0000373 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +0100374 debug("\n");
wdenkbf9e3b32004-02-12 00:47:09 +0000375 }
376}
wdenkbf9e3b32004-02-12 00:47:09 +0000377#endif
378
379
wdenk5653fc32004-02-08 22:55:38 +0000380/*-----------------------------------------------------------------------
381 * read a character at a port width address
382 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100383static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000384{
385 uchar *cp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100386 uchar retval;
wdenkbf9e3b32004-02-12 00:47:09 +0000387
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100388 cp = flash_map (info, 0, offset);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200389#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100390 retval = flash_read8(cp);
wdenkbf9e3b32004-02-12 00:47:09 +0000391#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100392 retval = flash_read8(cp + info->portwidth - 1);
wdenkbf9e3b32004-02-12 00:47:09 +0000393#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100394 flash_unmap (info, 0, offset, cp);
395 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000396}
397
398/*-----------------------------------------------------------------------
Tor Krill90447ec2008-03-28 11:29:10 +0100399 * read a word at a port width address, assume 16bit bus
400 */
401static inline ushort flash_read_word (flash_info_t * info, uint offset)
402{
403 ushort *addr, retval;
404
405 addr = flash_map (info, 0, offset);
406 retval = flash_read16 (addr);
407 flash_unmap (info, 0, offset, addr);
408 return retval;
409}
410
411
412/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +0100413 * read a long word by picking the least significant byte of each maximum
wdenk5653fc32004-02-08 22:55:38 +0000414 * port size word. Swap for ppc format.
415 */
Haavard Skinnemoen30557932007-12-13 12:56:29 +0100416static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
417 uint offset)
wdenk5653fc32004-02-08 22:55:38 +0000418{
wdenkbf9e3b32004-02-12 00:47:09 +0000419 uchar *addr;
420 ulong retval;
wdenk5653fc32004-02-08 22:55:38 +0000421
wdenkbf9e3b32004-02-12 00:47:09 +0000422#ifdef DEBUG
423 int x;
424#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100425 addr = flash_map (info, sect, offset);
wdenkbf9e3b32004-02-12 00:47:09 +0000426
427#ifdef DEBUG
428 debug ("long addr is at %p info->portwidth = %d\n", addr,
429 info->portwidth);
430 for (x = 0; x < 4 * info->portwidth; x++) {
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100431 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
wdenkbf9e3b32004-02-12 00:47:09 +0000432 }
433#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200434#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100435 retval = ((flash_read8(addr) << 16) |
436 (flash_read8(addr + info->portwidth) << 24) |
437 (flash_read8(addr + 2 * info->portwidth)) |
438 (flash_read8(addr + 3 * info->portwidth) << 8));
wdenkbf9e3b32004-02-12 00:47:09 +0000439#else
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100440 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
441 (flash_read8(addr + info->portwidth - 1) << 16) |
442 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
443 (flash_read8(addr + 3 * info->portwidth - 1)));
wdenkbf9e3b32004-02-12 00:47:09 +0000444#endif
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100445 flash_unmap(info, sect, offset, addr);
446
wdenkbf9e3b32004-02-12 00:47:09 +0000447 return retval;
wdenk5653fc32004-02-08 22:55:38 +0000448}
449
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200450/*
451 * Write a proper sized command to the correct address
452 */
453static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
Sebastian Siewior7288f972008-07-15 13:35:23 +0200454 uint offset, u32 cmd)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200455{
Stefan Roese79b4cda2006-02-28 15:29:58 +0100456
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100457 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200458 cfiword_t cword;
459
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100460 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200461 flash_make_cmd (info, cmd, &cword);
462 switch (info->portwidth) {
463 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100464 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200465 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100466 flash_write8(cword.c, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200467 break;
468 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100469 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200470 cmd, cword.w,
471 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100472 flash_write16(cword.w, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200473 break;
474 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100475 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200476 cmd, cword.l,
477 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100478 flash_write32(cword.l, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200479 break;
480 case FLASH_CFI_64BIT:
481#ifdef DEBUG
482 {
483 char str[20];
484
485 print_longlong (str, cword.ll);
486
487 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100488 addr, cmd, str,
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200489 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
490 }
491#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100492 flash_write64(cword.ll, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200493 break;
494 }
495
496 /* Ensure all the instructions are fully finished */
497 sync();
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100498
499 flash_unmap(info, sect, offset, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200500}
501
502static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
503{
504 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
505 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
506}
507
508/*-----------------------------------------------------------------------
509 */
510static int flash_isequal (flash_info_t * info, flash_sect_t sect,
511 uint offset, uchar cmd)
512{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100513 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200514 cfiword_t cword;
515 int retval;
516
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100517 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200518 flash_make_cmd (info, cmd, &cword);
519
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100520 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200521 switch (info->portwidth) {
522 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100523 debug ("is= %x %x\n", flash_read8(addr), cword.c);
524 retval = (flash_read8(addr) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200525 break;
526 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100527 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
528 retval = (flash_read16(addr) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200529 break;
530 case FLASH_CFI_32BIT:
Andrew Klossner52514692008-08-21 07:12:26 -0700531 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100532 retval = (flash_read32(addr) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200533 break;
534 case FLASH_CFI_64BIT:
535#ifdef DEBUG
536 {
537 char str1[20];
538 char str2[20];
539
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100540 print_longlong (str1, flash_read64(addr));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200541 print_longlong (str2, cword.ll);
542 debug ("is= %s %s\n", str1, str2);
543 }
544#endif
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100545 retval = (flash_read64(addr) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200546 break;
547 default:
548 retval = 0;
549 break;
550 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100551 flash_unmap(info, sect, offset, addr);
552
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200553 return retval;
554}
555
556/*-----------------------------------------------------------------------
557 */
558static int flash_isset (flash_info_t * info, flash_sect_t sect,
559 uint offset, uchar cmd)
560{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100561 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200562 cfiword_t cword;
563 int retval;
564
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100565 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200566 flash_make_cmd (info, cmd, &cword);
567 switch (info->portwidth) {
568 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100569 retval = ((flash_read8(addr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200570 break;
571 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100572 retval = ((flash_read16(addr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200573 break;
574 case FLASH_CFI_32BIT:
Stefan Roese47cc23c2008-01-02 14:05:37 +0100575 retval = ((flash_read32(addr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200576 break;
577 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100578 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200579 break;
580 default:
581 retval = 0;
582 break;
583 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100584 flash_unmap(info, sect, offset, addr);
585
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200586 return retval;
587}
588
589/*-----------------------------------------------------------------------
590 */
591static int flash_toggle (flash_info_t * info, flash_sect_t sect,
592 uint offset, uchar cmd)
593{
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100594 void *addr;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200595 cfiword_t cword;
596 int retval;
597
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100598 addr = flash_map (info, sect, offset);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200599 flash_make_cmd (info, cmd, &cword);
600 switch (info->portwidth) {
601 case FLASH_CFI_8BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200602 retval = flash_read8(addr) != flash_read8(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200603 break;
604 case FLASH_CFI_16BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200605 retval = flash_read16(addr) != flash_read16(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200606 break;
607 case FLASH_CFI_32BIT:
Stefan Roesefb8c0612008-06-16 10:40:02 +0200608 retval = flash_read32(addr) != flash_read32(addr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200609 break;
610 case FLASH_CFI_64BIT:
Wolfgang Denk9abda6b2008-10-31 01:12:28 +0100611 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
612 (flash_read32(addr+4) != flash_read32(addr+4)) );
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200613 break;
614 default:
615 retval = 0;
616 break;
617 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100618 flash_unmap(info, sect, offset, addr);
619
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200620 return retval;
621}
622
623/*
624 * flash_is_busy - check to see if the flash is busy
625 *
626 * This routine checks the status of the chip and returns true if the
627 * chip is busy.
628 */
629static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
630{
631 int retval;
632
633 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400634 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200635 case CFI_CMDSET_INTEL_STANDARD:
636 case CFI_CMDSET_INTEL_EXTENDED:
637 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
638 break;
639 case CFI_CMDSET_AMD_STANDARD:
640 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100641#ifdef CONFIG_FLASH_CFI_LEGACY
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200642 case CFI_CMDSET_AMD_LEGACY:
643#endif
644 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
645 break;
646 default:
647 retval = 0;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100648 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200649 debug ("flash_is_busy: %d\n", retval);
650 return retval;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100651}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200652
653/*-----------------------------------------------------------------------
654 * wait for XSR.7 to be set. Time out with an error if it does not.
655 * This routine does not set the flash to read-array mode.
656 */
657static int flash_status_check (flash_info_t * info, flash_sect_t sector,
658 ulong tout, char *prompt)
659{
660 ulong start;
661
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200662#if CONFIG_SYS_HZ != 1000
663 tout *= CONFIG_SYS_HZ/1000;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200664#endif
665
666 /* Wait for command completion */
667 start = get_timer (0);
668 while (flash_is_busy (info, sector)) {
669 if (get_timer (start) > tout) {
670 printf ("Flash %s timeout at address %lx data %lx\n",
671 prompt, info->start[sector],
672 flash_read_long (info, sector, 0));
673 flash_write_cmd (info, sector, 0, info->cmd_reset);
674 return ERR_TIMOUT;
675 }
676 udelay (1); /* also triggers watchdog */
677 }
678 return ERR_OK;
679}
680
681/*-----------------------------------------------------------------------
682 * Wait for XSR.7 to be set, if it times out print an error, otherwise
683 * do a full status check.
684 *
685 * This routine sets the flash to read-array mode.
686 */
687static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
688 ulong tout, char *prompt)
689{
690 int retcode;
691
692 retcode = flash_status_check (info, sector, tout, prompt);
693 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400694 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200695 case CFI_CMDSET_INTEL_EXTENDED:
696 case CFI_CMDSET_INTEL_STANDARD:
Ed Swarthout0d01f662008-10-09 01:26:36 -0500697 if ((retcode != ERR_OK)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200698 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
699 retcode = ERR_INVAL;
700 printf ("Flash %s error at address %lx\n", prompt,
701 info->start[sector]);
702 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
703 FLASH_STATUS_PSLBS)) {
704 puts ("Command Sequence Error.\n");
705 } else if (flash_isset (info, sector, 0,
706 FLASH_STATUS_ECLBS)) {
707 puts ("Block Erase Error.\n");
708 retcode = ERR_NOT_ERASED;
709 } else if (flash_isset (info, sector, 0,
710 FLASH_STATUS_PSLBS)) {
711 puts ("Locking Error\n");
712 }
713 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
714 puts ("Block locked.\n");
715 retcode = ERR_PROTECTED;
716 }
717 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
718 puts ("Vpp Low Error.\n");
719 }
720 flash_write_cmd (info, sector, 0, info->cmd_reset);
721 break;
722 default:
723 break;
724 }
725 return retcode;
726}
727
728/*-----------------------------------------------------------------------
729 */
730static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
731{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200732#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200733 unsigned short w;
734 unsigned int l;
735 unsigned long long ll;
736#endif
737
738 switch (info->portwidth) {
739 case FLASH_CFI_8BIT:
740 cword->c = c;
741 break;
742 case FLASH_CFI_16BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200743#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200744 w = c;
745 w <<= 8;
746 cword->w = (cword->w >> 8) | w;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100747#else
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200748 cword->w = (cword->w << 8) | c;
Michael Schwingen81b20cc2007-12-07 23:35:02 +0100749#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200750 break;
751 case FLASH_CFI_32BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200752#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200753 l = c;
754 l <<= 24;
755 cword->l = (cword->l >> 8) | l;
756#else
757 cword->l = (cword->l << 8) | c;
Stefan Roese2662b402006-04-01 13:41:03 +0200758#endif
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200759 break;
760 case FLASH_CFI_64BIT:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200761#if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200762 ll = c;
763 ll <<= 56;
764 cword->ll = (cword->ll >> 8) | ll;
765#else
766 cword->ll = (cword->ll << 8) | c;
767#endif
768 break;
wdenk5653fc32004-02-08 22:55:38 +0000769 }
wdenk5653fc32004-02-08 22:55:38 +0000770}
771
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100772/*
773 * Loop through the sector table starting from the previously found sector.
774 * Searches forwards or backwards, dependent on the passed address.
wdenk5653fc32004-02-08 22:55:38 +0000775 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200776static flash_sect_t find_sector (flash_info_t * info, ulong addr)
wdenk7680c142005-05-16 15:23:22 +0000777{
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100778 static flash_sect_t saved_sector = 0; /* previously found sector */
779 flash_sect_t sector = saved_sector;
wdenk7680c142005-05-16 15:23:22 +0000780
Jens Gehrlein0f8e8512008-12-16 17:25:55 +0100781 while ((info->start[sector] < addr)
782 && (sector < info->sector_count - 1))
783 sector++;
784 while ((info->start[sector] > addr) && (sector > 0))
785 /*
786 * also decrements the sector in case of an overshot
787 * in the first loop
788 */
789 sector--;
790
791 saved_sector = sector;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200792 return sector;
wdenk7680c142005-05-16 15:23:22 +0000793}
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200794
795/*-----------------------------------------------------------------------
796 */
797static int flash_write_cfiword (flash_info_t * info, ulong dest,
798 cfiword_t cword)
799{
Becky Bruce09ce9922009-02-02 16:34:51 -0600800 void *dstaddr = (void *)dest;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200801 int flag;
Jens Gehrleina7292872008-12-16 17:25:54 +0100802 flash_sect_t sect = 0;
803 char sect_found = 0;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200804
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200805 /* Check if Flash is (sufficiently) erased */
806 switch (info->portwidth) {
807 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100808 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200809 break;
810 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100811 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200812 break;
813 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100814 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200815 break;
816 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100817 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200818 break;
819 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100820 flag = 0;
821 break;
822 }
Becky Bruce09ce9922009-02-02 16:34:51 -0600823 if (!flag)
Stefan Roese0dc80e22007-12-27 07:50:54 +0100824 return ERR_NOT_ERASED;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200825
826 /* Disable interrupts which might cause a timeout here */
827 flag = disable_interrupts ();
828
829 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400830 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200831 case CFI_CMDSET_INTEL_EXTENDED:
832 case CFI_CMDSET_INTEL_STANDARD:
833 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
834 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
835 break;
836 case CFI_CMDSET_AMD_EXTENDED:
837 case CFI_CMDSET_AMD_STANDARD:
838#ifdef CONFIG_FLASH_CFI_LEGACY
839 case CFI_CMDSET_AMD_LEGACY:
Wolfgang Denk080bdb72005-10-05 01:51:29 +0200840#endif
Ed Swarthout0d01f662008-10-09 01:26:36 -0500841 sect = find_sector(info, dest);
842 flash_unlock_seq (info, sect);
843 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
Jens Gehrleina7292872008-12-16 17:25:54 +0100844 sect_found = 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200845 break;
846 }
847
848 switch (info->portwidth) {
849 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100850 flash_write8(cword.c, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200851 break;
852 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100853 flash_write16(cword.w, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200854 break;
855 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100856 flash_write32(cword.l, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200857 break;
858 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100859 flash_write64(cword.ll, dstaddr);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200860 break;
861 }
862
863 /* re-enable interrupts if necessary */
864 if (flag)
865 enable_interrupts ();
866
Jens Gehrleina7292872008-12-16 17:25:54 +0100867 if (!sect_found)
868 sect = find_sector (info, dest);
869
870 return flash_full_status_check (info, sect, info->write_tout, "write");
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200871}
872
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200873#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200874
875static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
876 int len)
877{
878 flash_sect_t sector;
879 int cnt;
880 int retcode;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100881 void *src = cp;
Stefan Roeseec21d5c2009-02-05 11:25:57 +0100882 void *dst = (void *)dest;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100883 void *dst2 = dst;
884 int flag = 0;
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200885 uint offset = 0;
886 unsigned int shift;
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400887 uchar write_cmd;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100888
Stefan Roese0dc80e22007-12-27 07:50:54 +0100889 switch (info->portwidth) {
890 case FLASH_CFI_8BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200891 shift = 0;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100892 break;
893 case FLASH_CFI_16BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200894 shift = 1;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100895 break;
896 case FLASH_CFI_32BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200897 shift = 2;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100898 break;
899 case FLASH_CFI_64BIT:
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200900 shift = 3;
Stefan Roese0dc80e22007-12-27 07:50:54 +0100901 break;
902 default:
903 retcode = ERR_INVAL;
904 goto out_unmap;
905 }
906
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200907 cnt = len >> shift;
908
Stefan Roese0dc80e22007-12-27 07:50:54 +0100909 while ((cnt-- > 0) && (flag == 0)) {
910 switch (info->portwidth) {
911 case FLASH_CFI_8BIT:
912 flag = ((flash_read8(dst2) & flash_read8(src)) ==
913 flash_read8(src));
914 src += 1, dst2 += 1;
915 break;
916 case FLASH_CFI_16BIT:
917 flag = ((flash_read16(dst2) & flash_read16(src)) ==
918 flash_read16(src));
919 src += 2, dst2 += 2;
920 break;
921 case FLASH_CFI_32BIT:
922 flag = ((flash_read32(dst2) & flash_read32(src)) ==
923 flash_read32(src));
924 src += 4, dst2 += 4;
925 break;
926 case FLASH_CFI_64BIT:
927 flag = ((flash_read64(dst2) & flash_read64(src)) ==
928 flash_read64(src));
929 src += 8, dst2 += 8;
930 break;
931 }
932 }
933 if (!flag) {
934 retcode = ERR_NOT_ERASED;
935 goto out_unmap;
936 }
937
938 src = cp;
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100939 sector = find_sector (info, dest);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200940
941 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400942 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200943 case CFI_CMDSET_INTEL_STANDARD:
944 case CFI_CMDSET_INTEL_EXTENDED:
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400945 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
946 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200947 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +0400948 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
949 flash_write_cmd (info, sector, 0, write_cmd);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200950 retcode = flash_status_check (info, sector,
951 info->buffer_write_tout,
952 "write to buffer");
953 if (retcode == ERR_OK) {
954 /* reduce the number of loops by the width of
955 * the port */
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200956 cnt = len >> shift;
Vasiliy Leoenenko93c56f22008-05-07 21:24:44 +0400957 flash_write_cmd (info, sector, 0, cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200958 while (cnt-- > 0) {
959 switch (info->portwidth) {
960 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100961 flash_write8(flash_read8(src), dst);
962 src += 1, dst += 1;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200963 break;
964 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100965 flash_write16(flash_read16(src), dst);
966 src += 2, dst += 2;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200967 break;
968 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100969 flash_write32(flash_read32(src), dst);
970 src += 4, dst += 4;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200971 break;
972 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +0100973 flash_write64(flash_read64(src), dst);
974 src += 8, dst += 8;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200975 break;
976 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100977 retcode = ERR_INVAL;
978 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200979 }
980 }
981 flash_write_cmd (info, sector, 0,
982 FLASH_CMD_WRITE_BUFFER_CONFIRM);
983 retcode = flash_full_status_check (
984 info, sector, info->buffer_write_tout,
985 "buffer write");
986 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +0100987
988 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200989
990 case CFI_CMDSET_AMD_STANDARD:
991 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +0200992 flash_unlock_seq(info,0);
Guennadi Liakhovetski96ef8312008-04-03 13:36:02 +0200993
994#ifdef CONFIG_FLASH_SPANSION_S29WS_N
995 offset = ((unsigned long)dst - info->start[sector]) >> shift;
996#endif
997 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
998 cnt = len >> shift;
999 flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001000
1001 switch (info->portwidth) {
1002 case FLASH_CFI_8BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001003 while (cnt-- > 0) {
1004 flash_write8(flash_read8(src), dst);
1005 src += 1, dst += 1;
1006 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001007 break;
1008 case FLASH_CFI_16BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001009 while (cnt-- > 0) {
1010 flash_write16(flash_read16(src), dst);
1011 src += 2, dst += 2;
1012 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001013 break;
1014 case FLASH_CFI_32BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001015 while (cnt-- > 0) {
1016 flash_write32(flash_read32(src), dst);
1017 src += 4, dst += 4;
1018 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001019 break;
1020 case FLASH_CFI_64BIT:
Haavard Skinnemoencdbaefb2007-12-13 12:56:32 +01001021 while (cnt-- > 0) {
1022 flash_write64(flash_read64(src), dst);
1023 src += 8, dst += 8;
1024 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001025 break;
1026 default:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001027 retcode = ERR_INVAL;
1028 goto out_unmap;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001029 }
1030
1031 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1032 retcode = flash_full_status_check (info, sector,
1033 info->buffer_write_tout,
1034 "buffer write");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001035 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001036
1037 default:
1038 debug ("Unknown Command Set\n");
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001039 retcode = ERR_INVAL;
1040 break;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001041 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001042
1043out_unmap:
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001044 return retcode;
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001045}
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001046#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001047
wdenk7680c142005-05-16 15:23:22 +00001048
1049/*-----------------------------------------------------------------------
1050 */
wdenkbf9e3b32004-02-12 00:47:09 +00001051int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk5653fc32004-02-08 22:55:38 +00001052{
1053 int rcode = 0;
1054 int prot;
1055 flash_sect_t sect;
1056
wdenkbf9e3b32004-02-12 00:47:09 +00001057 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001058 puts ("Can't erase unknown flash type - aborted\n");
wdenk5653fc32004-02-08 22:55:38 +00001059 return 1;
1060 }
1061 if ((s_first < 0) || (s_first > s_last)) {
wdenk4b9206e2004-03-23 22:14:11 +00001062 puts ("- no sectors to erase\n");
wdenk5653fc32004-02-08 22:55:38 +00001063 return 1;
1064 }
1065
1066 prot = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001067 for (sect = s_first; sect <= s_last; ++sect) {
wdenk5653fc32004-02-08 22:55:38 +00001068 if (info->protect[sect]) {
1069 prot++;
1070 }
1071 }
1072 if (prot) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001073 printf ("- Warning: %d protected sectors will not be erased!\n",
1074 prot);
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001075 } else if (flash_verbose) {
wdenk4b9206e2004-03-23 22:14:11 +00001076 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001077 }
1078
1079
wdenkbf9e3b32004-02-12 00:47:09 +00001080 for (sect = s_first; sect <= s_last; sect++) {
wdenk5653fc32004-02-08 22:55:38 +00001081 if (info->protect[sect] == 0) { /* not protected */
wdenkbf9e3b32004-02-12 00:47:09 +00001082 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001083 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001084 case CFI_CMDSET_INTEL_STANDARD:
1085 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001086 flash_write_cmd (info, sect, 0,
1087 FLASH_CMD_CLEAR_STATUS);
1088 flash_write_cmd (info, sect, 0,
1089 FLASH_CMD_BLOCK_ERASE);
1090 flash_write_cmd (info, sect, 0,
1091 FLASH_CMD_ERASE_CONFIRM);
wdenk5653fc32004-02-08 22:55:38 +00001092 break;
1093 case CFI_CMDSET_AMD_STANDARD:
1094 case CFI_CMDSET_AMD_EXTENDED:
wdenkbf9e3b32004-02-12 00:47:09 +00001095 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001096 flash_write_cmd (info, sect,
1097 info->addr_unlock1,
1098 AMD_CMD_ERASE_START);
wdenkbf9e3b32004-02-12 00:47:09 +00001099 flash_unlock_seq (info, sect);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001100 flash_write_cmd (info, sect, 0,
1101 AMD_CMD_ERASE_SECTOR);
wdenk5653fc32004-02-08 22:55:38 +00001102 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001103#ifdef CONFIG_FLASH_CFI_LEGACY
1104 case CFI_CMDSET_AMD_LEGACY:
1105 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001106 flash_write_cmd (info, 0, info->addr_unlock1,
1107 AMD_CMD_ERASE_START);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001108 flash_unlock_seq (info, 0);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001109 flash_write_cmd (info, sect, 0,
1110 AMD_CMD_ERASE_SECTOR);
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001111 break;
1112#endif
wdenk5653fc32004-02-08 22:55:38 +00001113 default:
wdenkbf9e3b32004-02-12 00:47:09 +00001114 debug ("Unkown flash vendor %d\n",
1115 info->vendor);
wdenk5653fc32004-02-08 22:55:38 +00001116 break;
1117 }
1118
wdenkbf9e3b32004-02-12 00:47:09 +00001119 if (flash_full_status_check
1120 (info, sect, info->erase_blk_tout, "erase")) {
wdenk5653fc32004-02-08 22:55:38 +00001121 rcode = 1;
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001122 } else if (flash_verbose)
wdenk4b9206e2004-03-23 22:14:11 +00001123 putc ('.');
wdenk5653fc32004-02-08 22:55:38 +00001124 }
1125 }
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001126
1127 if (flash_verbose)
1128 puts (" done\n");
1129
wdenk5653fc32004-02-08 22:55:38 +00001130 return rcode;
1131}
1132
1133/*-----------------------------------------------------------------------
1134 */
wdenkbf9e3b32004-02-12 00:47:09 +00001135void flash_print_info (flash_info_t * info)
wdenk5653fc32004-02-08 22:55:38 +00001136{
1137 int i;
1138
1139 if (info->flash_id != FLASH_MAN_CFI) {
wdenk4b9206e2004-03-23 22:14:11 +00001140 puts ("missing or unknown FLASH type\n");
wdenk5653fc32004-02-08 22:55:38 +00001141 return;
1142 }
1143
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001144 printf ("%s FLASH (%d x %d)",
1145 info->name,
wdenkbf9e3b32004-02-12 00:47:09 +00001146 (info->portwidth << 3), (info->chipwidth << 3));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001147 if (info->size < 1024*1024)
1148 printf (" Size: %ld kB in %d Sectors\n",
1149 info->size >> 10, info->sector_count);
1150 else
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001151 printf (" Size: %ld MB in %d Sectors\n",
1152 info->size >> 20, info->sector_count);
Stefan Roese260421a2006-11-13 13:55:24 +01001153 printf (" ");
1154 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001155 case CFI_CMDSET_INTEL_PROG_REGIONS:
1156 printf ("Intel Prog Regions");
1157 break;
Stefan Roese260421a2006-11-13 13:55:24 +01001158 case CFI_CMDSET_INTEL_STANDARD:
1159 printf ("Intel Standard");
1160 break;
1161 case CFI_CMDSET_INTEL_EXTENDED:
1162 printf ("Intel Extended");
1163 break;
1164 case CFI_CMDSET_AMD_STANDARD:
1165 printf ("AMD Standard");
1166 break;
1167 case CFI_CMDSET_AMD_EXTENDED:
1168 printf ("AMD Extended");
1169 break;
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001170#ifdef CONFIG_FLASH_CFI_LEGACY
1171 case CFI_CMDSET_AMD_LEGACY:
1172 printf ("AMD Legacy");
1173 break;
1174#endif
Stefan Roese260421a2006-11-13 13:55:24 +01001175 default:
1176 printf ("Unknown (%d)", info->vendor);
1177 break;
1178 }
1179 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1180 info->manufacturer_id, info->device_id);
1181 if (info->device_id == 0x7E) {
1182 printf("%04X", info->device_id2);
1183 }
1184 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
wdenk028ab6b2004-02-23 23:54:43 +00001185 info->erase_blk_tout,
Stefan Roese260421a2006-11-13 13:55:24 +01001186 info->write_tout);
1187 if (info->buffer_size > 1) {
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001188 printf (" Buffer write timeout: %ld ms, "
1189 "buffer size: %d bytes\n",
wdenk028ab6b2004-02-23 23:54:43 +00001190 info->buffer_write_tout,
1191 info->buffer_size);
Stefan Roese260421a2006-11-13 13:55:24 +01001192 }
wdenk5653fc32004-02-08 22:55:38 +00001193
Stefan Roese260421a2006-11-13 13:55:24 +01001194 puts ("\n Sector Start Addresses:");
wdenkbf9e3b32004-02-12 00:47:09 +00001195 for (i = 0; i < info->sector_count; ++i) {
Stefan Roese260421a2006-11-13 13:55:24 +01001196 if ((i % 5) == 0)
1197 printf ("\n");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001198#ifdef CONFIG_SYS_FLASH_EMPTY_INFO
wdenk5653fc32004-02-08 22:55:38 +00001199 int k;
1200 int size;
1201 int erased;
1202 volatile unsigned long *flash;
1203
1204 /*
1205 * Check if whole sector is erased
1206 */
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001207 size = flash_sector_size(info, i);
wdenk5653fc32004-02-08 22:55:38 +00001208 erased = 1;
wdenkbf9e3b32004-02-12 00:47:09 +00001209 flash = (volatile unsigned long *) info->start[i];
1210 size = size >> 2; /* divide by 4 for longword access */
1211 for (k = 0; k < size; k++) {
1212 if (*flash++ != 0xffffffff) {
1213 erased = 0;
1214 break;
1215 }
1216 }
wdenk5653fc32004-02-08 22:55:38 +00001217
wdenk5653fc32004-02-08 22:55:38 +00001218 /* print empty and read-only info */
Stefan Roese260421a2006-11-13 13:55:24 +01001219 printf (" %08lX %c %s ",
wdenk5653fc32004-02-08 22:55:38 +00001220 info->start[i],
Stefan Roese260421a2006-11-13 13:55:24 +01001221 erased ? 'E' : ' ',
1222 info->protect[i] ? "RO" : " ");
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001223#else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
Stefan Roese260421a2006-11-13 13:55:24 +01001224 printf (" %08lX %s ",
1225 info->start[i],
1226 info->protect[i] ? "RO" : " ");
wdenk5653fc32004-02-08 22:55:38 +00001227#endif
1228 }
wdenk4b9206e2004-03-23 22:14:11 +00001229 putc ('\n');
wdenk5653fc32004-02-08 22:55:38 +00001230 return;
1231}
1232
1233/*-----------------------------------------------------------------------
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001234 * This is used in a few places in write_buf() to show programming
1235 * progress. Making it a function is nasty because it needs to do side
1236 * effect updates to digit and dots. Repeated code is nasty too, so
1237 * we define it once here.
1238 */
Stefan Roesef0105722008-03-19 07:09:26 +01001239#ifdef CONFIG_FLASH_SHOW_PROGRESS
1240#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001241 if (flash_verbose) { \
1242 dots -= dots_sub; \
1243 if ((scale > 0) && (dots <= 0)) { \
1244 if ((digit % 5) == 0) \
1245 printf ("%d", digit / 5); \
1246 else \
1247 putc ('.'); \
1248 digit--; \
1249 dots += scale; \
1250 } \
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001251 }
Stefan Roesef0105722008-03-19 07:09:26 +01001252#else
1253#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1254#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001255
1256/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001257 * Copy memory to flash, returns:
1258 * 0 - OK
1259 * 1 - write timeout
1260 * 2 - Flash not erased
1261 */
wdenkbf9e3b32004-02-12 00:47:09 +00001262int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk5653fc32004-02-08 22:55:38 +00001263{
1264 ulong wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001265 uchar *p;
wdenk5653fc32004-02-08 22:55:38 +00001266 int aln;
1267 cfiword_t cword;
1268 int i, rc;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001269#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001270 int buffered_size;
1271#endif
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001272#ifdef CONFIG_FLASH_SHOW_PROGRESS
1273 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1274 int scale = 0;
1275 int dots = 0;
1276
1277 /*
1278 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1279 */
1280 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1281 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1282 CONFIG_FLASH_SHOW_PROGRESS);
1283 }
1284#endif
1285
wdenkbf9e3b32004-02-12 00:47:09 +00001286 /* get lower aligned address */
wdenk5653fc32004-02-08 22:55:38 +00001287 wp = (addr & ~(info->portwidth - 1));
1288
1289 /* handle unaligned start */
wdenkbf9e3b32004-02-12 00:47:09 +00001290 if ((aln = addr - wp) != 0) {
wdenk5653fc32004-02-08 22:55:38 +00001291 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001292 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001293 for (i = 0; i < aln; ++i)
1294 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001295
wdenkbf9e3b32004-02-12 00:47:09 +00001296 for (; (i < info->portwidth) && (cnt > 0); i++) {
1297 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001298 cnt--;
wdenk5653fc32004-02-08 22:55:38 +00001299 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001300 for (; (cnt == 0) && (i < info->portwidth); ++i)
1301 flash_add_byte (info, &cword, flash_read8(p + i));
1302
1303 rc = flash_write_cfiword (info, wp, cword);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001304 if (rc != 0)
wdenk5653fc32004-02-08 22:55:38 +00001305 return rc;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001306
1307 wp += i;
Stefan Roesef0105722008-03-19 07:09:26 +01001308 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001309 }
1310
wdenkbf9e3b32004-02-12 00:47:09 +00001311 /* handle the aligned part */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001312#ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
wdenkbf9e3b32004-02-12 00:47:09 +00001313 buffered_size = (info->portwidth / info->chipwidth);
1314 buffered_size *= info->buffer_size;
1315 while (cnt >= info->portwidth) {
Stefan Roese79b4cda2006-02-28 15:29:58 +01001316 /* prohibit buffer write when buffer_size is 1 */
1317 if (info->buffer_size == 1) {
1318 cword.l = 0;
1319 for (i = 0; i < info->portwidth; i++)
1320 flash_add_byte (info, &cword, *src++);
1321 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1322 return rc;
1323 wp += info->portwidth;
1324 cnt -= info->portwidth;
1325 continue;
1326 }
1327
1328 /* write buffer until next buffered_size aligned boundary */
1329 i = buffered_size - (wp % buffered_size);
1330 if (i > cnt)
1331 i = cnt;
wdenkbf9e3b32004-02-12 00:47:09 +00001332 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
wdenk5653fc32004-02-08 22:55:38 +00001333 return rc;
Wolfgang Denk8d4ba3d2005-08-12 22:35:59 +02001334 i -= i & (info->portwidth - 1);
wdenk5653fc32004-02-08 22:55:38 +00001335 wp += i;
1336 src += i;
wdenkbf9e3b32004-02-12 00:47:09 +00001337 cnt -= i;
Stefan Roesef0105722008-03-19 07:09:26 +01001338 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
wdenk5653fc32004-02-08 22:55:38 +00001339 }
1340#else
wdenkbf9e3b32004-02-12 00:47:09 +00001341 while (cnt >= info->portwidth) {
wdenk5653fc32004-02-08 22:55:38 +00001342 cword.l = 0;
wdenkbf9e3b32004-02-12 00:47:09 +00001343 for (i = 0; i < info->portwidth; i++) {
1344 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001345 }
wdenkbf9e3b32004-02-12 00:47:09 +00001346 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk5653fc32004-02-08 22:55:38 +00001347 return rc;
1348 wp += info->portwidth;
1349 cnt -= info->portwidth;
Stefan Roesef0105722008-03-19 07:09:26 +01001350 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
wdenk5653fc32004-02-08 22:55:38 +00001351 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001352#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
Jerry Van Baren9a042e92008-03-08 13:48:01 -05001353
wdenk5653fc32004-02-08 22:55:38 +00001354 if (cnt == 0) {
1355 return (0);
1356 }
1357
1358 /*
1359 * handle unaligned tail bytes
1360 */
1361 cword.l = 0;
Becky Bruce09ce9922009-02-02 16:34:51 -06001362 p = (uchar *)wp;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001363 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
wdenkbf9e3b32004-02-12 00:47:09 +00001364 flash_add_byte (info, &cword, *src++);
wdenk5653fc32004-02-08 22:55:38 +00001365 --cnt;
1366 }
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001367 for (; i < info->portwidth; ++i)
1368 flash_add_byte (info, &cword, flash_read8(p + i));
wdenk5653fc32004-02-08 22:55:38 +00001369
wdenkbf9e3b32004-02-12 00:47:09 +00001370 return flash_write_cfiword (info, wp, cword);
wdenk5653fc32004-02-08 22:55:38 +00001371}
1372
1373/*-----------------------------------------------------------------------
1374 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001375#ifdef CONFIG_SYS_FLASH_PROTECTION
wdenk5653fc32004-02-08 22:55:38 +00001376
wdenkbf9e3b32004-02-12 00:47:09 +00001377int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk5653fc32004-02-08 22:55:38 +00001378{
1379 int retcode = 0;
1380
Rafael Camposbc9019e2008-07-31 10:22:20 +02001381 switch (info->vendor) {
1382 case CFI_CMDSET_INTEL_PROG_REGIONS:
1383 case CFI_CMDSET_INTEL_STANDARD:
Nick Spence9e8e63c2008-08-19 22:21:16 -07001384 case CFI_CMDSET_INTEL_EXTENDED:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001385 flash_write_cmd (info, sector, 0,
1386 FLASH_CMD_CLEAR_STATUS);
1387 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1388 if (prot)
1389 flash_write_cmd (info, sector, 0,
1390 FLASH_CMD_PROTECT_SET);
1391 else
1392 flash_write_cmd (info, sector, 0,
1393 FLASH_CMD_PROTECT_CLEAR);
1394 break;
1395 case CFI_CMDSET_AMD_EXTENDED:
1396 case CFI_CMDSET_AMD_STANDARD:
Rafael Camposbc9019e2008-07-31 10:22:20 +02001397 /* U-Boot only checks the first byte */
1398 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1399 if (prot) {
1400 flash_unlock_seq (info, 0);
1401 flash_write_cmd (info, 0,
1402 info->addr_unlock1,
1403 ATM_CMD_SOFTLOCK_START);
1404 flash_unlock_seq (info, 0);
1405 flash_write_cmd (info, sector, 0,
1406 ATM_CMD_LOCK_SECT);
1407 } else {
1408 flash_write_cmd (info, 0,
1409 info->addr_unlock1,
1410 AMD_CMD_UNLOCK_START);
1411 if (info->device_id == ATM_ID_BV6416)
1412 flash_write_cmd (info, sector,
1413 0, ATM_CMD_UNLOCK_SECT);
1414 }
1415 }
1416 break;
TsiChung Liew4e00acd2008-08-19 16:53:39 +00001417#ifdef CONFIG_FLASH_CFI_LEGACY
1418 case CFI_CMDSET_AMD_LEGACY:
1419 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1420 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1421 if (prot)
1422 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1423 else
1424 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1425#endif
Rafael Camposbc9019e2008-07-31 10:22:20 +02001426 };
wdenk5653fc32004-02-08 22:55:38 +00001427
wdenkbf9e3b32004-02-12 00:47:09 +00001428 if ((retcode =
1429 flash_full_status_check (info, sector, info->erase_blk_tout,
1430 prot ? "protect" : "unprotect")) == 0) {
wdenk5653fc32004-02-08 22:55:38 +00001431
1432 info->protect[sector] = prot;
Stefan Roese2662b402006-04-01 13:41:03 +02001433
1434 /*
1435 * On some of Intel's flash chips (marked via legacy_unlock)
1436 * unprotect unprotects all locking.
1437 */
1438 if ((prot == 0) && (info->legacy_unlock)) {
wdenk5653fc32004-02-08 22:55:38 +00001439 flash_sect_t i;
wdenkbf9e3b32004-02-12 00:47:09 +00001440
1441 for (i = 0; i < info->sector_count; i++) {
1442 if (info->protect[i])
1443 flash_real_protect (info, i, 1);
wdenk5653fc32004-02-08 22:55:38 +00001444 }
1445 }
1446 }
wdenk5653fc32004-02-08 22:55:38 +00001447 return retcode;
wdenkbf9e3b32004-02-12 00:47:09 +00001448}
1449
wdenk5653fc32004-02-08 22:55:38 +00001450/*-----------------------------------------------------------------------
1451 * flash_read_user_serial - read the OneTimeProgramming cells
1452 */
wdenkbf9e3b32004-02-12 00:47:09 +00001453void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1454 int len)
wdenk5653fc32004-02-08 22:55:38 +00001455{
wdenkbf9e3b32004-02-12 00:47:09 +00001456 uchar *src;
1457 uchar *dst;
wdenk5653fc32004-02-08 22:55:38 +00001458
1459 dst = buffer;
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001460 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001461 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1462 memcpy (dst, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001463 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001464 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001465}
wdenkbf9e3b32004-02-12 00:47:09 +00001466
wdenk5653fc32004-02-08 22:55:38 +00001467/*
1468 * flash_read_factory_serial - read the device Id from the protection area
1469 */
wdenkbf9e3b32004-02-12 00:47:09 +00001470void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1471 int len)
wdenk5653fc32004-02-08 22:55:38 +00001472{
wdenkbf9e3b32004-02-12 00:47:09 +00001473 uchar *src;
wdenkcd37d9e2004-02-10 00:03:41 +00001474
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001475 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
wdenkbf9e3b32004-02-12 00:47:09 +00001476 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1477 memcpy (buffer, src + offset, len);
Wolfgang Denkdb421e62005-09-25 16:41:22 +02001478 flash_write_cmd (info, 0, 0, info->cmd_reset);
Haavard Skinnemoen12d30aa2007-12-13 12:56:34 +01001479 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
wdenk5653fc32004-02-08 22:55:38 +00001480}
1481
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001482#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00001483
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001484/*-----------------------------------------------------------------------
1485 * Reverse the order of the erase regions in the CFI QRY structure.
1486 * This is needed for chips that are either a) correctly detected as
1487 * top-boot, or b) buggy.
1488 */
1489static void cfi_reverse_geometry(struct cfi_qry *qry)
1490{
1491 unsigned int i, j;
1492 u32 tmp;
1493
1494 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1495 tmp = qry->erase_region_info[i];
1496 qry->erase_region_info[i] = qry->erase_region_info[j];
1497 qry->erase_region_info[j] = tmp;
1498 }
1499}
wdenk5653fc32004-02-08 22:55:38 +00001500
1501/*-----------------------------------------------------------------------
Stefan Roese260421a2006-11-13 13:55:24 +01001502 * read jedec ids from device and set corresponding fields in info struct
1503 *
1504 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1505 *
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001506 */
1507static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1508{
1509 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1510 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1511 udelay(1000); /* some flash are slow to respond */
1512 info->manufacturer_id = flash_read_uchar (info,
1513 FLASH_OFFSET_MANUFACTURER_ID);
1514 info->device_id = flash_read_uchar (info,
1515 FLASH_OFFSET_DEVICE_ID);
1516 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1517}
1518
1519static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1520{
1521 info->cmd_reset = FLASH_CMD_RESET;
1522
1523 cmdset_intel_read_jedec_ids(info);
1524 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1525
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001526#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001527 /* read legacy lock/unlock bit from intel flash */
1528 if (info->ext_addr) {
1529 info->legacy_unlock = flash_read_uchar (info,
1530 info->ext_addr + 5) & 0x08;
1531 }
1532#endif
1533
1534 return 0;
1535}
1536
1537static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1538{
1539 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1540 flash_unlock_seq(info, 0);
1541 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1542 udelay(1000); /* some flash are slow to respond */
Tor Krill90447ec2008-03-28 11:29:10 +01001543
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001544 info->manufacturer_id = flash_read_uchar (info,
1545 FLASH_OFFSET_MANUFACTURER_ID);
Tor Krill90447ec2008-03-28 11:29:10 +01001546
1547 switch (info->chipwidth){
1548 case FLASH_CFI_8BIT:
1549 info->device_id = flash_read_uchar (info,
1550 FLASH_OFFSET_DEVICE_ID);
1551 if (info->device_id == 0x7E) {
1552 /* AMD 3-byte (expanded) device ids */
1553 info->device_id2 = flash_read_uchar (info,
1554 FLASH_OFFSET_DEVICE_ID2);
1555 info->device_id2 <<= 8;
1556 info->device_id2 |= flash_read_uchar (info,
1557 FLASH_OFFSET_DEVICE_ID3);
1558 }
1559 break;
1560 case FLASH_CFI_16BIT:
1561 info->device_id = flash_read_word (info,
1562 FLASH_OFFSET_DEVICE_ID);
1563 break;
1564 default:
1565 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001566 }
1567 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1568}
1569
1570static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1571{
1572 info->cmd_reset = AMD_CMD_RESET;
1573
1574 cmdset_amd_read_jedec_ids(info);
1575 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1576
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001577 return 0;
1578}
1579
1580#ifdef CONFIG_FLASH_CFI_LEGACY
Stefan Roese260421a2006-11-13 13:55:24 +01001581static void flash_read_jedec_ids (flash_info_t * info)
1582{
1583 info->manufacturer_id = 0;
1584 info->device_id = 0;
1585 info->device_id2 = 0;
1586
1587 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001588 case CFI_CMDSET_INTEL_PROG_REGIONS:
Stefan Roese260421a2006-11-13 13:55:24 +01001589 case CFI_CMDSET_INTEL_STANDARD:
1590 case CFI_CMDSET_INTEL_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001591 cmdset_intel_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001592 break;
1593 case CFI_CMDSET_AMD_STANDARD:
1594 case CFI_CMDSET_AMD_EXTENDED:
Michael Schwingen8225d1e2008-01-12 20:29:47 +01001595 cmdset_amd_read_jedec_ids(info);
Stefan Roese260421a2006-11-13 13:55:24 +01001596 break;
1597 default:
1598 break;
1599 }
1600}
1601
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001602/*-----------------------------------------------------------------------
1603 * Call board code to request info about non-CFI flash.
1604 * board_flash_get_legacy needs to fill in at least:
1605 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1606 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001607static int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001608{
1609 flash_info_t *info = &flash_info[banknum];
1610
1611 if (board_flash_get_legacy(base, banknum, info)) {
1612 /* board code may have filled info completely. If not, we
1613 use JEDEC ID probing. */
1614 if (!info->vendor) {
1615 int modes[] = {
1616 CFI_CMDSET_AMD_STANDARD,
1617 CFI_CMDSET_INTEL_STANDARD
1618 };
1619 int i;
1620
1621 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1622 info->vendor = modes[i];
Becky Bruce09ce9922009-02-02 16:34:51 -06001623 info->start[0] =
1624 (ulong)map_physmem(base,
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001625 info->portwidth,
Becky Bruce09ce9922009-02-02 16:34:51 -06001626 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001627 if (info->portwidth == FLASH_CFI_8BIT
1628 && info->interface == FLASH_CFI_X8X16) {
1629 info->addr_unlock1 = 0x2AAA;
1630 info->addr_unlock2 = 0x5555;
1631 } else {
1632 info->addr_unlock1 = 0x5555;
1633 info->addr_unlock2 = 0x2AAA;
1634 }
1635 flash_read_jedec_ids(info);
1636 debug("JEDEC PROBE: ID %x %x %x\n",
1637 info->manufacturer_id,
1638 info->device_id,
1639 info->device_id2);
Becky Bruce09ce9922009-02-02 16:34:51 -06001640 if (jedec_flash_match(info, info->start[0]))
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001641 break;
Becky Bruce09ce9922009-02-02 16:34:51 -06001642 else
Stefan Roesee1fb6d02009-02-05 11:44:52 +01001643 unmap_physmem((void *)info->start[0],
Becky Bruce09ce9922009-02-02 16:34:51 -06001644 MAP_NOCACHE);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001645 }
1646 }
1647
1648 switch(info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001649 case CFI_CMDSET_INTEL_PROG_REGIONS:
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001650 case CFI_CMDSET_INTEL_STANDARD:
1651 case CFI_CMDSET_INTEL_EXTENDED:
1652 info->cmd_reset = FLASH_CMD_RESET;
1653 break;
1654 case CFI_CMDSET_AMD_STANDARD:
1655 case CFI_CMDSET_AMD_EXTENDED:
1656 case CFI_CMDSET_AMD_LEGACY:
1657 info->cmd_reset = AMD_CMD_RESET;
1658 break;
1659 }
1660 info->flash_id = FLASH_MAN_CFI;
1661 return 1;
1662 }
1663 return 0; /* use CFI */
1664}
1665#else
Becky Bruce09ce9922009-02-02 16:34:51 -06001666static inline int flash_detect_legacy(phys_addr_t base, int banknum)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001667{
1668 return 0; /* use CFI */
1669}
1670#endif
1671
Stefan Roese260421a2006-11-13 13:55:24 +01001672/*-----------------------------------------------------------------------
wdenk5653fc32004-02-08 22:55:38 +00001673 * detect if flash is compatible with the Common Flash Interface (CFI)
1674 * http://www.jedec.org/download/search/jesd68.pdf
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001675 */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001676static void flash_read_cfi (flash_info_t *info, void *buf,
1677 unsigned int start, size_t len)
1678{
1679 u8 *p = buf;
1680 unsigned int i;
1681
1682 for (i = 0; i < len; i++)
1683 p[i] = flash_read_uchar(info, start + i);
1684}
1685
1686static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
wdenk5653fc32004-02-08 22:55:38 +00001687{
Wolfgang Denk92eb7292006-12-27 01:26:13 +01001688 int cfi_offset;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001689
Michael Schwingen1ba639d2008-02-18 23:16:35 +01001690 /* We do not yet know what kind of commandset to use, so we issue
1691 the reset command in both Intel and AMD variants, in the hope
1692 that AMD flash roms ignore the Intel command. */
1693 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1694 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1695
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001696 for (cfi_offset=0;
1697 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1698 cfi_offset++) {
1699 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1700 FLASH_CMD_CFI);
1701 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1702 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1703 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001704 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1705 sizeof(struct cfi_qry));
1706 info->interface = le16_to_cpu(qry->interface_desc);
1707
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001708 info->cfi_offset = flash_offset_cfi[cfi_offset];
1709 debug ("device interface is %d\n",
1710 info->interface);
1711 debug ("found port %d chip %d ",
1712 info->portwidth, info->chipwidth);
1713 debug ("port %d bits chip %d bits\n",
1714 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1715 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1716
1717 /* calculate command offsets as in the Linux driver */
1718 info->addr_unlock1 = 0x555;
1719 info->addr_unlock2 = 0x2aa;
1720
1721 /*
1722 * modify the unlock address if we are
1723 * in compatibility mode
1724 */
1725 if ( /* x8/x16 in x8 mode */
1726 ((info->chipwidth == FLASH_CFI_BY8) &&
1727 (info->interface == FLASH_CFI_X8X16)) ||
1728 /* x16/x32 in x16 mode */
1729 ((info->chipwidth == FLASH_CFI_BY16) &&
1730 (info->interface == FLASH_CFI_X16X32)))
1731 {
1732 info->addr_unlock1 = 0xaaa;
1733 info->addr_unlock2 = 0x555;
1734 }
1735
1736 info->name = "CFI conformant";
1737 return 1;
1738 }
1739 }
1740
1741 return 0;
1742}
1743
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001744static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001745{
wdenkbf9e3b32004-02-12 00:47:09 +00001746 debug ("flash detect cfi\n");
wdenk5653fc32004-02-08 22:55:38 +00001747
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001748 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
wdenkbf9e3b32004-02-12 00:47:09 +00001749 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1750 for (info->chipwidth = FLASH_CFI_BY8;
1751 info->chipwidth <= info->portwidth;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001752 info->chipwidth <<= 1)
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001753 if (__flash_detect_cfi(info, qry))
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001754 return 1;
wdenk5653fc32004-02-08 22:55:38 +00001755 }
wdenkbf9e3b32004-02-12 00:47:09 +00001756 debug ("not found\n");
wdenk5653fc32004-02-08 22:55:38 +00001757 return 0;
1758}
wdenkbf9e3b32004-02-12 00:47:09 +00001759
wdenk5653fc32004-02-08 22:55:38 +00001760/*
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001761 * Manufacturer-specific quirks. Add workarounds for geometry
1762 * reversal, etc. here.
1763 */
1764static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1765{
1766 /* check if flash geometry needs reversal */
1767 if (qry->num_erase_regions > 1) {
1768 /* reverse geometry if top boot part */
1769 if (info->cfi_version < 0x3131) {
1770 /* CFI < 1.1, try to guess from device id */
1771 if ((info->device_id & 0x80) != 0)
1772 cfi_reverse_geometry(qry);
1773 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1774 /* CFI >= 1.1, deduct from top/bottom flag */
1775 /* note: ext_addr is valid since cfi_version > 0 */
1776 cfi_reverse_geometry(qry);
1777 }
1778 }
1779}
1780
1781static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1782{
1783 int reverse_geometry = 0;
1784
1785 /* Check the "top boot" bit in the PRI */
1786 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1787 reverse_geometry = 1;
1788
1789 /* AT49BV6416(T) list the erase regions in the wrong order.
1790 * However, the device ID is identical with the non-broken
Ulf Samuelssoncb82a532009-03-27 23:26:43 +01001791 * AT49BV642D they differ in the high byte.
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001792 */
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001793 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1794 reverse_geometry = !reverse_geometry;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001795
1796 if (reverse_geometry)
1797 cfi_reverse_geometry(qry);
1798}
1799
Richard Retanubune8eac432009-01-14 08:44:26 -05001800static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1801{
1802 /* check if flash geometry needs reversal */
1803 if (qry->num_erase_regions > 1) {
1804 /* reverse geometry if top boot part */
1805 if (info->cfi_version < 0x3131) {
Richard Retanubun7a886012009-03-06 10:09:37 -05001806 /* CFI < 1.1, guess by device id (M29W320{DT,ET} only) */
1807 if (info->device_id == 0x22CA ||
1808 info->device_id == 0x2256) {
Richard Retanubune8eac432009-01-14 08:44:26 -05001809 cfi_reverse_geometry(qry);
1810 }
1811 }
1812 }
1813}
1814
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001815/*
wdenk5653fc32004-02-08 22:55:38 +00001816 * The following code cannot be run from FLASH!
1817 *
1818 */
Becky Bruce09ce9922009-02-02 16:34:51 -06001819ulong flash_get_size (phys_addr_t base, int banknum)
wdenk5653fc32004-02-08 22:55:38 +00001820{
wdenkbf9e3b32004-02-12 00:47:09 +00001821 flash_info_t *info = &flash_info[banknum];
wdenk5653fc32004-02-08 22:55:38 +00001822 int i, j;
1823 flash_sect_t sect_cnt;
Becky Bruce09ce9922009-02-02 16:34:51 -06001824 phys_addr_t sector;
wdenk5653fc32004-02-08 22:55:38 +00001825 unsigned long tmp;
1826 int size_ratio;
1827 uchar num_erase_regions;
wdenkbf9e3b32004-02-12 00:47:09 +00001828 int erase_region_size;
1829 int erase_region_count;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001830 struct cfi_qry qry;
Stefan Roese260421a2006-11-13 13:55:24 +01001831
Kumar Galaf9796902008-05-15 15:13:08 -05001832 memset(&qry, 0, sizeof(qry));
1833
Stefan Roese260421a2006-11-13 13:55:24 +01001834 info->ext_addr = 0;
1835 info->cfi_version = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001836#ifdef CONFIG_SYS_FLASH_PROTECTION
Stefan Roese2662b402006-04-01 13:41:03 +02001837 info->legacy_unlock = 0;
1838#endif
wdenk5653fc32004-02-08 22:55:38 +00001839
Becky Bruce09ce9922009-02-02 16:34:51 -06001840 info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001841
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001842 if (flash_detect_cfi (info, &qry)) {
1843 info->vendor = le16_to_cpu(qry.p_id);
1844 info->ext_addr = le16_to_cpu(qry.p_adr);
1845 num_erase_regions = qry.num_erase_regions;
1846
Stefan Roese260421a2006-11-13 13:55:24 +01001847 if (info->ext_addr) {
1848 info->cfi_version = (ushort) flash_read_uchar (info,
1849 info->ext_addr + 3) << 8;
1850 info->cfi_version |= (ushort) flash_read_uchar (info,
1851 info->ext_addr + 4);
1852 }
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001853
wdenkbf9e3b32004-02-12 00:47:09 +00001854#ifdef DEBUG
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001855 flash_printqry (&qry);
wdenkbf9e3b32004-02-12 00:47:09 +00001856#endif
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001857
wdenkbf9e3b32004-02-12 00:47:09 +00001858 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001859 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenk5653fc32004-02-08 22:55:38 +00001860 case CFI_CMDSET_INTEL_STANDARD:
1861 case CFI_CMDSET_INTEL_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001862 cmdset_intel_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001863 break;
1864 case CFI_CMDSET_AMD_STANDARD:
1865 case CFI_CMDSET_AMD_EXTENDED:
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001866 cmdset_amd_init(info, &qry);
wdenk5653fc32004-02-08 22:55:38 +00001867 break;
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001868 default:
1869 printf("CFI: Unknown command set 0x%x\n",
1870 info->vendor);
1871 /*
1872 * Unfortunately, this means we don't know how
1873 * to get the chip back to Read mode. Might
1874 * as well try an Intel-style reset...
1875 */
1876 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1877 return 0;
wdenk5653fc32004-02-08 22:55:38 +00001878 }
wdenkcd37d9e2004-02-10 00:03:41 +00001879
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001880 /* Do manufacturer-specific fixups */
1881 switch (info->manufacturer_id) {
1882 case 0x0001:
1883 flash_fixup_amd(info, &qry);
1884 break;
1885 case 0x001f:
1886 flash_fixup_atmel(info, &qry);
1887 break;
Richard Retanubune8eac432009-01-14 08:44:26 -05001888 case 0x0020:
1889 flash_fixup_stm(info, &qry);
1890 break;
Haavard Skinnemoen467bcee2007-12-14 15:36:18 +01001891 }
1892
wdenkbf9e3b32004-02-12 00:47:09 +00001893 debug ("manufacturer is %d\n", info->vendor);
Stefan Roese260421a2006-11-13 13:55:24 +01001894 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1895 debug ("device id is 0x%x\n", info->device_id);
1896 debug ("device id2 is 0x%x\n", info->device_id2);
1897 debug ("cfi version is 0x%04x\n", info->cfi_version);
1898
wdenk5653fc32004-02-08 22:55:38 +00001899 size_ratio = info->portwidth / info->chipwidth;
wdenkbf9e3b32004-02-12 00:47:09 +00001900 /* if the chip is x8/x16 reduce the ratio by half */
1901 if ((info->interface == FLASH_CFI_X8X16)
1902 && (info->chipwidth == FLASH_CFI_BY8)) {
1903 size_ratio >>= 1;
1904 }
wdenkbf9e3b32004-02-12 00:47:09 +00001905 debug ("size_ratio %d port %d bits chip %d bits\n",
1906 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1907 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1908 debug ("found %d erase regions\n", num_erase_regions);
wdenk5653fc32004-02-08 22:55:38 +00001909 sect_cnt = 0;
1910 sector = base;
wdenkbf9e3b32004-02-12 00:47:09 +00001911 for (i = 0; i < num_erase_regions; i++) {
1912 if (i > NUM_ERASE_REGIONS) {
wdenk028ab6b2004-02-23 23:54:43 +00001913 printf ("%d erase regions found, only %d used\n",
1914 num_erase_regions, NUM_ERASE_REGIONS);
wdenk5653fc32004-02-08 22:55:38 +00001915 break;
1916 }
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001917
Haavard Skinnemoen0ddf06d2007-12-14 15:36:17 +01001918 tmp = le32_to_cpu(qry.erase_region_info[i]);
1919 debug("erase region %u: 0x%08lx\n", i, tmp);
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001920
1921 erase_region_count = (tmp & 0xffff) + 1;
1922 tmp >>= 16;
wdenkbf9e3b32004-02-12 00:47:09 +00001923 erase_region_size =
1924 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenk4c0d4c32004-06-09 17:34:58 +00001925 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenk028ab6b2004-02-23 23:54:43 +00001926 erase_region_count, erase_region_size);
wdenkbf9e3b32004-02-12 00:47:09 +00001927 for (j = 0; j < erase_region_count; j++) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001928 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
Michael Schwingen81b20cc2007-12-07 23:35:02 +01001929 printf("ERROR: too many flash sectors\n");
1930 break;
1931 }
Becky Bruce09ce9922009-02-02 16:34:51 -06001932 info->start[sect_cnt] =
1933 (ulong)map_physmem(sector,
1934 info->portwidth,
1935 MAP_NOCACHE);
wdenk5653fc32004-02-08 22:55:38 +00001936 sector += (erase_region_size * size_ratio);
wdenka1191902005-01-09 17:12:27 +00001937
1938 /*
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001939 * Only read protection status from
1940 * supported devices (intel...)
wdenka1191902005-01-09 17:12:27 +00001941 */
1942 switch (info->vendor) {
Vasiliy Leoenenko9c048b52008-05-07 21:25:33 +04001943 case CFI_CMDSET_INTEL_PROG_REGIONS:
wdenka1191902005-01-09 17:12:27 +00001944 case CFI_CMDSET_INTEL_EXTENDED:
1945 case CFI_CMDSET_INTEL_STANDARD:
1946 info->protect[sect_cnt] =
1947 flash_isset (info, sect_cnt,
1948 FLASH_OFFSET_PROTECT,
1949 FLASH_STATUS_PROTECT);
1950 break;
1951 default:
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001952 /* default: not protected */
1953 info->protect[sect_cnt] = 0;
wdenka1191902005-01-09 17:12:27 +00001954 }
1955
wdenk5653fc32004-02-08 22:55:38 +00001956 sect_cnt++;
1957 }
1958 }
1959
1960 info->sector_count = sect_cnt;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001961 info->size = 1 << qry.dev_size;
wdenk5653fc32004-02-08 22:55:38 +00001962 /* multiply the size by the number of chips */
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001963 info->size *= size_ratio;
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001964 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1965 tmp = 1 << qry.block_erase_timeout_typ;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001966 info->erase_blk_tout = tmp *
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001967 (1 << qry.block_erase_timeout_max);
1968 tmp = (1 << qry.buf_write_timeout_typ) *
1969 (1 << qry.buf_write_timeout_max);
1970
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001971 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001972 info->buffer_write_tout = (tmp + 999) / 1000;
1973 tmp = (1 << qry.word_write_timeout_typ) *
1974 (1 << qry.word_write_timeout_max);
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001975 /* round up when converting to ms */
Haavard Skinnemoene23741f2007-12-14 15:36:16 +01001976 info->write_tout = (tmp + 999) / 1000;
wdenk5653fc32004-02-08 22:55:38 +00001977 info->flash_id = FLASH_MAN_CFI;
Haavard Skinnemoen7e5b9b42007-12-13 12:56:28 +01001978 if ((info->interface == FLASH_CFI_X8X16) &&
1979 (info->chipwidth == FLASH_CFI_BY8)) {
1980 /* XXX - Need to test on x8/x16 in parallel. */
1981 info->portwidth >>= 1;
wdenk855a4962004-03-14 18:23:55 +00001982 }
Mike Frysinger22159872008-10-02 01:55:38 -04001983
1984 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk5653fc32004-02-08 22:55:38 +00001985 }
1986
wdenkbf9e3b32004-02-12 00:47:09 +00001987 return (info->size);
wdenk5653fc32004-02-08 22:55:38 +00001988}
1989
Piotr Ziecik6ea808e2008-11-17 15:49:32 +01001990void flash_set_verbose(uint v)
1991{
1992 flash_verbose = v;
1993}
1994
wdenk5653fc32004-02-08 22:55:38 +00001995/*-----------------------------------------------------------------------
1996 */
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001997unsigned long flash_init (void)
wdenk5653fc32004-02-08 22:55:38 +00001998{
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02001999 unsigned long size = 0;
2000 int i;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002001#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002002 struct apl_s {
2003 ulong start;
2004 ulong size;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002005 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002006#endif
wdenk5653fc32004-02-08 22:55:38 +00002007
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002008#ifdef CONFIG_SYS_FLASH_PROTECTION
Eric Schumann3a3baf32009-03-21 09:59:34 -04002009 /* read environment from EEPROM */
2010 char s[64];
2011 getenv_r ("unlock", s, sizeof(s));
Michael Schwingen81b20cc2007-12-07 23:35:02 +01002012#endif
wdenk5653fc32004-02-08 22:55:38 +00002013
Becky Bruce09ce9922009-02-02 16:34:51 -06002014#define BANK_BASE(i) (((phys_addr_t [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
Wolfgang Denk2a112b22008-08-08 16:39:54 +02002015
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002016 /* Init: no FLASHes known */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002017 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002018 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenk5653fc32004-02-08 22:55:38 +00002019
Wolfgang Denk2a112b22008-08-08 16:39:54 +02002020 if (!flash_detect_legacy (BANK_BASE(i), i))
2021 flash_get_size (BANK_BASE(i), i);
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002022 size += flash_info[i].size;
2023 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002024#ifndef CONFIG_SYS_FLASH_QUIET_TEST
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002025 printf ("## Unknown FLASH on Bank %d "
2026 "- Size = 0x%08lx = %ld MB\n",
2027 i+1, flash_info[i].size,
2028 flash_info[i].size << 20);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002029#endif /* CONFIG_SYS_FLASH_QUIET_TEST */
wdenk5653fc32004-02-08 22:55:38 +00002030 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002031#ifdef CONFIG_SYS_FLASH_PROTECTION
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002032 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2033 /*
2034 * Only the U-Boot image and it's environment
2035 * is protected, all other sectors are
2036 * unprotected (unlocked) if flash hardware
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002037 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002038 * and the environment variable "unlock" is
2039 * set to "yes".
2040 */
2041 if (flash_info[i].legacy_unlock) {
2042 int k;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002043
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002044 /*
2045 * Disable legacy_unlock temporarily,
2046 * since flash_real_protect would
2047 * relock all other sectors again
2048 * otherwise.
2049 */
2050 flash_info[i].legacy_unlock = 0;
Stefan Roese79b4cda2006-02-28 15:29:58 +01002051
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002052 /*
2053 * Legacy unlocking (e.g. Intel J3) ->
2054 * unlock only one sector. This will
2055 * unlock all sectors.
2056 */
2057 flash_real_protect (&flash_info[i], 0, 0);
Stefan Roese79b4cda2006-02-28 15:29:58 +01002058
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002059 flash_info[i].legacy_unlock = 1;
2060
2061 /*
2062 * Manually mark other sectors as
2063 * unlocked (unprotected)
2064 */
2065 for (k = 1; k < flash_info[i].sector_count; k++)
2066 flash_info[i].protect[k] = 0;
2067 } else {
2068 /*
2069 * No legancy unlocking -> unlock all sectors
2070 */
2071 flash_protect (FLAG_PROTECT_CLEAR,
2072 flash_info[i].start[0],
2073 flash_info[i].start[0]
2074 + flash_info[i].size - 1,
2075 &flash_info[i]);
2076 }
Stefan Roese79b4cda2006-02-28 15:29:58 +01002077 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002078#endif /* CONFIG_SYS_FLASH_PROTECTION */
wdenk5653fc32004-02-08 22:55:38 +00002079 }
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002080
2081 /* Monitor protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002082#if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002083 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002084 CONFIG_SYS_MONITOR_BASE,
2085 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2086 flash_get_info(CONFIG_SYS_MONITOR_BASE));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002087#endif
2088
2089 /* Environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +02002090#ifdef CONFIG_ENV_IS_IN_FLASH
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002091 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002092 CONFIG_ENV_ADDR,
2093 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2094 flash_get_info(CONFIG_ENV_ADDR));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002095#endif
2096
2097 /* Redundant environment protection ON by default */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002098#ifdef CONFIG_ENV_ADDR_REDUND
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002099 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002100 CONFIG_ENV_ADDR_REDUND,
Wolfgang Denkdfcd7f22009-05-15 00:16:03 +02002101 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +02002102 flash_get_info(CONFIG_ENV_ADDR_REDUND));
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002103#endif
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002104
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02002105#if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
Matthias Fuchsc63ad632008-04-18 16:29:40 +02002106 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2107 debug("autoprotecting from %08x to %08x\n",
2108 apl[i].start, apl[i].start + apl[i].size - 1);
2109 flash_protect (FLAG_PROTECT_SET,
2110 apl[i].start,
2111 apl[i].start + apl[i].size - 1,
2112 flash_get_info(apl[i].start));
2113 }
2114#endif
Piotr Ziecik91809ed2008-11-17 15:57:58 +01002115
2116#ifdef CONFIG_FLASH_CFI_MTD
2117 cfi_mtd_init();
2118#endif
2119
Haavard Skinnemoenbe60a902007-10-06 18:55:36 +02002120 return (size);
wdenk5653fc32004-02-08 22:55:38 +00002121}