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Sergey Kubushync74b2102007-08-10 20:26:18 +02001/*
2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Sergey Kubushync74b2102007-08-10 20:26:18 +02005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
Sergey Kubushync74b2102007-08-10 20:26:18 +02009
10/*
11 * Define this to make U-Boot skip low level initialization when loaded
12 * by initial bootloader. Not required by NAND U-Boot version but IS
13 * required for a NOR version used to burn the real NOR U-Boot into
14 * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
15 * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
16 * NOR U-Boot is loaded directly from Flash so it must perform all the
17 * low level initialization itself. NAND version is loaded by an initial
18 * bootloader (UBL in TI-ese) that performs such an initialization so it's
19 * skipped in NAND version. The third DaVinci boot mode loads a bootloader
20 * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
21 * performing low level init prior to loading. All that means we can NOT use
22 * NAND version to put U-Boot into NOR because it doesn't have NOR support and
23 * we can NOT use NOR version because it performs low level initialization
24 * effectively destroying itself in DDR memory. That's why a separate NOR
25 * version with this define is needed. It is loaded via UART, then one uses
26 * it to somehow download a proper NOR version built WITHOUT this define to
27 * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
28 * NOR support into the initial bootloader so it won't be needed but DaVinci
29 * static RAM might be too small for this (I have something like 2Kbytes left
30 * as of now, without NOR support) so this might've not happened...
31 *
32#define CONFIG_NOR_UART_BOOT
33 */
34
35/*=======*/
36/* Board */
37/*=======*/
38#define DV_EVM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#define CONFIG_SYS_NAND_SMALLPAGE
Sandeep Paulrajaac0b4b2010-12-11 10:47:30 -050040#define CONFIG_SYS_USE_NAND
Sergey Kubushync74b2102007-08-10 20:26:18 +020041/*===================*/
42/* SoC Configuration */
43/*===================*/
44#define CONFIG_ARM926EJS /* arm926ejs CPU core */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020045#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
46#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
47#define CONFIG_SYS_HZ 1000
David Brownellf7904362009-05-15 23:44:08 +020048#define CONFIG_SOC_DM644X
Sergey Kubushync74b2102007-08-10 20:26:18 +020049/*====================================================*/
50/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
51/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */
52/*====================================================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020053#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
54#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
55#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
56#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
Sergey Kubushync74b2102007-08-10 20:26:18 +020057/*=============*/
58/* Memory Info */
59/*=============*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020060#define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020061#define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */
62#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
Sergey Kubushync74b2102007-08-10 20:26:18 +020063#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
Sergey Kubushync74b2102007-08-10 20:26:18 +020064#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
65#define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */
Sandeep Paulrajaac0b4b2010-12-11 10:47:30 -050066
Sergey Kubushync74b2102007-08-10 20:26:18 +020067#define DDR_8BANKS /* 8-bank DDR2 (256MB) */
68/*====================*/
69/* Serial Driver info */
70/*====================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_SYS_NS16550
72#define CONFIG_SYS_NS16550_SERIAL
David Brownell7ee38c02009-04-12 15:38:06 -070073#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020074#define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */
David Brownell7239c5da2009-04-12 15:40:16 -070075#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */
Sergey Kubushync74b2102007-08-10 20:26:18 +020076#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
77#define CONFIG_BAUDRATE 115200 /* Default baud rate */
Sergey Kubushync74b2102007-08-10 20:26:18 +020078/*===================*/
79/* I2C Configuration */
80/*===================*/
81#define CONFIG_HARD_I2C
82#define CONFIG_DRIVER_DAVINCI_I2C
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020083#define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
84#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
Sergey Kubushync74b2102007-08-10 20:26:18 +020085/*==================================*/
86/* Network & Ethernet Configuration */
87/*==================================*/
88#define CONFIG_DRIVER_TI_EMAC
89#define CONFIG_MII
Sergey Kubushync74b2102007-08-10 20:26:18 +020090#define CONFIG_BOOTP_DNS
91#define CONFIG_BOOTP_DNS2
92#define CONFIG_BOOTP_SEND_HOSTNAME
93#define CONFIG_NET_RETRY_COUNT 10
94/*=====================*/
95/* Flash & Environment */
96/*=====================*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020097#ifdef CONFIG_SYS_USE_NAND
Jean-Christophe PLAGNIOL-VILLARDee4f3e22009-03-30 18:58:39 +020098#define CONFIG_NAND_DAVINCI
Nick Thompson97f4eb82009-12-12 12:12:26 -050099#define CONFIG_SYS_NAND_CS 2
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200100#undef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200101#define CONFIG_SYS_NO_FLASH
Jean-Christophe PLAGNIOL-VILLARD51bfee12008-09-10 22:47:58 +0200102#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200103#ifdef CONFIG_SYS_NAND_SMALLPAGE
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200104#define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */
Sandeep Paulraja16df2c2009-09-08 17:09:52 -0400105#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
David Brownell269dfea2009-05-15 23:47:13 +0200106#define CONFIG_MTD_PARTITIONS
Sandeep Paulraj5d0f5362009-09-09 15:26:00 -0400107#define CONFIG_MTD_DEVICE
David Brownell269dfea2009-05-15 23:47:13 +0200108#define CONFIG_CMD_MTDPARTS
109#define MTDIDS_DEFAULT \
110 "nand0=davinci_nand.0"
111#define MTDPARTS_DEFAULT \
112 "mtdparts=davinci_nand.0:384k(bootloader)ro,4m(kernel),-(filesystem)"
Sergey Kubushync74b2102007-08-10 20:26:18 +0200113#else
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200114#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
Sandeep Paulraja16df2c2009-09-08 17:09:52 -0400115#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200116#endif
117#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200118#define CONFIG_SYS_NAND_BASE 0x02000000
David Brownell269dfea2009-05-15 23:47:13 +0200119#define CONFIG_SYS_NAND_USE_FLASH_BBT
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200120#define CONFIG_SYS_NAND_HW_ECC
121#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200122#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200123#elif defined(CONFIG_SYS_USE_NOR)
Sergey Kubushync74b2102007-08-10 20:26:18 +0200124#ifdef CONFIG_NOR_UART_BOOT
125#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200126#else
127#undef CONFIG_SKIP_LOWLEVEL_INIT
Sergey Kubushync74b2102007-08-10 20:26:18 +0200128#endif
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200129#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200130#undef CONFIG_SYS_NO_FLASH
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200131#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200132#define CONFIG_SYS_FLASH_CFI
133#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
134#define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* 64KB sect size AMD Flash */
135#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*3)
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200136#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200138#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200139#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)
140#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ /* Env sector Size */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200141#endif
142/*==============================*/
143/* U-Boot general configuration */
144/*==============================*/
Sergey Kubushync74b2102007-08-10 20:26:18 +0200145#define CONFIG_MISC_INIT_R
Wolfgang Denk950a3922008-04-11 15:11:26 +0200146#undef CONFIG_BOOTDELAY
Sergey Kubushync74b2102007-08-10 20:26:18 +0200147#define CONFIG_BOOTFILE "uImage" /* Boot file name */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200148#define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */
149#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
150#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */
151#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
152#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
153#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
Sergey Kubushync74b2102007-08-10 20:26:18 +0200154#define CONFIG_VERSION_VARIABLE
155#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_HUSH_PARSER
Sergey Kubushync74b2102007-08-10 20:26:18 +0200157#define CONFIG_CMDLINE_EDITING
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_LONGHELP
Sergey Kubushync74b2102007-08-10 20:26:18 +0200159#define CONFIG_CRC32_VERIFY
160#define CONFIG_MX_CYCLIC
Thomas Abraham20cc0662009-01-04 09:41:20 +0530161#define CONFIG_MUSB_HCD
162#define CONFIG_USB_DAVINCI
Sergey Kubushync74b2102007-08-10 20:26:18 +0200163/*===================*/
164/* Linux Information */
165/*===================*/
166#define LINUX_BOOT_PARAM_ADDR 0x80000100
167#define CONFIG_CMDLINE_TAG
168#define CONFIG_SETUP_MEMORY_TAGS
169#define CONFIG_BOOTARGS "mem=120M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
170#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2050000"
171/*=================*/
172/* U-Boot commands */
173/*=================*/
174#include <config_cmd_default.h>
175#define CONFIG_CMD_ASKENV
176#define CONFIG_CMD_DHCP
177#define CONFIG_CMD_DIAG
178#define CONFIG_CMD_I2C
179#define CONFIG_CMD_MII
180#define CONFIG_CMD_PING
181#define CONFIG_CMD_SAVES
182#define CONFIG_CMD_EEPROM
183#undef CONFIG_CMD_BDI
Hadli, Manjunath8f5d4682012-02-06 00:30:44 +0000184
185#ifdef CONFIG_CMD_BDI
186#define CONFIG_CLOCKS
187#endif
188
Sergey Kubushync74b2102007-08-10 20:26:18 +0200189#undef CONFIG_CMD_FPGA
190#undef CONFIG_CMD_SETGETDCR
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200191#ifdef CONFIG_SYS_USE_NAND
Sergey Kubushync74b2102007-08-10 20:26:18 +0200192#undef CONFIG_CMD_FLASH
193#undef CONFIG_CMD_IMLS
194#define CONFIG_CMD_NAND
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195#elif defined(CONFIG_SYS_USE_NOR)
Sergey Kubushync74b2102007-08-10 20:26:18 +0200196#define CONFIG_CMD_JFFS2
197#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198#error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!"
Sergey Kubushync74b2102007-08-10 20:26:18 +0200199#endif
Thomas Abraham20cc0662009-01-04 09:41:20 +0530200/*==========================*/
201/* USB MSC support (if any) */
202/*==========================*/
203#ifdef CONFIG_USB_DAVINCI
204#define CONFIG_CMD_USB
205#ifdef CONFIG_MUSB_HCD
206#define CONFIG_USB_STORAGE
207#define CONFIG_CMD_STORAGE
208#define CONFIG_CMD_FAT
209#define CONFIG_DOS_PARTITION
210#endif
211#ifdef CONFIG_USB_KEYBOARD
212#define CONFIG_SYS_USB_EVENT_POLL
213#define CONFIG_PREBOOT "usb start"
214#endif
215#endif
Sandeep Paulrajaac0b4b2010-12-11 10:47:30 -0500216
217#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
218
219#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
220#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
221#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
222 CONFIG_SYS_INIT_RAM_SIZE - \
223 GENERATED_GBL_DATA_SIZE)
224
Sergey Kubushync74b2102007-08-10 20:26:18 +0200225#endif /* __CONFIG_H */