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Matthew Fettke545c8e02008-01-24 14:02:32 -06001/*
2 * Configuation settings for the Motorola MC5275EVB board.
3 *
4 * By Arthur Shipkowski <art@videon-central.com>
5 * Copyright (C) 2005 Videon Central, Inc.
6 *
7 * Based off of M5272C3 board code by Josef Baumgartner
8 * <josef.baumgartner@telex.de>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29/*
30 * board/config.h - configuration options, board specific
31 */
32
33#ifndef _M5275EVB_H
34#define _M5275EVB_H
35
36/*
37 * High Level Configuration Options
38 * (easy to change)
39 */
40#define CONFIG_MCF52x2 /* define processor family */
41#define CONFIG_M5275 /* define processor type */
42#define CONFIG_M5275EVB /* define board type */
43
44#define CONFIG_MCFTMR
45
46#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020047#define CONFIG_SYS_UART_PORT (0)
TsiChung Liew79e07992008-08-15 16:50:07 +000048#define CONFIG_BAUDRATE 115200
Matthew Fettke545c8e02008-01-24 14:02:32 -060049
50/* Configuration for environment
51 * Environment is embedded in u-boot in the second sector of the flash
52 */
53#ifndef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020054#define CONFIG_ENV_OFFSET 0x4000
55#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020056#define CONFIG_ENV_IS_IN_FLASH 1
Matthew Fettke545c8e02008-01-24 14:02:32 -060057#else
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020058#define CONFIG_ENV_ADDR 0xffe04000
59#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020060#define CONFIG_ENV_IS_IN_FLASH 1
Matthew Fettke545c8e02008-01-24 14:02:32 -060061#endif
62
63/*
64 * BOOTP options
65 */
66#define CONFIG_BOOTP_BOOTFILESIZE
67#define CONFIG_BOOTP_BOOTPATH
68#define CONFIG_BOOTP_GATEWAY
69#define CONFIG_BOOTP_HOSTNAME
70
71/* Available command configuration */
72#include <config_cmd_default.h>
73
TsiChung Liewdd9f0542010-03-11 22:12:53 -060074#define CONFIG_CMD_CACHE
Matthew Fettke545c8e02008-01-24 14:02:32 -060075#define CONFIG_CMD_PING
76#define CONFIG_CMD_MII
77#define CONFIG_CMD_NET
78#define CONFIG_CMD_ELF
79#define CONFIG_CMD_FLASH
80#define CONFIG_CMD_I2C
81#define CONFIG_CMD_MEMORY
82#define CONFIG_CMD_DHCP
83
84#undef CONFIG_CMD_LOADS
85#undef CONFIG_CMD_LOADB
86
87#define CONFIG_MCFFEC
88#ifdef CONFIG_MCFFEC
Matthew Fettke545c8e02008-01-24 14:02:32 -060089#define CONFIG_MII 1
TsiChung Liew0f3ba7e2008-03-30 01:22:13 -050090#define CONFIG_MII_INIT 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091#define CONFIG_SYS_DISCOVER_PHY
92#define CONFIG_SYS_RX_ETH_BUFFER 8
93#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
94#define CONFIG_SYS_FEC0_PINMUX 0
95#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
96#define CONFIG_SYS_FEC1_PINMUX 0
97#define CONFIG_SYS_FEC1_MIIBASE CONFIG_SYS_FEC1_IOBASE
Matthew Fettke545c8e02008-01-24 14:02:32 -060098#define MCFFEC_TOUT_LOOP 50000
99#define CONFIG_HAS_ETH1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200100/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
101#ifndef CONFIG_SYS_DISCOVER_PHY
Matthew Fettke545c8e02008-01-24 14:02:32 -0600102#define FECDUPLEX FULL
103#define FECSPEED _100BASET
104#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200105#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
106#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
Matthew Fettke545c8e02008-01-24 14:02:32 -0600107#endif
108#endif
109#endif
110
111/* I2C */
112#define CONFIG_FSL_I2C
113#define CONFIG_HARD_I2C /* I2C with hw support */
114#undef CONFIG_SOFT_I2C
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_I2C_SPEED 80000
116#define CONFIG_SYS_I2C_SLAVE 0x7F
117#define CONFIG_SYS_I2C_OFFSET 0x00000300
118#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
119#define CONFIG_SYS_I2C_PINMUX_REG (gpio_reg->par_feci2c)
120#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFF0)
121#define CONFIG_SYS_I2C_PINMUX_SET (0x000F)
Matthew Fettke545c8e02008-01-24 14:02:32 -0600122
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200123#define CONFIG_SYS_PROMPT "-> "
124#define CONFIG_SYS_LONGHELP /* undef to save memory */
Matthew Fettke545c8e02008-01-24 14:02:32 -0600125
126#if (CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127# define CONFIG_SYS_CBSIZE 1024
Matthew Fettke545c8e02008-01-24 14:02:32 -0600128#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129# define CONFIG_SYS_CBSIZE 256
Matthew Fettke545c8e02008-01-24 14:02:32 -0600130#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200131#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
132#define CONFIG_SYS_MAXARGS 16
133#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Matthew Fettke545c8e02008-01-24 14:02:32 -0600134
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#define CONFIG_SYS_LOAD_ADDR 0x800000
Matthew Fettke545c8e02008-01-24 14:02:32 -0600136
137#define CONFIG_BOOTDELAY 5
138#define CONFIG_BOOTCOMMAND "bootm ffe40000"
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200139#define CONFIG_SYS_MEMTEST_START 0x400
140#define CONFIG_SYS_MEMTEST_END 0x380000
Matthew Fettke545c8e02008-01-24 14:02:32 -0600141
TsiChung Liew0e8a7552010-03-10 16:33:03 -0600142#ifdef CONFIG_MCFFEC
143# define CONFIG_NET_RETRY_COUNT 5
144# define CONFIG_OVERWRITE_ETHADDR_ONCE
145#endif /* FEC_ENET */
146
147#define CONFIG_EXTRA_ENV_SETTINGS \
148 "netdev=eth0\0" \
149 "loadaddr=10000\0" \
150 "uboot=u-boot.bin\0" \
151 "load=tftp ${loadaddr} ${uboot}\0" \
152 "upd=run load; run prog\0" \
153 "prog=prot off ffe00000 ffe3ffff;" \
154 "era ffe00000 ffe3ffff;" \
155 "cp.b ${loadaddr} ffe00000 ${filesize};"\
156 "save\0" \
157 ""
158
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200159#define CONFIG_SYS_HZ 1000
160#define CONFIG_SYS_CLK 150000000
Matthew Fettke545c8e02008-01-24 14:02:32 -0600161
162/*
163 * Low Level Configuration Settings
164 * (address mappings, register initial values, etc.)
165 * You should know what you are doing if you make changes here.
166 */
167
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168#define CONFIG_SYS_MBAR 0x40000000
Matthew Fettke545c8e02008-01-24 14:02:32 -0600169
170/*-----------------------------------------------------------------------
171 * Definitions for initial stack pointer and data area (in DPRAM)
172 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200173#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk553f0982010-10-26 13:32:32 +0200174#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200175#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200176#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Matthew Fettke545c8e02008-01-24 14:02:32 -0600177
178/*-----------------------------------------------------------------------
179 * Start addresses for the final memory configuration
180 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
Matthew Fettke545c8e02008-01-24 14:02:32 -0600182 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#define CONFIG_SYS_SDRAM_BASE 0x00000000
184#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
TsiChung Liew012522f2008-10-21 10:03:07 +0000185#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
Matthew Fettke545c8e02008-01-24 14:02:32 -0600186
187#ifdef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#define CONFIG_SYS_MONITOR_BASE 0x20000
Matthew Fettke545c8e02008-01-24 14:02:32 -0600189#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200190#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
Matthew Fettke545c8e02008-01-24 14:02:32 -0600191#endif
192
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200193#define CONFIG_SYS_MONITOR_LEN 0x20000
194#define CONFIG_SYS_MALLOC_LEN (256 << 10)
195#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
Matthew Fettke545c8e02008-01-24 14:02:32 -0600196
197/*
198 * For booting Linux, the board info and command line data
199 * have to be in the first 8 MB of memory, since this is
200 * the maximum mapped by the Linux kernel during initialization ??
201 */
TsiChung Liewd6e4baf2009-01-27 12:57:47 +0000202#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
203#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
Matthew Fettke545c8e02008-01-24 14:02:32 -0600204
205/*-----------------------------------------------------------------------
206 * FLASH organization
207 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200208#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
209#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
210#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
Matthew Fettke545c8e02008-01-24 14:02:32 -0600211
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212#define CONFIG_SYS_FLASH_CFI 1
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200213#define CONFIG_FLASH_CFI_DRIVER 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200214#define CONFIG_SYS_FLASH_SIZE 0x200000
Matthew Fettke545c8e02008-01-24 14:02:32 -0600215
216/*-----------------------------------------------------------------------
217 * Cache Configuration
218 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200219#define CONFIG_SYS_CACHELINE_SIZE 16
Matthew Fettke545c8e02008-01-24 14:02:32 -0600220
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600221#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk553f0982010-10-26 13:32:32 +0200222 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600223#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk553f0982010-10-26 13:32:32 +0200224 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600225#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
226#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
227 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
228 CF_ACR_EN | CF_ACR_SM_ALL)
229#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
230 CF_CACR_DISD | CF_CACR_INVI | \
231 CF_CACR_CEIB | CF_CACR_DCM | \
232 CF_CACR_EUSP)
233
Matthew Fettke545c8e02008-01-24 14:02:32 -0600234/*-----------------------------------------------------------------------
235 * Memory bank definitions
236 */
TsiChung Liew012522f2008-10-21 10:03:07 +0000237#define CONFIG_SYS_CS0_BASE 0xffe00000
238#define CONFIG_SYS_CS0_CTRL 0x00001980
239#define CONFIG_SYS_CS0_MASK 0x001F0001
Matthew Fettke545c8e02008-01-24 14:02:32 -0600240
TsiChung Liew012522f2008-10-21 10:03:07 +0000241#define CONFIG_SYS_CS1_BASE 0x30000000
242#define CONFIG_SYS_CS1_CTRL 0x00001900
243#define CONFIG_SYS_CS1_MASK 0x00070001
Matthew Fettke545c8e02008-01-24 14:02:32 -0600244
245/*-----------------------------------------------------------------------
246 * Port configuration
247 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200248#define CONFIG_SYS_FECI2C 0x0FA0
Matthew Fettke545c8e02008-01-24 14:02:32 -0600249
250#endif /* _M5275EVB_H */