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Kumar Galac916d7c2011-04-13 08:37:44 -05001/*
Roy Zang111fd192012-10-08 07:44:21 +00002 * Copyright 2009-2012 Freescale Semiconductor, Inc.
Kumar Galac916d7c2011-04-13 08:37:44 -05003 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#ifndef __FM_ETH_H__
21#define __FM_ETH_H__
22
23#include <common.h>
24#include <asm/types.h>
25#include <asm/fsl_enet.h>
26
27enum fm_port {
28 FM1_DTSEC1,
29 FM1_DTSEC2,
30 FM1_DTSEC3,
31 FM1_DTSEC4,
32 FM1_DTSEC5,
York Sun9e758752012-10-08 07:44:19 +000033 FM1_DTSEC6,
34 FM1_DTSEC9,
35 FM1_DTSEC10,
Kumar Galac916d7c2011-04-13 08:37:44 -050036 FM1_10GEC1,
York Sun9e758752012-10-08 07:44:19 +000037 FM1_10GEC2,
Kumar Galac916d7c2011-04-13 08:37:44 -050038 FM2_DTSEC1,
39 FM2_DTSEC2,
40 FM2_DTSEC3,
41 FM2_DTSEC4,
Timur Tabi99abf7d2012-08-14 06:47:21 +000042 FM2_DTSEC5,
York Sun9e758752012-10-08 07:44:19 +000043 FM2_DTSEC6,
44 FM2_DTSEC9,
45 FM2_DTSEC10,
Kumar Galac916d7c2011-04-13 08:37:44 -050046 FM2_10GEC1,
York Sun9e758752012-10-08 07:44:19 +000047 FM2_10GEC2,
Kumar Galac916d7c2011-04-13 08:37:44 -050048 NUM_FM_PORTS,
49};
50
51enum fm_eth_type {
52 FM_ETH_1G_E,
53 FM_ETH_10G_E,
54};
55
Roy Zang111fd192012-10-08 07:44:21 +000056#ifdef CONFIG_SYS_FMAN_V3
57#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfc000)
58#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfd000)
59#define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfc000)
60#define CONFIG_SYS_FM2_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfd000)
61#else
Kumar Galac916d7c2011-04-13 08:37:44 -050062#define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xe1120)
63#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xf1000)
Roy Zang111fd192012-10-08 07:44:21 +000064#endif
Kumar Galac916d7c2011-04-13 08:37:44 -050065
66#define DEFAULT_FM_MDIO_NAME "FSL_MDIO0"
67#define DEFAULT_FM_TGEC_MDIO_NAME "FM_TGEC_MDIO"
68
69/* Fman ethernet info struct */
70#define FM_ETH_INFO_INITIALIZER(idx, pregs) \
71 .fm = idx, \
72 .phy_regs = (void *)pregs, \
73 .enet_if = PHY_INTERFACE_MODE_NONE, \
74
Roy Zang111fd192012-10-08 07:44:21 +000075#ifdef CONFIG_SYS_FMAN_V3
76#define FM_DTSEC_INFO_INITIALIZER(idx, n) \
77{ \
78 FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC_MDIO_ADDR) \
79 .index = idx, \
80 .num = n - 1, \
81 .type = FM_ETH_1G_E, \
82 .port = FM##idx##_DTSEC##n, \
83 .rx_port_id = RX_PORT_1G_BASE + n - 1, \
84 .tx_port_id = TX_PORT_1G_BASE + n - 1, \
85 .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
86 offsetof(struct ccsr_fman, memac[n-1]),\
87}
88
89#define FM_TGEC_INFO_INITIALIZER(idx, n) \
90{ \
91 FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \
92 .index = idx, \
93 .num = n - 1, \
94 .type = FM_ETH_10G_E, \
95 .port = FM##idx##_10GEC##n, \
96 .rx_port_id = RX_PORT_10G_BASE + n - 1, \
97 .tx_port_id = TX_PORT_10G_BASE + n - 1, \
98 .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
99 offsetof(struct ccsr_fman, memac[n-1]),\
100}
101#else
Kumar Galac916d7c2011-04-13 08:37:44 -0500102#define FM_DTSEC_INFO_INITIALIZER(idx, n) \
103{ \
104 FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR) \
105 .index = idx, \
106 .num = n - 1, \
107 .type = FM_ETH_1G_E, \
108 .port = FM##idx##_DTSEC##n, \
109 .rx_port_id = RX_PORT_1G_BASE + n - 1, \
110 .tx_port_id = TX_PORT_1G_BASE + n - 1, \
111 .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
112 offsetof(struct ccsr_fman, mac_1g[n-1]),\
113}
114
115#define FM_TGEC_INFO_INITIALIZER(idx, n) \
116{ \
117 FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR) \
118 .index = idx, \
119 .num = n - 1, \
120 .type = FM_ETH_10G_E, \
121 .port = FM##idx##_10GEC##n, \
122 .rx_port_id = RX_PORT_10G_BASE + n - 1, \
123 .tx_port_id = TX_PORT_10G_BASE + n - 1, \
124 .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \
125 offsetof(struct ccsr_fman, mac_10g[n-1]),\
126}
Roy Zang111fd192012-10-08 07:44:21 +0000127#endif
Kumar Galac916d7c2011-04-13 08:37:44 -0500128struct fm_eth_info {
129 u8 enabled;
130 u8 fm;
131 u8 num;
132 u8 phy_addr;
133 int index;
134 u16 rx_port_id;
135 u16 tx_port_id;
136 enum fm_port port;
137 enum fm_eth_type type;
138 void *phy_regs;
139 phy_interface_t enet_if;
140 u32 compat_offset;
141 struct mii_dev *bus;
142};
143
144struct tgec_mdio_info {
145 struct tgec_mdio_controller *regs;
146 char *name;
147};
148
Roy Zang111fd192012-10-08 07:44:21 +0000149struct memac_mdio_info {
150 struct memac_mdio_controller *regs;
151 char *name;
152};
153
Kumar Galac916d7c2011-04-13 08:37:44 -0500154int fm_tgec_mdio_init(bd_t *bis, struct tgec_mdio_info *info);
Roy Zang111fd192012-10-08 07:44:21 +0000155int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info);
156
Kumar Galac916d7c2011-04-13 08:37:44 -0500157int fm_standard_init(bd_t *bis);
158void fman_enet_init(void);
159void fdt_fixup_fman_ethernet(void *fdt);
160phy_interface_t fm_info_get_enet_if(enum fm_port port);
161void fm_info_set_phy_address(enum fm_port port, int address);
Timur Tabiae2291f2012-08-14 06:47:22 +0000162int fm_info_get_phy_address(enum fm_port port);
Kumar Galac916d7c2011-04-13 08:37:44 -0500163void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus);
Kumar Gala69a85242011-09-14 12:01:35 -0500164void fm_disable_port(enum fm_port port);
Kumar Galac916d7c2011-04-13 08:37:44 -0500165
166#endif