blob: 43896723a994c5aa37fbbdb45670ba3e9f25bde2 [file] [log] [blame]
Icenowy Zhengce2b6c42022-01-29 10:23:08 -05001// SPDX-License-Identifier: (GPL-2.0+ OR X11)
2/*
3 * Copyright 2018 Icenowy Zheng <icenowy@aosc.io>
4 */
5
6/dts-v1/;
7#include "suniv-f1c100s.dtsi"
8
Andre Przywara57285732023-04-02 01:17:07 +01009#include <dt-bindings/gpio/gpio.h>
10
Icenowy Zhengce2b6c42022-01-29 10:23:08 -050011/ {
12 model = "Lichee Pi Nano";
13 compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";
14
15 aliases {
Andre Przywarad037e792022-04-26 01:15:25 +010016 mmc0 = &mmc0;
Icenowy Zhengce2b6c42022-01-29 10:23:08 -050017 serial0 = &uart0;
Andre Przywarad037e792022-04-26 01:15:25 +010018 spi0 = &spi0;
Icenowy Zhengce2b6c42022-01-29 10:23:08 -050019 };
20
21 chosen {
22 stdout-path = "serial0:115200n8";
23 };
Andre Przywarad037e792022-04-26 01:15:25 +010024
25 reg_vcc3v3: vcc3v3 {
26 compatible = "regulator-fixed";
27 regulator-name = "vcc3v3";
28 regulator-min-microvolt = <3300000>;
29 regulator-max-microvolt = <3300000>;
30 };
31};
32
33&mmc0 {
34 broken-cd;
35 bus-width = <4>;
36 disable-wp;
37 status = "okay";
38 vmmc-supply = <&reg_vcc3v3>;
39};
40
41&spi0 {
42 pinctrl-names = "default";
43 pinctrl-0 = <&spi0_pc_pins>;
44 status = "okay";
45
46 flash@0 {
47 #address-cells = <1>;
48 #size-cells = <1>;
49 compatible = "winbond,w25q128", "jedec,spi-nor";
50 reg = <0>;
51 spi-max-frequency = <40000000>;
52 };
Icenowy Zhengce2b6c42022-01-29 10:23:08 -050053};
54
Andre Przywara57285732023-04-02 01:17:07 +010055&otg_sram {
56 status = "okay";
57};
58
Icenowy Zhengce2b6c42022-01-29 10:23:08 -050059&uart0 {
60 pinctrl-names = "default";
61 pinctrl-0 = <&uart0_pe_pins>;
62 status = "okay";
63};
Andre Przywara57285732023-04-02 01:17:07 +010064
65&usb_otg {
66 dr_mode = "otg";
67 status = "okay";
68};
69
70&usbphy {
71 usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
72 status = "okay";
73};