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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
TsiChungLiew4a442d32007-08-16 19:23:50 -05002/*
3 * Configuation settings for the Freescale MCF5329 FireEngine board.
4 *
5 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiew4a442d32007-08-16 19:23:50 -05007 */
8
9/*
10 * board/config.h - configuration options, board specific
11 */
12
13#ifndef _M5235EVB_H
14#define _M5235EVB_H
15
16/*
17 * High Level Configuration Options
18 * (easy to change)
19 */
TsiChungLiew4a442d32007-08-16 19:23:50 -050020
Tom Rini65cc0e22022-11-16 13:10:41 -050021#define CFG_SYS_UART_PORT (0)
TsiChungLiew4a442d32007-08-16 19:23:50 -050022
TsiChungLiew4a442d32007-08-16 19:23:50 -050023/* I2C */
Tom Rini65cc0e22022-11-16 13:10:41 -050024#define CFG_SYS_I2C_PINMUX_REG (gpio->par_qspi)
25#define CFG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
26#define CFG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)
TsiChungLiew4a442d32007-08-16 19:23:50 -050027
Patrick Delaunayff07cc92021-10-04 11:59:50 +020028/* this must be included AFTER the definition of CONFIG COMMANDS (if any) */
TsiChungLiew4a442d32007-08-16 19:23:50 -050029
Tom Rini0613c362022-12-04 10:03:50 -050030#define CFG_EXTRA_ENV_SETTINGS \
TsiChungLiew4a442d32007-08-16 19:23:50 -050031 "netdev=eth0\0" \
32 "loadaddr=10000\0" \
33 "u-boot=u-boot.bin\0" \
34 "load=tftp ${loadaddr) ${u-boot}\0" \
35 "upd=run load; run prog\0" \
36 "prog=prot off ffe00000 ffe3ffff;" \
37 "era ffe00000 ffe3ffff;" \
38 "cp.b ${loadaddr} ffe00000 ${filesize};"\
39 "save\0" \
40 ""
41
Tom Rini7c5c1372022-12-04 10:13:37 -050042#define CFG_PRAM 512 /* 512 KB */
TsiChungLiew4a442d32007-08-16 19:23:50 -050043
Tom Rini65cc0e22022-11-16 13:10:41 -050044#define CFG_SYS_CLK 75000000
45#define CFG_SYS_CPU_CLK CFG_SYS_CLK * 2
TsiChungLiew4a442d32007-08-16 19:23:50 -050046
Tom Rini65cc0e22022-11-16 13:10:41 -050047#define CFG_SYS_MBAR 0x40000000
TsiChungLiew4a442d32007-08-16 19:23:50 -050048
49/*
50 * Low Level Configuration Settings
51 * (address mappings, register initial values, etc.)
52 * You should know what you are doing if you make changes here.
53 */
54/*-----------------------------------------------------------------------
55 * Definitions for initial stack pointer and data area (in DPRAM)
56 */
Tom Rini65cc0e22022-11-16 13:10:41 -050057#define CFG_SYS_INIT_RAM_ADDR 0x20000000
58#define CFG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
59#define CFG_SYS_INIT_RAM_CTRL 0x21
TsiChungLiew4a442d32007-08-16 19:23:50 -050060
61/*-----------------------------------------------------------------------
62 * Start addresses for the final memory configuration
63 * (Set up by the startup code)
Tom Riniaa6e94d2022-11-16 13:10:37 -050064 * Please note that CFG_SYS_SDRAM_BASE _must_ start at 0
TsiChungLiew4a442d32007-08-16 19:23:50 -050065 */
Tom Riniaa6e94d2022-11-16 13:10:37 -050066#define CFG_SYS_SDRAM_BASE 0x00000000
67#define CFG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
TsiChungLiew4a442d32007-08-16 19:23:50 -050068
TsiChungLiew4a442d32007-08-16 19:23:50 -050069/*
70 * For booting Linux, the board info and command line data
71 * have to be in the first 8 MB of memory, since this is
72 * the maximum mapped by the Linux kernel during initialization ??
73 */
74/* Initial Memory map for Linux */
Tom Rini65cc0e22022-11-16 13:10:41 -050075#define CFG_SYS_BOOTMAPSZ (CFG_SYS_SDRAM_BASE + (CFG_SYS_SDRAM_SIZE << 20))
TsiChungLiew4a442d32007-08-16 19:23:50 -050076
77/*-----------------------------------------------------------------------
78 * FLASH organization
79 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020080#ifdef CONFIG_SYS_FLASH_CFI
Tom Rini65cc0e22022-11-16 13:10:41 -050081# define CFG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
TsiChungLiew4a442d32007-08-16 19:23:50 -050082#endif
83
Tom Rini65cc0e22022-11-16 13:10:41 -050084#define CFG_SYS_FLASH_BASE (CFG_SYS_CS0_BASE)
TsiChungLiew4a442d32007-08-16 19:23:50 -050085
86/* Configuration for environment
87 * Environment is embedded in u-boot in the second sector of the flash
88 */
angelo@sysam.it5296cb12015-03-29 22:54:16 +020089
90#define LDS_BOARD_TEXT \
91 . = DEFINED(env_offset) ? env_offset : .; \
Simon Glass0649cd02017-08-03 12:21:49 -060092 env/embedded.o(.text);
angelo@sysam.it5296cb12015-03-29 22:54:16 +020093
TsiChungLiew4a442d32007-08-16 19:23:50 -050094/*-----------------------------------------------------------------------
95 * Cache Configuration
96 */
TsiChungLiew4a442d32007-08-16 19:23:50 -050097
Tom Rini65cc0e22022-11-16 13:10:41 -050098#define ICACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
99 CFG_SYS_INIT_RAM_SIZE - 8)
100#define DCACHE_STATUS (CFG_SYS_INIT_RAM_ADDR + \
101 CFG_SYS_INIT_RAM_SIZE - 4)
102#define CFG_SYS_ICACHE_INV (CF_CACR_CINV)
103#define CFG_SYS_CACHE_ACR0 (CFG_SYS_SDRAM_BASE | \
Tom Riniaa6e94d2022-11-16 13:10:37 -0500104 CF_ADDRMASK(CFG_SYS_SDRAM_SIZE) | \
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600105 CF_ACR_EN | CF_ACR_SM_ALL)
Tom Rini65cc0e22022-11-16 13:10:41 -0500106#define CFG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \
TsiChung Liewdd9f0542010-03-11 22:12:53 -0600107 CF_CACR_CEIB | CF_CACR_DCM | \
108 CF_CACR_EUSP)
109
TsiChungLiew4a442d32007-08-16 19:23:50 -0500110/*-----------------------------------------------------------------------
111 * Chipselect bank definitions
112 */
113/*
114 * CS0 - NOR Flash 1, 2, 4, or 8MB
115 * CS1 - Available
116 * CS2 - Available
117 * CS3 - Available
118 * CS4 - Available
119 * CS5 - Available
120 * CS6 - Available
121 * CS7 - Available
122 */
Tom Rinid4a2c402022-03-24 17:18:04 -0400123#ifdef CONFIG_NORFLASH_PS32BIT
Tom Rini65cc0e22022-11-16 13:10:41 -0500124# define CFG_SYS_CS0_BASE 0xFFC00000
125# define CFG_SYS_CS0_MASK 0x003f0001
126# define CFG_SYS_CS0_CTRL 0x00001D00
TsiChungLiew4a442d32007-08-16 19:23:50 -0500127#else
Tom Rini65cc0e22022-11-16 13:10:41 -0500128# define CFG_SYS_CS0_BASE 0xFFE00000
129# define CFG_SYS_CS0_MASK 0x001f0001
130# define CFG_SYS_CS0_CTRL 0x00001D80
TsiChungLiew4a442d32007-08-16 19:23:50 -0500131#endif
132
133#endif /* _M5329EVB_H */