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Wolfgang Denk99b0d282005-10-05 00:19:34 +02001/*
2 * Rick Bronson <rick@efn.org>
3 *
4 * Configuation settings for the AT91RM9200DK board.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/*
26 * Adatped for KwikByte KB920x board from at91rm9200dk.h: 22APR2005
27 */
28
29#ifndef __CONFIG_H
30#define __CONFIG_H
31
32/* ARM asynchronous clock */
33#define AT91C_MAIN_CLOCK 180000000 /* from 10 MHz crystal */
34#define AT91C_MASTER_CLOCK 60000000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
35
36#define AT91_SLOW_CLOCK 32768 /* slow clock */
37
38#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
39#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
40/* Only define one of the following, based on board type */
41/* #define CONFIG_KB9200 1 KwikByte KB9202 board */
42/* #define CONFIG_KB9201 1 KwikByte KB9202 board */
43#define CONFIG_KB9202 1 /* KwikByte KB9202 board */
44
45#define CONFIG_KB920x 1 /* Any KB920x board */
46#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
47#define USE_920T_MMU 1
48
49#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
50#define CONFIG_SETUP_MEMORY_TAGS 1
51#define CONFIG_INITRD_TAG 1
52
53#define CONFIG_SKIP_LOWLEVEL_INIT
Jens Scharsig80523522008-11-18 10:48:46 +010054#define CONFIG_SKIP_RELOCATE_UBOOT /* undef this for direct boot from */
55 /* NOR flash without preloader */
Wolfgang Denk99b0d282005-10-05 00:19:34 +020056
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057#define CONFIG_SYS_LONGHELP
Wolfgang Denk99b0d282005-10-05 00:19:34 +020058
Wolfgang Denkb83dcc12008-05-04 21:34:23 +020059#ifndef roundup
60#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
61#endif
Wolfgang Denk99b0d282005-10-05 00:19:34 +020062/*
63 * Size of malloc() pool
64 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020065#define CONFIG_SYS_MALLOC_LEN (roundup(CONFIG_ENV_SIZE,4096) + 128*1024)
66#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
Wolfgang Denk99b0d282005-10-05 00:19:34 +020067
68#define CONFIG_BAUDRATE 115200
69
70/*
71 * Hardware drivers
72 */
73
74/* define one of these to choose the DBGU, USART0 or USART1 as console */
Jean-Christophe PLAGNIOL-VILLARDbeebd852009-03-27 23:26:43 +010075#define CONFIG_AT91RM9200_USART
Wolfgang Denk99b0d282005-10-05 00:19:34 +020076#define CONFIG_DBGU
77#undef CONFIG_USART0
78#undef CONFIG_USART1
79
80#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
81
82#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
83
84#define CONFIG_BOOTDELAY 3
85#define CONFIG_ENV_OVERWRITE 1
86
Wolfgang Denk99b0d282005-10-05 00:19:34 +020087
Jon Loeligerbc234c12007-07-04 22:32:51 -050088/*
Jon Loeliger7f5c0152007-07-10 09:38:02 -050089 * BOOTP options
90 */
91#define CONFIG_BOOTP_BOOTFILESIZE
92#define CONFIG_BOOTP_BOOTPATH
93#define CONFIG_BOOTP_GATEWAY
94#define CONFIG_BOOTP_HOSTNAME
95
96
97/*
Jon Loeligerbc234c12007-07-04 22:32:51 -050098 * Command line configuration.
99 */
100#include <config_cmd_default.h>
101
102#define CONFIG_CMD_I2C
103#define CONFIG_CMD_PING
104#define CONFIG_CMD_DHCP
105
106#undef CONFIG_CMD_BDI
107#undef CONFIG_CMD_FPGA
108#undef CONFIG_CMD_MISC
109
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200110
111#define CONFIG_NR_DRAM_BANKS 1
112#define PHYS_SDRAM 0x20000000
113#define PHYS_SDRAM_SIZE 0x2000000 /* 32 megs */
114
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200115#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
116#define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + PHYS_SDRAM_SIZE - (512*1024)
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200117
Jens Scharsigc041e9d2010-01-23 12:03:45 +0100118#define CONFIG_NET_MULTI 1
119#ifdef CONFIG_NET_MULTI
120#define CONFIG_DRIVER_AT91EMAC 1
121#define CONFIG_SYS_RX_ETH_BUFFER 8
122#else
123#define CONFIG_DRIVER_ETHER 1
124#endif
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200125#define CONFIG_NET_RETRY_COUNT 20
126
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127#define CONFIG_SYS_FLASH_BASE 0x10000000
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200128
129#ifdef CONFIG_KB9202
130#define PHYS_FLASH_SIZE 0x1000000
131#else
132#define PHYS_FLASH_SIZE 0x200000
133#endif
134
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#define CONFIG_SYS_MAX_FLASH_BANKS 1
136#define CONFIG_SYS_MAX_FLASH_SECT 256
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200137
138#define CONFIG_HARD_I2C
139
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +0200140#define CONFIG_ENV_IS_IN_EEPROM
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200141
142#ifdef CONFIG_KB9202
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200143#define CONFIG_ENV_OFFSET 0x3E00
144#define CONFIG_ENV_SIZE 0x0200
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200145#else
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200146#define CONFIG_ENV_OFFSET 0x1000
147#define CONFIG_ENV_SIZE 0x1000
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200148#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
150#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
151#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
152#define CONFIG_SYS_I2C_SPEED 50000
153#define CONFIG_SYS_I2C_SLAVE 0 /* not used */
154#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200155
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200157
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200159
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200160#define CONFIG_SYS_PROMPT "U-Boot> " /* Monitor Command Prompt */
161#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
162#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
163#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200164
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200165#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200166#define CONFIG_SYS_FLASH_CFI
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200167
168#ifndef __ASSEMBLY__
169/*-----------------------------------------------------------------------
170 * Board specific extension for bd_info
171 *
172 * This structure is embedded in the global bd_info (bd_t) structure
173 * and can be used by the board specific code (eg board/...)
174 */
175
176struct bd_info_ext {
177 /* helper variable for board environment handling
178 *
179 * env_crc_valid == 0 => uninitialised
180 * env_crc_valid > 0 => environment crc in flash is valid
181 * env_crc_valid < 0 => environment crc in flash is invalid
182 */
183 int env_crc_valid;
184};
185#endif
186
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200187#define CONFIG_SYS_HZ 1000
188#define CONFIG_SYS_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
Wolfgang Denk99b0d282005-10-05 00:19:34 +0200189 /* AT91C_TC_TIMER_DIV1_CLOCK */
190
191#define CONFIG_STACKSIZE (32*1024) /* regular stack */
192
193#ifdef CONFIG_USE_IRQ
194#error CONFIG_USE_IRQ not supported
195#endif
196
197#endif