wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Support for indirect PCI bridges. |
| 3 | * |
| 4 | * Copyright (C) 1998 Gabriel Paubert. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <common.h> |
| 13 | |
| 14 | #ifdef CONFIG_PCI |
wdenk | ea909b7 | 2002-11-21 23:11:29 +0000 | [diff] [blame] | 15 | #ifndef __I386__ |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 16 | |
| 17 | #include <asm/processor.h> |
| 18 | #include <asm/io.h> |
| 19 | #include <pci.h> |
| 20 | |
| 21 | #define cfg_read(val, addr, type, op) *val = op((type)(addr)) |
| 22 | #define cfg_write(val, addr, type, op) op((type *)(addr), (val)) |
| 23 | |
wdenk | 5d232d0 | 2003-05-22 22:52:13 +0000 | [diff] [blame] | 24 | #if defined(CONFIG_MPC8260) |
wdenk | 4d75a50 | 2003-03-25 16:50:56 +0000 | [diff] [blame] | 25 | #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ |
| 26 | static int \ |
| 27 | indirect_##rw##_config_##size(struct pci_controller *hose, \ |
| 28 | pci_dev_t dev, int offset, type val) \ |
| 29 | { \ |
| 30 | out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ |
| 31 | sync(); \ |
| 32 | cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ |
| 33 | return 0; \ |
| 34 | } |
| 35 | #else |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 36 | #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ |
| 37 | static int \ |
| 38 | indirect_##rw##_config_##size(struct pci_controller *hose, \ |
| 39 | pci_dev_t dev, int offset, type val) \ |
| 40 | { \ |
| 41 | out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ |
| 42 | cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ |
| 43 | return 0; \ |
| 44 | } |
wdenk | 4d75a50 | 2003-03-25 16:50:56 +0000 | [diff] [blame] | 45 | #endif |
wdenk | affae2b | 2002-08-17 09:36:01 +0000 | [diff] [blame] | 46 | |
| 47 | #define INDIRECT_PCI_OP_ERRATA6(rw, size, type, op, mask) \ |
| 48 | static int \ |
| 49 | indirect_##rw##_config_##size(struct pci_controller *hose, \ |
| 50 | pci_dev_t dev, int offset, type val) \ |
| 51 | { \ |
| 52 | unsigned int msr = mfmsr(); \ |
| 53 | mtmsr(msr & ~(MSR_EE | MSR_CE)); \ |
| 54 | out_le32(hose->cfg_addr, dev | (offset & 0xfc) | 0x80000000); \ |
| 55 | cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ |
| 56 | out_le32(hose->cfg_addr, 0x00000000); \ |
| 57 | mtmsr(msr); \ |
| 58 | return 0; \ |
| 59 | } |
| 60 | |
| 61 | INDIRECT_PCI_OP(read, byte, u8 *, in_8, 3) |
| 62 | INDIRECT_PCI_OP(read, word, u16 *, in_le16, 2) |
| 63 | INDIRECT_PCI_OP(read, dword, u32 *, in_le32, 0) |
| 64 | #ifdef CONFIG_405GP |
| 65 | INDIRECT_PCI_OP_ERRATA6(write, byte, u8, out_8, 3) |
| 66 | INDIRECT_PCI_OP_ERRATA6(write, word, u16, out_le16, 2) |
| 67 | INDIRECT_PCI_OP_ERRATA6(write, dword, u32, out_le32, 0) |
| 68 | #else |
| 69 | INDIRECT_PCI_OP(write, byte, u8, out_8, 3) |
| 70 | INDIRECT_PCI_OP(write, word, u16, out_le16, 2) |
| 71 | INDIRECT_PCI_OP(write, dword, u32, out_le32, 0) |
| 72 | #endif |
| 73 | |
| 74 | void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data) |
| 75 | { |
| 76 | pci_set_ops(hose, |
| 77 | indirect_read_config_byte, |
| 78 | indirect_read_config_word, |
| 79 | indirect_read_config_dword, |
| 80 | indirect_write_config_byte, |
| 81 | indirect_write_config_word, |
| 82 | indirect_write_config_dword); |
| 83 | |
| 84 | hose->cfg_addr = (unsigned int *) cfg_addr; |
| 85 | hose->cfg_data = (unsigned char *) cfg_data; |
| 86 | } |
| 87 | |
| 88 | #endif |
wdenk | ea909b7 | 2002-11-21 23:11:29 +0000 | [diff] [blame] | 89 | #endif |