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wdenk7e7f3e32002-03-10 18:20:43 +00001#ifndef __BOARD_CPU86__
2#define __BOARD_CPU86__
3
4#include <config.h>
5
6#define REG8(x) (*(volatile unsigned char *)(x))
7
8/* CPU86 register definitions */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02009#define CPU86_VME_EAC REG8(CONFIG_SYS_BCRS_BASE + 0x00)
10#define CPU86_VME_SAC REG8(CONFIG_SYS_BCRS_BASE + 0x01)
11#define CPU86_VME_MAC REG8(CONFIG_SYS_BCRS_BASE + 0x02)
12#define CPU86_BCR REG8(CONFIG_SYS_BCRS_BASE + 0x03)
13#define CPU86_BSR REG8(CONFIG_SYS_BCRS_BASE + 0x04)
14#define CPU86_WDOG_RPORT REG8(CONFIG_SYS_BCRS_BASE + 0x05)
15#define CPU86_MBOX_IRQ REG8(CONFIG_SYS_BCRS_BASE + 0x04)
16#define CPU86_REV REG8(CONFIG_SYS_BCRS_BASE + 0x07)
17#define CPU86_VME_IRQMASK REG8(CONFIG_SYS_BCRS_BASE + 0x80)
18#define CPU86_VME_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x81)
19#define CPU86_LOCAL_IRQMASK REG8(CONFIG_SYS_BCRS_BASE + 0x82)
20#define CPU86_LOCAL_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x83)
21#define CPU86_PMCL_IRQSTATUS REG8(CONFIG_SYS_BCRS_BASE + 0x84)
wdenk7e7f3e32002-03-10 18:20:43 +000022
23/* Board Control Register bits */
24#define CPU86_BCR_FWPT 0x01
25#define CPU86_BCR_FWRE 0x02
26
27#endif /* __BOARD_CPU86__ */