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Angus Ainslie466a9ea2022-08-25 06:46:02 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2020 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include <dt-bindings/interrupt-controller/irq.h>
10#include "dt-bindings/pwm/pwm.h"
11#include "dt-bindings/usb/pd.h"
12#include "imx8mq.dtsi"
13
14/ {
15 model = "Purism Librem 5";
16 compatible = "purism,librem5", "fsl,imx8mq";
17
18 backlight_dsi: backlight-dsi {
19 compatible = "led-backlight";
20 leds = <&led_backlight>;
21 };
22
23 pmic_osc: clock-pmic {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <32768>;
27 clock-output-names = "pmic_osc";
28 };
29
30 chosen {
31 stdout-path = &uart1;
32 };
33
34 gpio-keys {
35 compatible = "gpio-keys";
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_keys>;
38
39 vol-down {
40 label = "VOL_DOWN";
41 gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_VOLUMEDOWN>;
43 debounce-interval = <50>;
44 };
45
46 vol-up {
47 label = "VOL_UP";
48 gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
49 linux,code = <KEY_VOLUMEUP>;
50 debounce-interval = <50>;
51 };
52 };
53
54 reg_aud_1v8: regulator-audio-1v8 {
55 compatible = "regulator-fixed";
56 pinctrl-names = "default";
57 pinctrl-0 = <&pinctrl_audiopwr>;
58 regulator-name = "AUDIO_PWR_EN";
59 regulator-min-microvolt = <1800000>;
60 regulator-max-microvolt = <1800000>;
61 gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
62 enable-active-high;
63 };
64
65 reg_gnss: regulator-gnss {
66 compatible = "regulator-fixed";
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_gnsspwr>;
69 regulator-name = "GNSS";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
72 gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;
73 enable-active-high;
74 };
75
76 reg_hub: regulator-hub {
77 compatible = "regulator-fixed";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pinctrl_hub_pwr>;
80 regulator-name = "HUB";
81 regulator-min-microvolt = <3300000>;
82 regulator-max-microvolt = <3300000>;
83 gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
84 enable-active-high;
85 };
86
87 reg_lcd_1v8: regulator-lcd-1v8 {
88 compatible = "regulator-fixed";
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_dsien>;
91 regulator-name = "LCD_1V8";
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 vin-supply = <&reg_vdd_1v8>;
95 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
96 enable-active-high;
97 /* Otherwise i2c3 is not functional */
98 regulator-always-on;
99 };
100
101 reg_lcd_3v4: regulator-lcd-3v4 {
102 compatible = "regulator-fixed";
103 regulator-name = "LCD_3V4";
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_dsibiasen>;
106 vin-supply = <&reg_vsys_3v4>;
107 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
108 enable-active-high;
109 };
110
111 reg_vdd_sen: regulator-vdd-sen {
112 compatible = "regulator-fixed";
113 regulator-name = "VDD_SEN";
114 regulator-min-microvolt = <3300000>;
115 regulator-max-microvolt = <3300000>;
116 };
117
118 reg_vdd_1v8: regulator-vdd-1v8 {
119 compatible = "regulator-fixed";
120 regulator-name = "VDD_1V8";
121 regulator-min-microvolt = <1800000>;
122 regulator-max-microvolt = <1800000>;
123 vin-supply = <&buck7_reg>;
124 };
125
126 reg_vdd_3v3: regulator-vdd-3v3 {
127 compatible = "regulator-fixed";
128 regulator-name = "VDD_3V3";
129 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <3300000>;
131 };
132
133 reg_vsys_3v4: regulator-vsys-3v4 {
134 compatible = "regulator-fixed";
135 regulator-name = "VSYS_3V4";
136 regulator-min-microvolt = <3400000>;
137 regulator-max-microvolt = <3400000>;
138 regulator-always-on;
139 };
140
141 reg_wifi_3v3: regulator-wifi-3v3 {
142 compatible = "regulator-fixed";
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_wifi_pwr>;
145 regulator-name = "3V3_WIFI";
146 regulator-min-microvolt = <3300000>;
147 regulator-max-microvolt = <3300000>;
148 gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
149 enable-active-high;
150 vin-supply = <&reg_vdd_3v3>;
151 };
152
153 sound {
154 compatible = "simple-audio-card";
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_hp>;
157 simple-audio-card,name = "Librem 5";
158 simple-audio-card,format = "i2s";
159 simple-audio-card,widgets =
160 "Headphone", "Headphones",
161 "Microphone", "Headset Mic",
162 "Microphone", "Digital Mic",
163 "Speaker", "Speaker";
164 simple-audio-card,routing =
165 "Headphones", "HPOUTL",
166 "Headphones", "HPOUTR",
167 "Speaker", "SPKOUTL",
168 "Speaker", "SPKOUTR",
169 "Headset Mic", "MICBIAS",
170 "IN3R", "Headset Mic",
171 "DMICDAT", "Digital Mic";
172 simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
173
174 simple-audio-card,cpu {
175 sound-dai = <&sai2>;
176 };
177
178 simple-audio-card,codec {
179 sound-dai = <&codec>;
180 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
181 frame-master;
182 bitclock-master;
183 };
184 };
185
186 sound-wwan {
187 compatible = "simple-audio-card";
188 simple-audio-card,name = "Modem";
189 simple-audio-card,format = "i2s";
190
191 simple-audio-card,cpu {
192 sound-dai = <&sai6>;
193 frame-inversion;
194 };
195
196 simple-audio-card,codec {
197 sound-dai = <&bm818_codec>;
198 frame-master;
199 bitclock-master;
200 };
201 };
202
203 usdhc2_pwrseq: pwrseq {
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;
206 compatible = "mmc-pwrseq-simple";
207 reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,
208 <&gpio4 29 GPIO_ACTIVE_HIGH>;
209 };
210
211 bm818_codec: sound-wwan-codec {
212 compatible = "broadmobi,bm818", "option,gtm601";
213 #sound-dai-cells = <0>;
214 };
215
216 vibrator {
217 compatible = "pwm-vibrator";
218 pwms = <&pwm1 0 1000000000 0>;
219 pwm-names = "enable";
220 vcc-supply = <&reg_vdd_3v3>;
221 };
222};
223
224&A53_0 {
225 cpu-supply = <&buck2_reg>;
226};
227
228&A53_1 {
229 cpu-supply = <&buck2_reg>;
230};
231
232&A53_2 {
233 cpu-supply = <&buck2_reg>;
234};
235
236&A53_3 {
237 cpu-supply = <&buck2_reg>;
238};
239
240&ddrc {
241 operating-points-v2 = <&ddrc_opp_table>;
242
243 ddrc_opp_table: opp-table {
244 compatible = "operating-points-v2";
245
246 opp-25M {
247 opp-hz = /bits/ 64 <25000000>;
248 };
249
250 opp-100M {
251 opp-hz = /bits/ 64 <100000000>;
252 };
253
254 opp-800M {
255 opp-hz = /bits/ 64 <800000000>;
256 };
257 };
258};
259
260&dphy {
261 status = "okay";
262};
263
264&ecspi1 {
265 pinctrl-names = "default";
266 pinctrl-0 = <&pinctrl_ecspi1>;
267 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
268 #address-cells = <1>;
269 #size-cells = <0>;
270 status = "okay";
271
272 nor_flash: flash@0 {
273 compatible = "jedec,spi-nor";
274 reg = <0>;
275 spi-max-frequency = <1000000>;
276 #address-cells = <1>;
277 #size-cells = <1>;
278
279 partition@0 {
280 label = "protected0";
281 reg = <0x0 0x30000>;
282 read-only;
283 };
284
285 partition@30000 {
286 label = "protected1";
287 reg = <0x30000 0x10000>;
288 read-only;
289 };
290
291 partition@40000 {
292 label = "rw";
293 reg = <0x40000 0x1C0000>;
294 };
295 };
296};
297
298&gpio1 {
299 pinctrl-names = "default";
300 pinctrl-0 = <&pinctrl_pmic_5v>;
301
302 pmic-5v-hog {
303 gpio-hog;
304 gpios = <1 GPIO_ACTIVE_HIGH>;
305 input;
306 lane-mapping = "pmic-5v";
307 };
308};
309
310&iomuxc {
311 pinctrl_audiopwr: audiopwrgrp {
312 fsl,pins = <
313 /* AUDIO_POWER_EN_3V3 */
314 MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x83
315 >;
316 };
317
318 pinctrl_bl: blgrp {
319 fsl,pins = <
320 /* BACKLINGE_EN */
321 MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x83
322 >;
323 };
324
325 pinctrl_bt: btgrp {
326 fsl,pins = <
327 /* BT_REG_ON */
328 MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x83
329 >;
330 };
331
332 pinctrl_charger_in: chargeringrp {
333 fsl,pins = <
334 /* CHRG_INT */
335 MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x80
336 /* CHG_STATUS_B */
337 MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x80
338 >;
339 };
340
341 pinctrl_dsibiasen: dsibiasengrp {
342 fsl,pins = <
343 /* DSI_BIAS_EN */
344 MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20 0x83
345 >;
346 };
347
348 pinctrl_dsien: dsiengrp {
349 fsl,pins = <
350 /* DSI_EN_3V3 */
351 MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x83
352 >;
353 };
354
355 pinctrl_dsirst: dsirstgrp {
356 fsl,pins = <
357 /* DSI_RST */
358 MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29 0x83
359 /* DSI_TE */
360 MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28 0x83
361 /* TP_RST */
362 MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24 0x83
363 >;
364 };
365
366 pinctrl_ecspi1: ecspigrp {
367 fsl,pins = <
368 MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x83
369 MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x83
370 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
371 MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x83
372 >;
373 };
374
375 pinctrl_gauge: gaugegrp {
376 fsl,pins = <
377 /* BAT_LOW */
378 MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x80
379 >;
380 };
381
382 pinctrl_gnsspwr: gnsspwrgrp {
383 fsl,pins = <
384 /* GPS3V3_EN */
385 MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x83
386 >;
387 };
388
389 pinctrl_haptic: hapticgrp {
390 fsl,pins = <
391 /* MOTO */
392 MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x83
393 >;
394 };
395
396 pinctrl_hp: hpgrp {
397 fsl,pins = <
398 /* HEADPHONE_DET_1V8 */
399 MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x180
400 >;
401 };
402
403 pinctrl_hub_pwr: hubpwrgrp {
404 fsl,pins = <
405 /* HUB_PWR_3V3_EN */
406 MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x83
407 >;
408 };
409
410 pinctrl_i2c1: i2c1grp {
411 fsl,pins = <
412 MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000026
413 MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000026
414 >;
415 };
416
417 pinctrl_i2c2: i2c2grp {
418 fsl,pins = <
419 MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000026
420 MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000026
421 >;
422 };
423
424 pinctrl_i2c3: i2c3grp {
425 fsl,pins = <
426 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000026
427 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000026
428 >;
429 };
430
431 pinctrl_i2c4: i2c4grp {
432 fsl,pins = <
433 MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000026
434 MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000026
435 >;
436 };
437
438 pinctrl_keys: keysgrp {
439 fsl,pins = <
440 /* VOL- */
441 MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01C0
442 /* VOL+ */
443 MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01C0
444 >;
445 };
446
447 pinctrl_led_b: ledbgrp {
448 fsl,pins = <
449 /* LED_B */
450 MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT 0x06
451 >;
452 };
453
454 pinctrl_led_g: ledggrp {
455 fsl,pins = <
456 /* LED_G */
457 MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT 0x06
458 >;
459 };
460
461 pinctrl_led_r: ledrgrp {
462 fsl,pins = <
463 /* LED_R */
464 MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT 0x06
465 >;
466 };
467
468 pinctrl_mag: maggrp {
469 fsl,pins = <
470 /* INT_MAG */
471 MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x80
472 >;
473 };
474
475 pinctrl_pmic: pmicgrp {
476 fsl,pins = <
477 /* PMIC_NINT */
478 MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x80
479 >;
480 };
481
482 pinctrl_pmic_5v: pmic5vgrp {
483 fsl,pins = <
484 /* PMIC_5V */
485 MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x80
486 >;
487 };
488
489 pinctrl_prox: proxgrp {
490 fsl,pins = <
491 /* INT_LIGHT */
492 MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x80
493 >;
494 };
495
496 pinctrl_rtc: rtcgrp {
497 fsl,pins = <
498 /* RTC_INT */
499 MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80
500 >;
501 };
502
503 pinctrl_sai2: sai2grp {
504 fsl,pins = <
505 MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
506 MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
507 MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6
508 MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
509 MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
510 >;
511 };
512
513 pinctrl_sai6: sai6grp {
514 fsl,pins = <
515 MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6
516 MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6
517 MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6
518 MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6
519 >;
520 };
521
522 pinctrl_tcpc: tcpcgrp {
523 fsl,pins = <
524 /* TCPC_INT */
525 MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01C0
526 >;
527 };
528
529 pinctrl_touch: touchgrp {
530 fsl,pins = <
531 /* TP_INT */
532 MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27 0x80
533 >;
534 };
535
536 pinctrl_typec: typecgrp {
537 fsl,pins = <
538 /* TYPEC_MUX_EN */
539 MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x83
540 >;
541 };
542
543 pinctrl_uart1: uart1grp {
544 fsl,pins = <
545 MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
546 MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
547 >;
548 };
549
550 pinctrl_uart2: uart2grp {
551 fsl,pins = <
552 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
553 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
554 >;
555 };
556
557 pinctrl_uart3: uart3grp {
558 fsl,pins = <
559 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
560 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
561 >;
562 };
563
564 pinctrl_uart4: uart4grp {
565 fsl,pins = <
566 MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49
567 MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49
568 MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49
569 MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49
570 >;
571 };
572
573 pinctrl_usdhc1: usdhc1grp {
574 fsl,pins = <
575 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
576 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
577 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
578 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
579 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
580 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
581 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
582 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
583 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
584 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
585 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
586 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
587 >;
588 };
589
590 pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
591 fsl,pins = <
592 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
593 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
594 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
595 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
596 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
597 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
598 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
599 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
600 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
601 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
602 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d
603 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
604 >;
605 };
606
607 pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
608 fsl,pins = <
609 MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
610 MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
611 MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
612 MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
613 MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
614 MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
615 MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
616 MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
617 MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
618 MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
619 MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f
620 MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
621 >;
622 };
623
624 pinctrl_usdhc2: usdhc2grp {
625 fsl,pins = <
626 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
627 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
628 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
629 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
630 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
631 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
632 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
633 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
634 >;
635 };
636
637 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
638 fsl,pins = <
639 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
640 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
641 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
642 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
643 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
644 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
645 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
646 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
647 >;
648 };
649
650 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
651 fsl,pins = <
652 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
653 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
654 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf
655 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf
656 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf
657 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf
658 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf
659 MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
660 >;
661 };
662
663 pinctrl_wifi_disable: wifidisablegrp {
664 fsl,pins = <
665 /* WIFI_REG_ON */
666 MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x83
667 >;
668 };
669
670 pinctrl_wifi_pwr: wifipwrgrp {
671 fsl,pins = <
672 /* WIFI3V3_EN */
673 MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10 0x83
674 >;
675 };
676
677 pinctrl_wdog: wdoggrp {
678 fsl,pins = <
679 /* nWDOG */
680 MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x1f
681 >;
682 };
683};
684
685&i2c1 {
686 clock-frequency = <387000>;
687 pinctrl-names = "default";
688 pinctrl-0 = <&pinctrl_i2c1>;
689 status = "okay";
690
691 typec_pd: usb-pd@3f {
692 compatible = "ti,tps6598x";
693 reg = <0x3f>;
694 pinctrl-names = "default";
695 pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
696 interrupt-parent = <&gpio1>;
697 interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
698 interrupt-names = "irq";
699
700 connector {
701 ports {
702 #address-cells = <1>;
703 #size-cells = <0>;
704
705 port@0 {
706 reg = <0>;
707
708 usb_con_hs: endpoint {
709 remote-endpoint = <&typec_hs>;
710 };
711 };
712
713 port@1 {
714 reg = <1>;
715
716 usb_con_ss: endpoint {
717 remote-endpoint = <&typec_ss>;
718 };
719 };
720 };
721 };
722 };
723
724 pmic: pmic@4b {
725 compatible = "rohm,bd71837";
726 reg = <0x4b>;
727 pinctrl-names = "default";
728 pinctrl-0 = <&pinctrl_pmic>;
729 clocks = <&pmic_osc>;
730 clock-names = "osc";
731 clock-output-names = "pmic_clk";
732 interrupt-parent = <&gpio1>;
733 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
734 rohm,reset-snvs-powered;
735
736 regulators {
737 buck1_reg: BUCK1 {
738 regulator-name = "buck1";
739 regulator-min-microvolt = <700000>;
740 regulator-max-microvolt = <1300000>;
741 regulator-boot-on;
742 regulator-ramp-delay = <1250>;
743 rohm,dvs-run-voltage = <900000>;
744 rohm,dvs-idle-voltage = <850000>;
745 rohm,dvs-suspend-voltage = <800000>;
746 regulator-always-on;
747 };
748
749 buck2_reg: BUCK2 {
750 regulator-name = "buck2";
751 regulator-min-microvolt = <700000>;
752 regulator-max-microvolt = <1300000>;
753 regulator-boot-on;
754 regulator-ramp-delay = <1250>;
755 rohm,dvs-run-voltage = <1000000>;
756 rohm,dvs-idle-voltage = <900000>;
757 regulator-always-on;
758 };
759
760 buck3_reg: BUCK3 {
761 regulator-name = "buck3";
762 regulator-min-microvolt = <700000>;
763 regulator-max-microvolt = <1300000>;
764 regulator-boot-on;
765 rohm,dvs-run-voltage = <900000>;
766 };
767
768 buck4_reg: BUCK4 {
769 regulator-name = "buck4";
770 regulator-min-microvolt = <700000>;
771 regulator-max-microvolt = <1300000>;
772 rohm,dvs-run-voltage = <1000000>;
773 };
774
775 buck5_reg: BUCK5 {
776 regulator-name = "buck5";
777 regulator-min-microvolt = <700000>;
778 regulator-max-microvolt = <1350000>;
779 regulator-boot-on;
780 regulator-always-on;
781 };
782
783 buck6_reg: BUCK6 {
784 regulator-name = "buck6";
785 regulator-min-microvolt = <3000000>;
786 regulator-max-microvolt = <3300000>;
787 regulator-boot-on;
788 regulator-always-on;
789 };
790
791 buck7_reg: BUCK7 {
792 regulator-name = "buck7";
793 regulator-min-microvolt = <1605000>;
794 regulator-max-microvolt = <1995000>;
795 regulator-boot-on;
796 regulator-always-on;
797 };
798
799 buck8_reg: BUCK8 {
800 regulator-name = "buck8";
801 regulator-min-microvolt = <800000>;
802 regulator-max-microvolt = <1400000>;
803 regulator-boot-on;
804 regulator-always-on;
805 };
806
807 ldo1_reg: LDO1 {
808 regulator-name = "ldo1";
809 regulator-min-microvolt = <3000000>;
810 regulator-max-microvolt = <3300000>;
811 regulator-boot-on;
812 /* leave on for snvs power button */
813 regulator-always-on;
814 };
815
816 ldo2_reg: LDO2 {
817 regulator-name = "ldo2";
818 regulator-min-microvolt = <900000>;
819 regulator-max-microvolt = <900000>;
820 regulator-boot-on;
821 /* leave on for snvs power button */
822 regulator-always-on;
823 };
824
825 ldo3_reg: LDO3 {
826 regulator-name = "ldo3";
827 regulator-min-microvolt = <1800000>;
828 regulator-max-microvolt = <3300000>;
829 regulator-boot-on;
830 regulator-always-on;
831 };
832
833 ldo4_reg: LDO4 {
834 regulator-name = "ldo4";
835 regulator-min-microvolt = <900000>;
836 regulator-max-microvolt = <1800000>;
837 regulator-boot-on;
838 regulator-always-on;
839 };
840
841 ldo5_reg: LDO5 {
842 /* VDD_PHY_0V9 - MIPI and HDMI domains */
843 regulator-name = "ldo5";
844 regulator-min-microvolt = <1800000>;
845 regulator-max-microvolt = <3300000>;
846 regulator-always-on;
847 };
848
849 ldo6_reg: LDO6 {
850 /* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
851 regulator-name = "ldo6";
852 regulator-min-microvolt = <900000>;
853 regulator-max-microvolt = <1800000>;
854 regulator-boot-on;
855 regulator-always-on;
856 };
857
858 ldo7_reg: LDO7 {
859 /* VDD_PHY_3V3 - USB domain */
860 regulator-name = "ldo7";
861 regulator-min-microvolt = <1800000>;
862 regulator-max-microvolt = <3300000>;
863 regulator-boot-on;
864 regulator-always-on;
865 };
866 };
867 };
868
869 rtc@68 {
870 compatible = "microcrystal,rv4162";
871 reg = <0x68>;
872 pinctrl-names = "default";
873 pinctrl-0 = <&pinctrl_rtc>;
874 interrupt-parent = <&gpio1>;
875 interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
876 };
877};
878
879&i2c2 {
880 clock-frequency = <387000>;
881 pinctrl-names = "default";
882 pinctrl-0 = <&pinctrl_i2c2>;
883 status = "okay";
884
885 magnetometer@1e {
886 compatible = "st,lsm9ds1-magn";
887 reg = <0x1e>;
888 pinctrl-names = "default";
889 pinctrl-0 = <&pinctrl_mag>;
890 interrupt-parent = <&gpio3>;
891 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
892 vdd-supply = <&reg_vdd_sen>;
893 vddio-supply = <&reg_vdd_1v8>;
894 };
895
896 regulator@3e {
897 compatible = "tps65132";
898 reg = <0x3e>;
899
900 reg_lcd_avdd: outp {
901 regulator-name = "LCD_AVDD";
902 vin-supply = <&reg_lcd_3v4>;
903 };
904
905 reg_lcd_avee: outn {
906 regulator-name = "LCD_AVEE";
907 vin-supply = <&reg_lcd_3v4>;
908 };
909 };
910
911 proximity: prox@60 {
912 compatible = "vishay,vcnl4040";
913 reg = <0x60>;
914 pinctrl-names = "default";
915 pinctrl-0 = <&pinctrl_prox>;
916 interrupt-parent = <&gpio3>;
917 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
918 };
919
920 accel_gyro: accel-gyro@6a {
921 compatible = "st,lsm9ds1-imu";
922 reg = <0x6a>;
923 vdd-supply = <&reg_vdd_sen>;
924 vddio-supply = <&reg_vdd_1v8>;
925 };
926};
927
928&i2c3 {
929 clock-frequency = <387000>;
930 pinctrl-names = "default";
931 pinctrl-0 = <&pinctrl_i2c3>;
932 status = "okay";
933
934 codec: audio-codec@1a {
935 compatible = "wlf,wm8962";
936 reg = <0x1a>;
937 clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
938 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
939 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
940 assigned-clock-rates = <24576000>;
941 #sound-dai-cells = <0>;
942 mic-cfg = <0x200>;
943 DCVDD-supply = <&reg_aud_1v8>;
944 DBVDD-supply = <&reg_aud_1v8>;
945 AVDD-supply = <&reg_aud_1v8>;
946 CPVDD-supply = <&reg_aud_1v8>;
947 MICVDD-supply = <&reg_aud_1v8>;
948 PLLVDD-supply = <&reg_aud_1v8>;
949 SPKVDD1-supply = <&reg_vsys_3v4>;
950 SPKVDD2-supply = <&reg_vsys_3v4>;
951 gpio-cfg = <
952 0x0000 /* n/c */
953 0x0001 /* gpio2, 1: default */
954 0x0013 /* gpio3, 2: dmicclk */
955 0x0000 /* n/c, 3: default */
956 0x8014 /* gpio5, 4: dmic_dat */
957 0x0000 /* gpio6, 5: default */
958 >;
959 };
960
961 backlight@36 {
962 compatible = "ti,lm36922";
963 reg = <0x36>;
964 pinctrl-names = "default";
965 pinctrl-0 = <&pinctrl_bl>;
966 #address-cells = <1>;
967 #size-cells = <0>;
968 enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
969 vled-supply = <&reg_vsys_3v4>;
970 ti,ovp-microvolt = <25000000>;
971
972 led_backlight: led@0 {
973 reg = <0>;
974 label = ":backlight";
975 linux,default-trigger = "backlight";
976 led-max-microamp = <20000>;
977 };
978 };
979
980 touchscreen@38 {
981 compatible = "edt,edt-ft5506";
982 reg = <0x38>;
983 pinctrl-names = "default";
984 pinctrl-0 = <&pinctrl_touch>;
985 interrupt-parent = <&gpio1>;
986 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
987 touchscreen-size-x = <720>;
988 touchscreen-size-y = <1440>;
989 vcc-supply = <&reg_lcd_1v8>;
990 };
991};
992
993&i2c4 {
994 clock-frequency = <387000>;
995 pinctrl-names = "default";
996 pinctrl-0 = <&pinctrl_i2c4>;
997 status = "okay";
998
999 bat: fuel-gauge@36 {
1000 compatible = "maxim,max17055";
1001 reg = <0x36>;
1002 interrupt-parent = <&gpio3>;
1003 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1004 pinctrl-names = "default";
1005 pinctrl-0 = <&pinctrl_gauge>;
1006 maxim,over-heat-temp = <700>;
1007 maxim,over-volt = <4500>;
1008 maxim,rsns-microohm = <5000>;
1009 };
1010
1011 bq25895: charger@6a {
1012 compatible = "ti,bq25895", "ti,bq25890";
1013 reg = <0x6a>;
1014 pinctrl-names = "default";
1015 pinctrl-0 = <&pinctrl_charger_in>;
1016 interrupt-parent = <&gpio3>;
1017 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
1018 phys = <&usb3_phy0>;
1019 ti,precharge-current = <130000>; /* uA */
1020 ti,minimum-sys-voltage = <3700000>; /* uV */
1021 ti,boost-voltage = <5000000>; /* uV */
1022 ti,boost-max-current = <500000>; /* uA */
1023 ti,use-vinmin-threshold = <1>; /* enable VINDPM */
1024 ti,vinmin-threshold = <3900000>; /* uV */
1025 monitored-battery = <&bat>;
1026 power-supplies = <&typec_pd>;
1027 };
1028};
1029
1030&lcdif {
1031 status = "okay";
1032};
1033
1034&mipi_dsi {
1035 #address-cells = <1>;
1036 #size-cells = <0>;
1037 status = "okay";
1038
1039 lcd_panel: panel@0 {
1040 compatible = "mantix,mlaf057we51-x";
1041 reg = <0>;
1042 pinctrl-names = "default";
1043 pinctrl-0 = <&pinctrl_dsirst>;
1044 avdd-supply = <&reg_lcd_avdd>;
1045 avee-supply = <&reg_lcd_avee>;
1046 vddi-supply = <&reg_lcd_1v8>;
1047 backlight = <&backlight_dsi>;
1048 reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
1049 mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
1050
1051 port {
1052 panel_in: endpoint {
1053 remote-endpoint = <&mipi_dsi_out>;
1054 };
1055 };
1056 };
1057
1058 ports {
1059 port@1 {
1060 reg = <1>;
1061
1062 mipi_dsi_out: endpoint {
1063 remote-endpoint = <&panel_in>;
1064 };
1065 };
1066 };
1067};
1068
1069&pgc_gpu {
1070 power-supply = <&buck3_reg>;
1071};
1072
1073&pgc_mipi {
1074 power-supply = <&ldo5_reg>;
1075};
1076
1077&pgc_vpu {
1078 power-supply = <&buck4_reg>;
1079};
1080
1081&pwm1 {
1082 pinctrl-names = "default";
1083 pinctrl-0 = <&pinctrl_haptic>;
1084 status = "okay";
1085};
1086
1087&pwm2 {
1088 pinctrl-names = "default";
1089 pinctrl-0 = <&pinctrl_led_b>;
1090 status = "okay";
1091};
1092
1093&pwm3 {
1094 pinctrl-names = "default";
1095 pinctrl-0 = <&pinctrl_led_r>;
1096 status = "okay";
1097};
1098
1099&pwm4 {
1100 pinctrl-names = "default";
1101 pinctrl-0 = <&pinctrl_led_g>;
1102 status = "okay";
1103};
1104
1105&sai2 {
1106 pinctrl-names = "default";
1107 pinctrl-0 = <&pinctrl_sai2>;
1108 assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1109 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1110 assigned-clock-rates = <24576000>;
1111 status = "okay";
1112};
1113
1114&sai6 {
1115 pinctrl-names = "default";
1116 pinctrl-0 = <&pinctrl_sai6>;
1117 assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
1118 assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1119 assigned-clock-rates = <24576000>;
1120 fsl,sai-synchronous-rx;
1121 status = "okay";
1122};
1123
1124&snvs_pwrkey {
1125 status = "okay";
1126};
1127
1128&snvs_rtc {
1129 status = "disabled";
1130};
1131
1132&uart1 { /* console */
1133 pinctrl-names = "default";
1134 pinctrl-0 = <&pinctrl_uart1>;
1135 status = "okay";
1136};
1137
1138&uart2 { /* TPS - GPS - DEBUG */
1139 pinctrl-names = "default";
1140 pinctrl-0 = <&pinctrl_uart2>;
1141 status = "okay";
1142
1143 gnss {
1144 compatible = "globaltop,pa6h";
1145 vcc-supply = <&reg_gnss>;
1146 current-speed = <9600>;
1147 };
1148};
1149
1150&uart3 { /* SMC */
1151 pinctrl-names = "default";
1152 pinctrl-0 = <&pinctrl_uart3>;
1153 status = "okay";
1154};
1155
1156&uart4 { /* BT */
1157 pinctrl-names = "default";
1158 pinctrl-0 = <&pinctrl_uart4>;
1159 uart-has-rtscts;
1160 status = "okay";
1161};
1162
1163&usb3_phy0 {
1164 status = "okay";
1165};
1166
1167&usb3_phy1 {
1168 vbus-supply = <&reg_hub>;
1169 status = "okay";
1170};
1171
1172&usb_dwc3_0 {
1173 #address-cells = <1>;
1174 #size-cells = <0>;
1175 dr_mode = "otg";
1176 snps,dis_u3_susphy_quirk;
1177 status = "okay";
1178
1179 port@0 {
1180 reg = <0>;
1181
1182 typec_hs: endpoint {
1183 remote-endpoint = <&usb_con_hs>;
1184 };
1185 };
1186
1187 port@1 {
1188 reg = <1>;
1189
1190 typec_ss: endpoint {
1191 remote-endpoint = <&usb_con_ss>;
1192 };
1193 };
1194};
1195
1196&usb_dwc3_1 {
1197 dr_mode = "host";
1198 status = "okay";
1199 #address-cells = <1>;
1200 #size-cells = <0>;
1201
1202 /* Microchip USB2642 */
1203 hub@1 {
1204 compatible = "usb424,2640";
1205 reg = <1>;
1206 #address-cells = <1>;
1207 #size-cells = <0>;
1208
1209 mass-storage@1 {
1210 compatible = "usb424,4041";
1211 reg = <1>;
1212 };
1213 };
1214};
1215
1216&usdhc1 {
1217 assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
1218 assigned-clock-rates = <400000000>;
1219 pinctrl-names = "default", "state_100mhz", "state_200mhz";
1220 pinctrl-0 = <&pinctrl_usdhc1>;
1221 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
1222 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
1223 bus-width = <8>;
1224 vmmc-supply = <&reg_vdd_3v3>;
1225 power-supply = <&reg_vdd_1v8>;
1226 non-removable;
1227 status = "okay";
1228};
1229
1230&usdhc2 {
1231 assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
1232 assigned-clock-rates = <200000000>;
1233 pinctrl-names = "default", "state_100mhz", "state_200mhz";
1234 pinctrl-0 = <&pinctrl_usdhc2>;
1235 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
1236 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
1237 bus-width = <4>;
1238 vmmc-supply = <&reg_wifi_3v3>;
1239 mmc-pwrseq = <&usdhc2_pwrseq>;
1240 post-power-on-delay-ms = <1000>;
1241 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
1242 max-frequency = <50000000>;
1243 disable-wp;
1244 cap-sdio-irq;
1245 keep-power-in-suspend;
1246 wakeup-source;
1247 status = "okay";
1248};
1249
1250&wdog1 {
1251 pinctrl-names = "default";
1252 pinctrl-0 = <&pinctrl_wdog>;
1253 fsl,ext-reset-output;
1254 status = "okay";
1255};