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Wolfgang Denk0e4018d2005-09-26 01:14:38 +02001/*
2 * 2004-2005 Gary Jennejohn <garyj@denx.de>
3 *
4 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
5 * ebenard@eukrea.com
6 *
7 * Configuration settings for the MP2USB board.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/* ARM asynchronous clock */
32#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 45) */
33#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK/3) /* peripheral clock */
34
35#define AT91_SLOW_CLOCK 32768 /* slow clock */
36
37#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
38#define CONFIG_AT91RM9200 1 /* It's an Atmel AT91RM9200 SoC */
39#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
40#define CONFIG_MP2USB 1 /* on an MP2USB Board */
41#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
42#define USE_920T_MMU 1
43
44#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
45#define CONFIG_SETUP_MEMORY_TAGS 1
46#define CONFIG_INITRD_TAG 1
47
48#define CFG_ATMEL_PLL_INIT_BUG 1
49#ifndef CONFIG_SKIP_LOWLEVEL_INIT
Ladislav Michl2c5260f2007-12-06 23:24:57 +010050#define CFG_USE_MAIN_OSCILLATOR 1
Wolfgang Denk0e4018d2005-09-26 01:14:38 +020051/* flash */
52#define MC_PUIA_VAL 0x00000000
53#define MC_PUP_VAL 0x00000000
54#define MC_PUER_VAL 0x00000000
55#define MC_ASR_VAL 0x00000000
56#define MC_AASR_VAL 0x00000000
57#define EBI_CFGR_VAL 0x00000000
58#define SMC2_CSR_VAL 0x00003084 /* 16bit, 2 TDF, 4 WS */
59
60/* clocks */
61#define PLLAR_VAL 0x20263E04 /* 180 MHz for PCK */
Wolfgang Denkd8e7e0f2005-09-26 01:26:56 +020062#define PLLBR_VAL 0x1048bE0E /* 48 MHz (divider by 2 for USB) */
Wolfgang Denk0e4018d2005-09-26 01:14:38 +020063#define MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock = 60MHz from PLLA */
64
65/* sdram */
66#define PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */
67#define PIOC_BSR_VAL 0x00000000
68#define PIOC_PDR_VAL 0xFFFF0000
69#define EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
70#define SDRC_CR_VAL 0x3211295A /* set up the SDRAM */
71#define SDRAM 0x20000000 /* address of the SDRAM */
72#define SDRAM1 0x20000020 /* address of the SDRAM */
73#define SDRAM_VAL 0x00000000 /* value written to SDRAM */
74#define SDRC_MR_VAL 0x00000002 /* Precharge All */
75#define SDRC_MR_VAL1 0x00000004 /* refresh */
76#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
77#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
78#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
79#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
80
81/*
82 * Size of malloc() pool
83 */
84#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
85#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
86
87#define CONFIG_BAUDRATE 115200
88
89#define CFG_AT91C_BRGR_DIVISOR 33 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK /(baudrate * 16) */
90
91/*
92 * Hardware drivers
93 */
94
95/* define one of these to choose the DBGU, USART0 or USART1 as console */
96#define CONFIG_DBGU
97#undef CONFIG_USART0
98#undef CONFIG_USART1
99
100#undef CONFIG_HWFLOW /* don't include RTS/CTS flow control support */
101
102#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
103
Markus Klotzbuecher7b59b3c2006-11-27 11:44:58 +0100104#define CONFIG_USB_OHCI_NEW 1
Wolfgang Denkd8e7e0f2005-09-26 01:26:56 +0200105#define CONFIG_USB_KEYBOARD 1
106#define CONFIG_USB_STORAGE 1
107#define CONFIG_DOS_PARTITION 1
108#define CONFIG_AT91C_PQFP_UHPBUG 1
109
Markus Klotzbuecher301f1aa2006-05-23 13:38:35 +0200110#undef CFG_USB_OHCI_BOARD_INIT
111#define CFG_USB_OHCI_CPU_INIT 1
112#define CFG_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
113#define CFG_USB_OHCI_SLOT_NAME "at91rm9200"
Markus Klotzbuecher53e336e2006-11-27 11:43:09 +0100114#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
Markus Klotzbuecher301f1aa2006-05-23 13:38:35 +0200115
Wolfgang Denk0e4018d2005-09-26 01:14:38 +0200116#undef CONFIG_HARD_I2C
117
118#ifdef CONFIG_HARD_I2C
119#define CFG_I2C_SPEED 0 /* not used */
120#define CFG_I2C_SLAVE 0 /* not used */
121#define CONFIG_RTC_RS5C372A /* RICOH I2C RTC */
122#define CFG_I2C_RTC_ADDR 0x32
123#define CFG_I2C_EEPROM_ADDR 0x50
124#define CFG_I2C_EEPROM_ADDR_LEN 1
125#define CFG_I2C_EEPROM_ADDR_OVERFLOW
126#endif
127/* still about 20 kB free with this defined */
128#define CFG_LONGHELP
129
130#define CONFIG_BOOTDELAY 3
131
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500132#if !defined(CONFIG_HARD_I2C)
Wolfgang Denk0e4018d2005-09-26 01:14:38 +0200133#define CONFIG_TIMESTAMP
134#endif
Wolfgang Denk0e4018d2005-09-26 01:14:38 +0200135
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500136
137/*
Jon Loeliger7f5c0152007-07-10 09:38:02 -0500138 * BOOTP options
139 */
140#define CONFIG_BOOTP_BOOTFILESIZE
141#define CONFIG_BOOTP_BOOTPATH
142#define CONFIG_BOOTP_GATEWAY
143#define CONFIG_BOOTP_HOSTNAME
144
145
146/*
Jon Loeliger5dc11a52007-07-04 22:33:01 -0500147 * Command line configuration.
148 */
149#include <config_cmd_default.h>
150
151#define CONFIG_CMD_DHCP
152#define CONFIG_CMD_NFS
153#define CONFIG_CMD_SNTP
154
155#if defined(CONFIG_HARD_I2C)
156
157 #define CONFIG_CMD_DATE
158 #define CONFIG_CMD_EEPROM
159 #define CONFIG_CMD_I2C
160 #define CONFIG_CMD_MISC
161
162#else
163
164 #define CONFIG_CMD_USB
165 #define CONFIG_CMD_CACHE
166
167 #undef CONFIG_CMD_AUTOSCRIPT
168 #undef CONFIG_CMD_BDI
169 #undef CONFIG_CMD_FPGA
170 #undef CONFIG_CMD_IMI
171 #undef CONFIG_CMD_LOADS
172 #undef CONFIG_CMD_MISC
173
174#endif
175
176
177#define CFG_LONGHELP
Wolfgang Denk0e4018d2005-09-26 01:14:38 +0200178
179#define CONFIG_NR_DRAM_BANKS 1
180#define PHYS_SDRAM 0x20000000
Markus Klotzbuecher301f1aa2006-05-23 13:38:35 +0200181#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
Wolfgang Denk0e4018d2005-09-26 01:14:38 +0200182
183#define CFG_MEMTEST_START PHYS_SDRAM
184#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
185
186#define CONFIG_DRIVER_ETHER
187#define CONFIG_NET_RETRY_COUNT 20
188#undef CONFIG_AT91C_USE_RMII
189
190#define PHYS_FLASH_1 0x10000000
191#define PHYS_FLASH_SIZE 0x1000000 /* 16 megs main flash */
192#define CFG_FLASH_BASE PHYS_FLASH_1
193#define CFG_MONITOR_BASE CFG_FLASH_BASE
194#define CFG_MAX_FLASH_BANKS 1
195#define CFG_MAX_FLASH_SECT 256
196#define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */
197#define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */
198#define CFG_FLASH_LOCK_TOUT (10*CFG_HZ) /* Timeout for Flash Set Lock Bit */
199#define CFG_FLASH_UNLOCK_TOUT (10*CFG_HZ) /* Timeout for Flash Clear Lock Bits */
200#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
201
202#define CFG_ENV_IS_IN_FLASH 1
203#define CFG_ENV_OFFSET 0x20000 /* after u-boot.bin */
204#define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_ENV_OFFSET)
205#define CFG_ENV_SIZE 0x20000
206
207#define CFG_LOAD_ADDR 0x21000000 /* default load address */
208
209#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
210
211#define CFG_PROMPT "=> " /* Monitor Command Prompt */
212#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
213#define CFG_MAXARGS 32 /* max number of command args */
214#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
215
Wolfgang Denkd8e7e0f2005-09-26 01:26:56 +0200216#define CFG_DEVICE_DEREGISTER /* needs device_deregister */
217#define LITTLEENDIAN 1 /* used by usb_ohci.c */
218
Wolfgang Denk0e4018d2005-09-26 01:14:38 +0200219#define CFG_HZ 1000
220#define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */
221 /* AT91C_TC_TIMER_DIV1_CLOCK */
222
223#define CONFIG_STACKSIZE (32*1024) /* regular stack */
224
225#ifdef CONFIG_USE_IRQ
226#error CONFIG_USE_IRQ not supported
227#endif
228
229#define CFG_DEVICE_NULLDEV 1 /* enble null device */
230#undef CONFIG_SILENT_CONSOLE /* enable silent startup */
231
232#define CONFIG_AUTOBOOT_KEYED
233#define CONFIG_AUTOBOOT_PROMPT "Press SPACE to abort autoboot in %d seconds\n"
234#define CONFIG_AUTOBOOT_STOP_STR " "
235#define CONFIG_AUTOBOOT_DELAY_STR "d"
236
237#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
238
239#endif /* __CONFIG_H */