blob: 934cd5787a5cf9ed2aeb67a6179180fe7653f2d2 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassf26c8a82015-06-23 15:39:15 -06002/*
3 * Copyright (C) 2015 Google, Inc
4 * Written by Simon Glass <sjg@chromium.org>
Stephen Warren135aa952016-06-17 09:44:00 -06005 * Copyright (c) 2016, NVIDIA CORPORATION.
Philipp Tomsichf4fcba52018-01-08 13:59:18 +01006 * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
Simon Glassf26c8a82015-06-23 15:39:15 -06007 */
8
9#include <common.h>
10#include <clk.h>
Stephen Warren135aa952016-06-17 09:44:00 -060011#include <clk-uclass.h>
Simon Glassf26c8a82015-06-23 15:39:15 -060012#include <dm.h>
Simon Glass7423daa2016-07-04 11:58:03 -060013#include <dt-structs.h>
Simon Glassf26c8a82015-06-23 15:39:15 -060014#include <errno.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060015#include <log.h>
Simon Glass336d4612020-02-03 07:36:16 -070016#include <malloc.h>
Simon Glass61b29b82020-02-03 07:36:15 -070017#include <dm/devres.h>
18#include <dm/read.h>
Simon Glasseb41d8a2020-05-10 11:40:08 -060019#include <linux/bug.h>
Lukasz Majewski0c660c22019-06-24 15:50:42 +020020#include <linux/clk-provider.h>
Simon Glass61b29b82020-02-03 07:36:15 -070021#include <linux/err.h>
Simon Glassf26c8a82015-06-23 15:39:15 -060022
Mario Six268453b2018-01-15 11:06:51 +010023static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
Simon Glassf26c8a82015-06-23 15:39:15 -060024{
Mario Six268453b2018-01-15 11:06:51 +010025 return (const struct clk_ops *)dev->driver->ops;
Simon Glassf26c8a82015-06-23 15:39:15 -060026}
27
Simon Glassfb989e02020-07-19 10:15:56 -060028struct clk *dev_get_clk_ptr(struct udevice *dev)
29{
30 return (struct clk *)dev_get_uclass_priv(dev);
31}
32
Simon Glasse70cc432016-01-20 19:43:02 -070033#if CONFIG_IS_ENABLED(OF_CONTROL)
Simon Glass7423daa2016-07-04 11:58:03 -060034# if CONFIG_IS_ENABLED(OF_PLATDATA)
Walter Lozano51f12632020-06-25 01:10:13 -030035int clk_get_by_driver_info(struct udevice *dev, struct phandle_1_arg *cells,
36 struct clk *clk)
Simon Glass7423daa2016-07-04 11:58:03 -060037{
38 int ret;
39
Walter Lozano51f12632020-06-25 01:10:13 -030040 ret = device_get_by_driver_info((struct driver_info *)cells->node,
41 &clk->dev);
Simon Glass7423daa2016-07-04 11:58:03 -060042 if (ret)
43 return ret;
Walter Lozano51f12632020-06-25 01:10:13 -030044 clk->id = cells->arg[0];
Simon Glass7423daa2016-07-04 11:58:03 -060045
46 return 0;
47}
48# else
Stephen Warren135aa952016-06-17 09:44:00 -060049static int clk_of_xlate_default(struct clk *clk,
Simon Glassa4e0ef52017-05-18 20:09:40 -060050 struct ofnode_phandle_args *args)
Stephen Warren135aa952016-06-17 09:44:00 -060051{
52 debug("%s(clk=%p)\n", __func__, clk);
53
54 if (args->args_count > 1) {
55 debug("Invaild args_count: %d\n", args->args_count);
56 return -EINVAL;
57 }
58
59 if (args->args_count)
60 clk->id = args->args[0];
61 else
62 clk->id = 0;
63
Sekhar Norie497fab2019-07-11 14:30:24 +053064 clk->data = 0;
65
Stephen Warren135aa952016-06-17 09:44:00 -060066 return 0;
67}
68
Jagan Teki75f98312019-02-28 00:26:52 +053069static int clk_get_by_index_tail(int ret, ofnode node,
70 struct ofnode_phandle_args *args,
71 const char *list_name, int index,
72 struct clk *clk)
73{
74 struct udevice *dev_clk;
75 const struct clk_ops *ops;
76
77 assert(clk);
78 clk->dev = NULL;
79 if (ret)
80 goto err;
81
82 ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
83 if (ret) {
84 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
85 __func__, ret);
86 return ret;
87 }
88
89 clk->dev = dev_clk;
90
91 ops = clk_dev_ops(dev_clk);
92
93 if (ops->of_xlate)
94 ret = ops->of_xlate(clk, args);
95 else
96 ret = clk_of_xlate_default(clk, args);
97 if (ret) {
98 debug("of_xlate() failed: %d\n", ret);
99 return ret;
100 }
101
102 return clk_request(dev_clk, clk);
103err:
104 debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
105 __func__, ofnode_get_name(node), list_name, index, ret);
106 return ret;
107}
108
Philipp Tomsich95f9a7e2018-01-08 11:18:18 +0100109static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
110 int index, struct clk *clk)
Stephen Warren135aa952016-06-17 09:44:00 -0600111{
112 int ret;
Simon Glassaa9bb092017-05-30 21:47:29 -0600113 struct ofnode_phandle_args args;
Stephen Warren135aa952016-06-17 09:44:00 -0600114
115 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
116
117 assert(clk);
Patrice Chotard82a8a662017-07-18 11:57:07 +0200118 clk->dev = NULL;
119
Philipp Tomsich95f9a7e2018-01-08 11:18:18 +0100120 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
Mario Six268453b2018-01-15 11:06:51 +0100121 index, &args);
Simon Glasse70cc432016-01-20 19:43:02 -0700122 if (ret) {
123 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
124 __func__, ret);
125 return ret;
126 }
127
Wenyou Yang3f56b132016-09-27 11:00:28 +0800128
Jagan Tekidcb63fc2019-02-28 00:26:53 +0530129 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
Sean Anderson675d7902020-06-24 06:41:08 -0400130 index, clk);
Stephen Warren135aa952016-06-17 09:44:00 -0600131}
Philipp Tomsich95f9a7e2018-01-08 11:18:18 +0100132
133int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
134{
Jagan Teki75f98312019-02-28 00:26:52 +0530135 struct ofnode_phandle_args args;
136 int ret;
137
138 ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
139 index, &args);
140
141 return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
Sean Anderson675d7902020-06-24 06:41:08 -0400142 index, clk);
Jagan Teki75f98312019-02-28 00:26:52 +0530143}
144
145int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
146{
147 struct ofnode_phandle_args args;
148 int ret;
149
150 ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
Sean Anderson675d7902020-06-24 06:41:08 -0400151 index, &args);
Jagan Teki75f98312019-02-28 00:26:52 +0530152
153 return clk_get_by_index_tail(ret, node, &args, "clocks",
Sean Anderson675d7902020-06-24 06:41:08 -0400154 index, clk);
Philipp Tomsich95f9a7e2018-01-08 11:18:18 +0100155}
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100156
Neil Armstronga855be82018-04-03 11:44:18 +0200157int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
158{
159 int i, ret, err, count;
160
161 bulk->count = 0;
162
163 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
Neil Armstrong721881c2018-04-17 11:30:31 +0200164 if (count < 1)
165 return count;
Neil Armstronga855be82018-04-03 11:44:18 +0200166
167 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
168 if (!bulk->clks)
169 return -ENOMEM;
170
171 for (i = 0; i < count; i++) {
172 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
173 if (ret < 0)
174 goto bulk_get_err;
175
176 ++bulk->count;
177 }
178
179 return 0;
180
181bulk_get_err:
182 err = clk_release_all(bulk->clks, bulk->count);
183 if (err)
184 debug("%s: could release all clocks for %p\n",
185 __func__, dev);
186
187 return ret;
188}
189
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200190static int clk_set_default_parents(struct udevice *dev, int stage)
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100191{
192 struct clk clk, parent_clk;
193 int index;
194 int num_parents;
195 int ret;
196
197 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
198 "#clock-cells");
199 if (num_parents < 0) {
200 debug("%s: could not read assigned-clock-parents for %p\n",
201 __func__, dev);
202 return 0;
203 }
204
205 for (index = 0; index < num_parents; index++) {
206 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
207 index, &parent_clk);
Neil Armstrongd64caaf2018-07-26 15:19:32 +0200208 /* If -ENOENT, this is a no-op entry */
209 if (ret == -ENOENT)
210 continue;
211
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100212 if (ret) {
213 debug("%s: could not get parent clock %d for %s\n",
214 __func__, index, dev_read_name(dev));
215 return ret;
216 }
217
218 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
219 index, &clk);
220 if (ret) {
221 debug("%s: could not get assigned clock %d for %s\n",
222 __func__, index, dev_read_name(dev));
223 return ret;
224 }
225
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200226 /* This is clk provider device trying to reparent itself
227 * It cannot be done right now but need to wait after the
228 * device is probed
229 */
230 if (stage == 0 && clk.dev == dev)
231 continue;
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100232
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200233 if (stage > 0 && clk.dev != dev)
234 /* do not setup twice the parent clocks */
235 continue;
236
237 ret = clk_set_parent(&clk, &parent_clk);
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100238 /*
239 * Not all drivers may support clock-reparenting (as of now).
240 * Ignore errors due to this.
241 */
242 if (ret == -ENOSYS)
243 continue;
244
Jean-Jacques Hiblot02e2a2a2019-09-26 15:42:42 +0200245 if (ret < 0) {
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100246 debug("%s: failed to reparent clock %d for %s\n",
247 __func__, index, dev_read_name(dev));
248 return ret;
249 }
250 }
251
252 return 0;
253}
254
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200255static int clk_set_default_rates(struct udevice *dev, int stage)
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100256{
257 struct clk clk;
258 int index;
259 int num_rates;
260 int size;
261 int ret = 0;
262 u32 *rates = NULL;
263
264 size = dev_read_size(dev, "assigned-clock-rates");
265 if (size < 0)
266 return 0;
267
268 num_rates = size / sizeof(u32);
269 rates = calloc(num_rates, sizeof(u32));
270 if (!rates)
271 return -ENOMEM;
272
273 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
274 if (ret)
275 goto fail;
276
277 for (index = 0; index < num_rates; index++) {
Neil Armstrongd64caaf2018-07-26 15:19:32 +0200278 /* If 0 is passed, this is a no-op */
279 if (!rates[index])
280 continue;
281
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100282 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
283 index, &clk);
284 if (ret) {
285 debug("%s: could not get assigned clock %d for %s\n",
286 __func__, index, dev_read_name(dev));
287 continue;
288 }
289
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200290 /* This is clk provider device trying to program itself
291 * It cannot be done right now but need to wait after the
292 * device is probed
293 */
294 if (stage == 0 && clk.dev == dev)
295 continue;
296
297 if (stage > 0 && clk.dev != dev)
298 /* do not setup twice the parent clocks */
299 continue;
300
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100301 ret = clk_set_rate(&clk, rates[index]);
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200302
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100303 if (ret < 0) {
Simon Glass68316162019-01-21 14:53:19 -0700304 debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
305 __func__, index, clk.id, dev_read_name(dev));
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100306 break;
307 }
308 }
309
310fail:
311 free(rates);
312 return ret;
313}
314
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200315int clk_set_defaults(struct udevice *dev, int stage)
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100316{
317 int ret;
318
Peng Fan91944ef2019-07-31 07:01:49 +0000319 if (!dev_of_valid(dev))
320 return 0;
321
Philipp Tomsich291da962018-11-26 20:20:19 +0100322 /* If this not in SPL and pre-reloc state, don't take any action. */
323 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
324 return 0;
325
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100326 debug("%s(%s)\n", __func__, dev_read_name(dev));
327
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200328 ret = clk_set_default_parents(dev, stage);
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100329 if (ret)
330 return ret;
331
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200332 ret = clk_set_default_rates(dev, stage);
Philipp Tomsichf4fcba52018-01-08 13:59:18 +0100333 if (ret < 0)
334 return ret;
335
336 return 0;
337}
Stephen Warren135aa952016-06-17 09:44:00 -0600338
339int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
340{
341 int index;
342
343 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
Patrice Chotard82a8a662017-07-18 11:57:07 +0200344 clk->dev = NULL;
Stephen Warren135aa952016-06-17 09:44:00 -0600345
Simon Glassaa9bb092017-05-30 21:47:29 -0600346 index = dev_read_stringlist_search(dev, "clock-names", name);
Stephen Warren135aa952016-06-17 09:44:00 -0600347 if (index < 0) {
Simon Glassb02e4042016-10-02 17:59:28 -0600348 debug("fdt_stringlist_search() failed: %d\n", index);
Stephen Warren135aa952016-06-17 09:44:00 -0600349 return index;
350 }
351
352 return clk_get_by_index(dev, index, clk);
Simon Glasse70cc432016-01-20 19:43:02 -0700353}
Giulio Benettiefbdad32019-12-12 23:53:19 +0100354# endif /* OF_PLATDATA */
Patrice Chotardb108d8a2017-07-25 13:24:45 +0200355
Chunfeng Yund6464202020-01-09 11:35:07 +0800356int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk)
357{
358 int index;
359
360 debug("%s(node=%p, name=%s, clk=%p)\n", __func__,
361 ofnode_get_name(node), name, clk);
362 clk->dev = NULL;
363
364 index = ofnode_stringlist_search(node, "clock-names", name);
365 if (index < 0) {
366 debug("fdt_stringlist_search() failed: %d\n", index);
367 return index;
368 }
369
370 return clk_get_by_index_nodev(node, index, clk);
371}
372
373int clk_get_optional_nodev(ofnode node, const char *name, struct clk *clk)
374{
375 int ret;
376
377 ret = clk_get_by_name_nodev(node, name, clk);
378 if (ret == -ENODATA)
379 return 0;
380
381 return ret;
382}
383
Patrice Chotardb108d8a2017-07-25 13:24:45 +0200384int clk_release_all(struct clk *clk, int count)
385{
386 int i, ret;
387
388 for (i = 0; i < count; i++) {
389 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
390
391 /* check if clock has been previously requested */
392 if (!clk[i].dev)
393 continue;
394
395 ret = clk_disable(&clk[i]);
396 if (ret && ret != -ENOSYS)
397 return ret;
398
399 ret = clk_free(&clk[i]);
400 if (ret && ret != -ENOSYS)
401 return ret;
402 }
403
404 return 0;
405}
406
Simon Glass7423daa2016-07-04 11:58:03 -0600407#endif /* OF_CONTROL */
Stephen Warren135aa952016-06-17 09:44:00 -0600408
409int clk_request(struct udevice *dev, struct clk *clk)
410{
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200411 const struct clk_ops *ops;
Stephen Warren135aa952016-06-17 09:44:00 -0600412
413 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200414 if (!clk)
415 return 0;
416 ops = clk_dev_ops(dev);
Stephen Warren135aa952016-06-17 09:44:00 -0600417
418 clk->dev = dev;
419
420 if (!ops->request)
421 return 0;
422
423 return ops->request(clk);
424}
425
426int clk_free(struct clk *clk)
427{
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200428 const struct clk_ops *ops;
Stephen Warren135aa952016-06-17 09:44:00 -0600429
430 debug("%s(clk=%p)\n", __func__, clk);
Chunfeng Yunbd7c7982020-01-09 11:35:06 +0800431 if (!clk_valid(clk))
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200432 return 0;
433 ops = clk_dev_ops(clk->dev);
Stephen Warren135aa952016-06-17 09:44:00 -0600434
Simon Glassfb8c0d52020-02-03 07:35:54 -0700435 if (!ops->rfree)
Stephen Warren135aa952016-06-17 09:44:00 -0600436 return 0;
437
Simon Glassfb8c0d52020-02-03 07:35:54 -0700438 return ops->rfree(clk);
Stephen Warren135aa952016-06-17 09:44:00 -0600439}
440
441ulong clk_get_rate(struct clk *clk)
442{
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200443 const struct clk_ops *ops;
Stephen Warren135aa952016-06-17 09:44:00 -0600444
445 debug("%s(clk=%p)\n", __func__, clk);
Chunfeng Yunbd7c7982020-01-09 11:35:06 +0800446 if (!clk_valid(clk))
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200447 return 0;
448 ops = clk_dev_ops(clk->dev);
Stephen Warren135aa952016-06-17 09:44:00 -0600449
450 if (!ops->get_rate)
451 return -ENOSYS;
452
453 return ops->get_rate(clk);
454}
455
Lukasz Majewski0c660c22019-06-24 15:50:42 +0200456struct clk *clk_get_parent(struct clk *clk)
457{
458 struct udevice *pdev;
459 struct clk *pclk;
460
461 debug("%s(clk=%p)\n", __func__, clk);
Chunfeng Yunbd7c7982020-01-09 11:35:06 +0800462 if (!clk_valid(clk))
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200463 return NULL;
Lukasz Majewski0c660c22019-06-24 15:50:42 +0200464
465 pdev = dev_get_parent(clk->dev);
466 pclk = dev_get_clk_ptr(pdev);
467 if (!pclk)
468 return ERR_PTR(-ENODEV);
469
470 return pclk;
471}
472
Lukasz Majewski4aa78302019-06-24 15:50:43 +0200473long long clk_get_parent_rate(struct clk *clk)
474{
475 const struct clk_ops *ops;
476 struct clk *pclk;
477
478 debug("%s(clk=%p)\n", __func__, clk);
Chunfeng Yunbd7c7982020-01-09 11:35:06 +0800479 if (!clk_valid(clk))
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200480 return 0;
Lukasz Majewski4aa78302019-06-24 15:50:43 +0200481
482 pclk = clk_get_parent(clk);
483 if (IS_ERR(pclk))
484 return -ENODEV;
485
486 ops = clk_dev_ops(pclk->dev);
487 if (!ops->get_rate)
488 return -ENOSYS;
489
Lukasz Majewski1a961c92019-06-24 15:50:46 +0200490 /* Read the 'rate' if not already set or if proper flag set*/
491 if (!pclk->rate || pclk->flags & CLK_GET_RATE_NOCACHE)
Lukasz Majewski4aa78302019-06-24 15:50:43 +0200492 pclk->rate = clk_get_rate(pclk);
493
494 return pclk->rate;
495}
496
Stephen Warren135aa952016-06-17 09:44:00 -0600497ulong clk_set_rate(struct clk *clk, ulong rate)
498{
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200499 const struct clk_ops *ops;
Stephen Warren135aa952016-06-17 09:44:00 -0600500
501 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
Chunfeng Yunbd7c7982020-01-09 11:35:06 +0800502 if (!clk_valid(clk))
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200503 return 0;
504 ops = clk_dev_ops(clk->dev);
Stephen Warren135aa952016-06-17 09:44:00 -0600505
506 if (!ops->set_rate)
507 return -ENOSYS;
508
509 return ops->set_rate(clk, rate);
510}
511
Philipp Tomsichf7d10462018-01-08 11:15:08 +0100512int clk_set_parent(struct clk *clk, struct clk *parent)
513{
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200514 const struct clk_ops *ops;
Philipp Tomsichf7d10462018-01-08 11:15:08 +0100515
516 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
Chunfeng Yunbd7c7982020-01-09 11:35:06 +0800517 if (!clk_valid(clk))
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200518 return 0;
519 ops = clk_dev_ops(clk->dev);
Philipp Tomsichf7d10462018-01-08 11:15:08 +0100520
521 if (!ops->set_parent)
522 return -ENOSYS;
523
524 return ops->set_parent(clk, parent);
525}
526
Stephen Warren135aa952016-06-17 09:44:00 -0600527int clk_enable(struct clk *clk)
528{
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200529 const struct clk_ops *ops;
Peng Fan0520be02019-08-21 13:35:09 +0000530 struct clk *clkp = NULL;
531 int ret;
Stephen Warren135aa952016-06-17 09:44:00 -0600532
533 debug("%s(clk=%p)\n", __func__, clk);
Chunfeng Yunbd7c7982020-01-09 11:35:06 +0800534 if (!clk_valid(clk))
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200535 return 0;
536 ops = clk_dev_ops(clk->dev);
Stephen Warren135aa952016-06-17 09:44:00 -0600537
Peng Fan0520be02019-08-21 13:35:09 +0000538 if (CONFIG_IS_ENABLED(CLK_CCF)) {
539 /* Take id 0 as a non-valid clk, such as dummy */
540 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
541 if (clkp->enable_count) {
542 clkp->enable_count++;
543 return 0;
544 }
545 if (clkp->dev->parent &&
546 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
547 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent));
548 if (ret) {
549 printf("Enable %s failed\n",
550 clkp->dev->parent->name);
551 return ret;
552 }
553 }
554 }
Stephen Warren135aa952016-06-17 09:44:00 -0600555
Peng Fan0520be02019-08-21 13:35:09 +0000556 if (ops->enable) {
557 ret = ops->enable(clk);
558 if (ret) {
559 printf("Enable %s failed\n", clk->dev->name);
560 return ret;
561 }
562 }
563 if (clkp)
564 clkp->enable_count++;
565 } else {
566 if (!ops->enable)
567 return -ENOSYS;
568 return ops->enable(clk);
569 }
570
571 return 0;
Stephen Warren135aa952016-06-17 09:44:00 -0600572}
573
Neil Armstronga855be82018-04-03 11:44:18 +0200574int clk_enable_bulk(struct clk_bulk *bulk)
575{
576 int i, ret;
577
578 for (i = 0; i < bulk->count; i++) {
579 ret = clk_enable(&bulk->clks[i]);
580 if (ret < 0 && ret != -ENOSYS)
581 return ret;
582 }
583
584 return 0;
585}
586
Stephen Warren135aa952016-06-17 09:44:00 -0600587int clk_disable(struct clk *clk)
588{
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200589 const struct clk_ops *ops;
Peng Fan0520be02019-08-21 13:35:09 +0000590 struct clk *clkp = NULL;
591 int ret;
Stephen Warren135aa952016-06-17 09:44:00 -0600592
593 debug("%s(clk=%p)\n", __func__, clk);
Chunfeng Yunbd7c7982020-01-09 11:35:06 +0800594 if (!clk_valid(clk))
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200595 return 0;
596 ops = clk_dev_ops(clk->dev);
Stephen Warren135aa952016-06-17 09:44:00 -0600597
Peng Fan0520be02019-08-21 13:35:09 +0000598 if (CONFIG_IS_ENABLED(CLK_CCF)) {
599 if (clk->id && !clk_get_by_id(clk->id, &clkp)) {
600 if (clkp->enable_count == 0) {
601 printf("clk %s already disabled\n",
602 clkp->dev->name);
603 return 0;
604 }
Stephen Warren135aa952016-06-17 09:44:00 -0600605
Peng Fan0520be02019-08-21 13:35:09 +0000606 if (--clkp->enable_count > 0)
607 return 0;
608 }
609
610 if (ops->disable) {
611 ret = ops->disable(clk);
612 if (ret)
613 return ret;
614 }
615
616 if (clkp && clkp->dev->parent &&
617 device_get_uclass_id(clkp->dev) == UCLASS_CLK) {
618 ret = clk_disable(dev_get_clk_ptr(clkp->dev->parent));
619 if (ret) {
620 printf("Disable %s failed\n",
621 clkp->dev->parent->name);
622 return ret;
623 }
624 }
625 } else {
626 if (!ops->disable)
627 return -ENOSYS;
628
629 return ops->disable(clk);
630 }
631
632 return 0;
Stephen Warren135aa952016-06-17 09:44:00 -0600633}
Simon Glasse70cc432016-01-20 19:43:02 -0700634
Neil Armstronga855be82018-04-03 11:44:18 +0200635int clk_disable_bulk(struct clk_bulk *bulk)
636{
637 int i, ret;
638
639 for (i = 0; i < bulk->count; i++) {
640 ret = clk_disable(&bulk->clks[i]);
641 if (ret < 0 && ret != -ENOSYS)
642 return ret;
643 }
644
645 return 0;
646}
647
Lukasz Majewski2796af72019-06-24 15:50:44 +0200648int clk_get_by_id(ulong id, struct clk **clkp)
649{
650 struct udevice *dev;
651 struct uclass *uc;
652 int ret;
653
654 ret = uclass_get(UCLASS_CLK, &uc);
655 if (ret)
656 return ret;
657
658 uclass_foreach_dev(dev, uc) {
659 struct clk *clk = dev_get_clk_ptr(dev);
660
661 if (clk && clk->id == id) {
662 *clkp = clk;
663 return 0;
664 }
665 }
666
667 return -ENOENT;
668}
669
Sekhar Noriacbb7cd2019-08-01 19:12:55 +0530670bool clk_is_match(const struct clk *p, const struct clk *q)
671{
672 /* trivial case: identical struct clk's or both NULL */
673 if (p == q)
674 return true;
675
Jean-Jacques Hiblot8a1661f2019-10-22 14:00:03 +0200676 /* trivial case #2: on the clk pointer is NULL */
677 if (!p || !q)
678 return false;
679
Sekhar Noriacbb7cd2019-08-01 19:12:55 +0530680 /* same device, id and data */
681 if (p->dev == q->dev && p->id == q->id && p->data == q->data)
682 return true;
683
684 return false;
685}
686
Jean-Jacques Hiblot52720c52019-10-22 14:00:04 +0200687static void devm_clk_release(struct udevice *dev, void *res)
688{
689 clk_free(res);
690}
691
692static int devm_clk_match(struct udevice *dev, void *res, void *data)
693{
694 return res == data;
695}
696
697struct clk *devm_clk_get(struct udevice *dev, const char *id)
698{
699 int rc;
700 struct clk *clk;
701
702 clk = devres_alloc(devm_clk_release, sizeof(struct clk), __GFP_ZERO);
703 if (unlikely(!clk))
704 return ERR_PTR(-ENOMEM);
705
706 rc = clk_get_by_name(dev, id, clk);
707 if (rc)
708 return ERR_PTR(rc);
709
710 devres_add(dev, clk);
711 return clk;
712}
713
714struct clk *devm_clk_get_optional(struct udevice *dev, const char *id)
715{
716 struct clk *clk = devm_clk_get(dev, id);
717
Chunfeng Yun0f9b2b32020-01-09 11:35:05 +0800718 if (PTR_ERR(clk) == -ENODATA)
Jean-Jacques Hiblot52720c52019-10-22 14:00:04 +0200719 return NULL;
720
721 return clk;
722}
723
724void devm_clk_put(struct udevice *dev, struct clk *clk)
725{
726 int rc;
727
728 if (!clk)
729 return;
730
731 rc = devres_release(dev, devm_clk_release, devm_clk_match, clk);
732 WARN_ON(rc);
733}
734
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200735int clk_uclass_post_probe(struct udevice *dev)
736{
737 /*
738 * when a clock provider is probed. Call clk_set_defaults()
739 * also after the device is probed. This takes care of cases
740 * where the DT is used to setup default parents and rates
741 * using assigned-clocks
742 */
743 clk_set_defaults(dev, 1);
744
745 return 0;
746}
747
Simon Glassf26c8a82015-06-23 15:39:15 -0600748UCLASS_DRIVER(clk) = {
749 .id = UCLASS_CLK,
750 .name = "clk",
Jean-Jacques Hiblotfd1ba292019-10-22 14:00:06 +0200751 .post_probe = clk_uclass_post_probe,
Simon Glassf26c8a82015-06-23 15:39:15 -0600752};