blob: 920d43ecc69186d2e643895ae66abb53db8f565c [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rick Chen7885ea82017-12-26 13:55:53 +08002/*
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
Rick Chen7885ea82017-12-26 13:55:53 +08005 */
6
Rick Chen7885ea82017-12-26 13:55:53 +08007#include <common.h>
Simon Glassb79fdc72020-05-10 11:39:54 -06008#include <flash.h>
Simon Glass9b4a2052019-12-28 10:45:05 -07009#include <init.h>
Simon Glass90526e92020-05-10 11:39:56 -060010#include <net.h>
Rick Chen7885ea82017-12-26 13:55:53 +080011#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
12#include <netdev.h>
13#endif
14#include <linux/io.h>
Rick Chen44199eb2018-05-29 11:07:53 +080015#include <faraday/ftsmc020.h>
16#include <fdtdec.h>
Rick Chenedf0acb2019-08-28 18:46:07 +080017#include <dm.h>
Rick Chencd61e862019-11-14 13:52:22 +080018#include <spl.h>
Rick Chen7885ea82017-12-26 13:55:53 +080019
20DECLARE_GLOBAL_DATA_PTR;
21
Rick Chen48cbf622018-12-03 17:48:20 +080022extern phys_addr_t prior_stage_fdt_address;
Rick Chen7885ea82017-12-26 13:55:53 +080023/*
24 * Miscellaneous platform dependent initializations
25 */
26
27int board_init(void)
28{
Rick Chen7885ea82017-12-26 13:55:53 +080029 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
30
31 return 0;
32}
33
34int dram_init(void)
35{
Rick Chen7e245182019-11-14 13:52:23 +080036 return fdtdec_setup_mem_size_base();
Rick Chen7885ea82017-12-26 13:55:53 +080037}
38
39int dram_init_banksize(void)
40{
Rick Chen7e245182019-11-14 13:52:23 +080041 return fdtdec_setup_memory_banksize();
Rick Chen7885ea82017-12-26 13:55:53 +080042}
43
44#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
45int board_eth_init(bd_t *bd)
46{
47 return ftmac100_initialize(bd);
48}
49#endif
50
51ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
52{
53 return 0;
54}
Rick Chend58717e2018-03-29 10:08:33 +080055
56void *board_fdt_blob_setup(void)
57{
Rick Chend58717e2018-03-29 10:08:33 +080058 return (void *)CONFIG_SYS_FDT_BASE;
59}
Rick Chen44199eb2018-05-29 11:07:53 +080060
61int smc_init(void)
62{
63 int node = -1;
64 const char *compat = "andestech,atfsmc020";
65 void *blob = (void *)gd->fdt_blob;
66 fdt_addr_t addr;
67 struct ftsmc020_bank *regs;
68
69 node = fdt_node_offset_by_compatible(blob, -1, compat);
70 if (node < 0)
71 return -FDT_ERR_NOTFOUND;
72
73 addr = fdtdec_get_addr(blob, node, "reg");
74
75 if (addr == FDT_ADDR_T_NONE)
76 return -EINVAL;
77
78 regs = (struct ftsmc020_bank *)addr;
79 regs->cr &= ~FTSMC020_BANK_WPROT;
80
81 return 0;
82}
83
Rick Chenedf0acb2019-08-28 18:46:07 +080084static void v5l2_init(void)
85{
86 struct udevice *dev;
87
88 uclass_get_device(UCLASS_CACHE, 0, &dev);
89}
90
Rick Chen44199eb2018-05-29 11:07:53 +080091#ifdef CONFIG_BOARD_EARLY_INIT_F
92int board_early_init_f(void)
93{
94 smc_init();
Rick Chenedf0acb2019-08-28 18:46:07 +080095 v5l2_init();
Rick Chen44199eb2018-05-29 11:07:53 +080096
97 return 0;
98}
99#endif
Rick Chencd61e862019-11-14 13:52:22 +0800100
101#ifdef CONFIG_SPL
102void board_boot_order(u32 *spl_boot_list)
103{
104 u8 i;
105 u32 boot_devices[] = {
106#ifdef CONFIG_SPL_RAM_SUPPORT
107 BOOT_DEVICE_RAM,
108#endif
109#ifdef CONFIG_SPL_MMC_SUPPORT
110 BOOT_DEVICE_MMC1,
111#endif
112 };
113
114 for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
115 spl_boot_list[i] = boot_devices[i];
116}
117#endif
118
119#ifdef CONFIG_SPL_LOAD_FIT
120int board_fit_config_name_match(const char *name)
121{
122 /* boot using first FIT config */
123 return 0;
124}
125#endif