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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 4f0e44e46615e3c827dcd1ec59677be1058d394c / . / drivers / pinctrl / Kconfig
blob: f6616c5329b1e4feaf0a948403887d1974a71cd9 [file] [log] [blame]
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900[diff] [blame]1#
2# PINCTRL infrastructure and drivers
3#
4
5menu "Pin controllers"
6
7config PINCTRL
8 bool "Support pin controllers"
9 depends on DM
10 help
11 This enables the basic support for pinctrl framework. You may want
12 to enable some more options depending on what you want to do.
13
14config PINCTRL_FULL
15 bool "Support full pin controllers"
16 depends on PINCTRL && OF_CONTROL
17 default y
18 help
19 This provides Linux-compatible device tree interface for the pinctrl
20 subsystem. This feature depends on device tree configuration because
21 it parses a device tree to look for the pinctrl device which the
22 peripheral device is associated with.
23
24 If this option is disabled (it is the only possible choice for non-DT
25 boards), the pinctrl core provides no systematic mechanism for
26 identifying peripheral devices, applying needed pinctrl settings.
27 It is totally up to the implementation of each low-level driver.
28 You can save memory footprint in return for some limitations.
29
30config PINCTRL_GENERIC
31 bool "Support generic pin controllers"
32 depends on PINCTRL_FULL
33 default y
34 help
35 Say Y here if you want to use the pinctrl subsystem through the
36 generic DT interface. If enabled, some functions become available
37 to parse common properties such as "pins", "groups", "functions" and
38 some pin configuration parameters. It would be easier if you only
39 need the generic DT interface for pin muxing and pin configuration.
40 If you need to handle vendor-specific DT properties, you can disable
41 this option and implement your own set_state callback in the pinctrl
42 operations.
43
44config PINMUX
45 bool "Support pin multiplexing controllers"
46 depends on PINCTRL_GENERIC
47 default y
48 help
49 This option enables pin multiplexing through the generic pinctrl
Simon Glass458a0702015-08-30 16:55:12 -0600[diff] [blame]50 framework. Most SoCs have their own own multiplexing arrangement
51 where a single pin can be used for several functions. An SoC pinctrl
52 driver allows the required function to be selected for each pin.
53 The driver is typically controlled by the device tree.
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900[diff] [blame]54
55config PINCONF
56 bool "Support pin configuration controllers"
57 depends on PINCTRL_GENERIC
58 help
59 This option enables pin configuration through the generic pinctrl
60 framework.
61
62config SPL_PINCTRL
63 bool "Support pin controlloers in SPL"
64 depends on SPL && SPL_DM
65 help
66 This option is an SPL-variant of the PINCTRL option.
67 See the help of PINCTRL for details.
68
69config SPL_PINCTRL_FULL
70 bool "Support full pin controllers in SPL"
71 depends on SPL_PINCTRL && SPL_OF_CONTROL
72 default y
73 help
74 This option is an SPL-variant of the PINCTRL_FULL option.
75 See the help of PINCTRL_FULL for details.
76
77config SPL_PINCTRL_GENERIC
78 bool "Support generic pin controllers in SPL"
79 depends on SPL_PINCTRL_FULL
80 default y
81 help
82 This option is an SPL-variant of the PINCTRL_GENERIC option.
83 See the help of PINCTRL_GENERIC for details.
84
85config SPL_PINMUX
86 bool "Support pin multiplexing controllers in SPL"
87 depends on SPL_PINCTRL_GENERIC
88 default y
89 help
90 This option is an SPL-variant of the PINMUX option.
91 See the help of PINMUX for details.
Simon Glass458a0702015-08-30 16:55:12 -0600[diff] [blame]92 The pinctrl subsystem can add a substantial overhead to the SPL
93 image since it typically requires quite a few tables either in the
94 driver or in the device tree. If this is acceptable and you need
95 to adjust pin multiplexing in SPL in order to boot into U-Boot,
96 enable this option. You will need to enable device tree in SPL
97 for this to work.
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900[diff] [blame]98
99config SPL_PINCONF
100 bool "Support pin configuration controllers in SPL"
101 depends on SPL_PINCTRL_GENERIC
102 help
103 This option is an SPL-variant of the PINCONF option.
104 See the help of PINCONF for details.
105
106if PINCTRL || SPL_PINCTRL
107
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]108config PINCTRL_AR933X
Wills Wanga79d0642016-03-16 16:59:55 +0800[diff] [blame]109 bool "QCA/Athores ar933x pin control driver"
110 depends on DM && SOC_AR933X
111 help
112 Support pin multiplexing control on QCA/Athores ar933x SoCs.
113 The driver is controlled by a device tree node which contains
114 both the GPIO definitions and pin control functions for each
115 available multiplex function.
116
Wenyou Yang9319a752017-03-23 12:44:37 +0800[diff] [blame]117config PINCTRL_AT91
118 bool "AT91 pinctrl driver"
119 depends on DM
120 help
121 This option is to enable the AT91 pinctrl driver for AT91 PIO
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]122 controller.
123
124 AT91 PIO controller is a combined gpio-controller, pin-mux and
125 pin-config module. Each I/O pin may be dedicated as a general-purpose
126 I/O or be assigned to a function of an embedded peripheral. Each I/O
127 pin has a glitch filter providing rejection of glitches lower than
128 one-half of peripheral clock cycle and a debouncing filter providing
129 rejection of unwanted pulses from key or push button operations. You
130 can also control the multi-driver capability, pull-up and pull-down
131 feature on each I/O pin.
Wenyou Yang9319a752017-03-23 12:44:37 +0800[diff] [blame]132
Wenyou Yangac72e172016-07-20 17:16:27 +0800[diff] [blame]133config PINCTRL_AT91PIO4
134 bool "AT91 PIO4 pinctrl driver"
135 depends on DM
136 help
137 This option is to enable the AT91 pinctrl driver for AT91 PIO4
138 controller which is available on SAMA5D2 SoC.
139
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]140config PINCTRL_PIC32
141 bool "Microchip PIC32 pin-control and pin-mux driver"
142 depends on DM && MACH_PIC32
143 default y
144 help
145 Supports individual pin selection and configuration for each
146 remappable peripheral available on Microchip PIC32
147 SoCs. This driver is controlled by a device tree node which
148 contains both GPIO defintion and pin control functions.
149
150config PINCTRL_QCA953X
151 bool "QCA/Athores qca953x pin control driver"
152 depends on DM && SOC_QCA953X
153 help
154 Support pin multiplexing control on QCA/Athores qca953x SoCs.
155
156 The driver is controlled by a device tree node which contains both
157 the GPIO definitions and pin control functions for each available
158 multiplex function.
159
160config PINCTRL_ROCKCHIP_RK3036
161 bool "Rockchip rk3036 pin control driver"
162 depends on DM
163 help
164 Support pin multiplexing control on Rockchip rk3036 SoCs.
165
166 The driver is controlled by a device tree node which contains both
167 the GPIO definitions and pin control functions for each available
168 multiplex function.
169
170config PINCTRL_ROCKCHIP_RK3188
171 bool "Rockchip rk3188 pin control driver"
172 depends on DM
173 help
174 Support pin multiplexing control on Rockchip rk3188 SoCs.
175
176 The driver is controlled by a device tree node which contains both
177 the GPIO definitions and pin control functions for each available
178 multiplex function.
179
180config PINCTRL_ROCKCHIP_RK3288
181 bool "Rockchip rk3288 pin control driver"
182 depends on DM
183 help
184 Support pin multiplexing control on Rockchip rk3288 SoCs.
185
186 The driver is controlled by a device tree node which contains both
187 the GPIO definitions and pin control functions for each available
188 multiplex function.
189
190config PINCTRL_ROCKCHIP_RK3328
Philipp Tomsichf3f1af92017-03-17 20:41:03 +0100[diff] [blame]191 bool "Rockchip rk3328 pin control driver"
Kever Yangd439a462017-02-23 15:37:53 +0800[diff] [blame]192 depends on DM
193 help
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]194 Support pin multiplexing control on Rockchip rk3328 SoCs.
Kever Yangd439a462017-02-23 15:37:53 +0800[diff] [blame]195
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]196 The driver is controlled by a device tree node which contains both
197 the GPIO definitions and pin control functions for each available
198 multiplex function.
199
200config PINCTRL_ROCKCHIP_RK3399
Philipp Tomsichf3f1af92017-03-17 20:41:03 +0100[diff] [blame]201 bool "Rockchip rk3399 pin control driver"
Kever Yanga2c08df2016-08-16 17:58:11 +0800[diff] [blame]202 depends on DM
203 help
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]204 Support pin multiplexing control on Rockchip rk3399 SoCs.
205
206 The driver is controlled by a device tree node which contains both
207 the GPIO definitions and pin control functions for each available
208 multiplex function.
Kever Yanga2c08df2016-08-16 17:58:11 +0800[diff] [blame]209
Masahiro Yamada9c6a3c62015-08-27 12:44:30 +0900[diff] [blame]210config PINCTRL_SANDBOX
211 bool "Sandbox pinctrl driver"
212 depends on SANDBOX
213 help
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]214 This enables pinctrl driver for sandbox.
Masahiro Yamada9c6a3c62015-08-27 12:44:30 +0900[diff] [blame]215
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]216 Currently, this driver actually does nothing but print debug
217 messages when pinctrl operations are invoked.
Vikas Manocha94d53082017-02-12 10:25:49 -0800[diff] [blame]218
Felix Brack44d5c372017-03-22 11:26:44 +0100[diff] [blame]219config PINCTRL_SINGLE
220 bool "Single register pin-control and pin-multiplex driver"
221 depends on DM
222 help
223 This enables pinctrl driver for systems using a single register for
224 pin configuration and multiplexing. TI's AM335X SoCs are examples of
225 such systems.
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]226
Felix Brack44d5c372017-03-22 11:26:44 +0100[diff] [blame]227 Depending on the platform make sure to also enable OF_TRANSLATE and
228 eventually SPL_OF_TRANSLATE to get correct address translations.
229
Philipp Tomsich51c7f342017-04-19 16:46:37 +0200[diff] [blame]230config PINCTRL_STI
231 bool "STMicroelectronics STi pin-control and pin-mux driver"
232 depends on DM && ARCH_STI
233 default y
234 help
235 Support pin multiplexing control on STMicrolectronics STi SoCs.
236
237 The driver is controlled by a device tree node which contains both
238 the GPIO definitions and pin control functions for each available
239 multiplex function.
240
241config PINCTRL_STM32
242 bool "ST STM32 pin control driver"
243 depends on DM
244 help
245 Supports pin multiplexing control on stm32 SoCs.
246
247 The driver is controlled by a device tree node which contains both
248 the GPIO definitions and pin control functions for each available
249 multiplex function.
250
maxims@google.com4f0e44e2017-04-17 12:00:27 -0700[diff] [blame^]251config ASPEED_AST2500_PINCTRL
252 bool "Aspeed AST2500 pin control driver"
253 depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
254 default y
255 help
256 Support pin multiplexing control on Aspeed ast2500 SoC. The driver uses
257 Generic Pinctrl framework and is compatible with the Linux driver,
258 i.e. it uses the same device tree configuration.
259
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900[diff] [blame]260endif
261
Beniamino Galvani677b5352016-08-16 11:49:49 +0200[diff] [blame]262source "drivers/pinctrl/meson/Kconfig"
Peng Fan745df682016-02-03 10:06:07 +0800[diff] [blame]263source "drivers/pinctrl/nxp/Kconfig"
Masahiro Yamada5dc626f2015-09-11 20:17:32 +0900[diff] [blame]264source "drivers/pinctrl/uniphier/Kconfig"
Thomas Abraham16ca80a2016-04-23 22:18:08 +0530[diff] [blame]265source "drivers/pinctrl/exynos/Kconfig"
Konstantin Porotchkin656e6cc2016-12-08 12:22:29 +0200[diff] [blame]266source "drivers/pinctrl/mvebu/Kconfig"
Masahiro Yamada5dc626f2015-09-11 20:17:32 +0900[diff] [blame]267
Masahiro Yamadad90a5a32015-08-27 12:44:29 +0900[diff] [blame]268endmenu