blob: 5be60af18ca5fadaba30fe56ae04d8b64733b628 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manochae66c49f2016-02-11 15:47:20 -08002/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manochae66c49f2016-02-11 15:47:20 -08005 */
6
7#include <common.h>
Vikas Manocha2d9c33c2017-04-10 15:02:54 -07008#include <dm.h>
yannick fertre92eac582018-03-02 15:59:28 +01009#include <lcd.h>
Patrice Chotard77594d72019-02-22 15:04:44 +010010#include <miiphy.h>
11#include <phy_interface.h>
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070012#include <ram.h>
Simon Glassb03e0512019-11-14 12:57:24 -070013#include <serial.h>
Vikas Manochab9747692017-05-28 12:55:10 -070014#include <spl.h>
yannick fertre92eac582018-03-02 15:59:28 +010015#include <splash.h>
16#include <st_logo_data.h>
17#include <video.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080018#include <asm/io.h>
19#include <asm/armv7m.h>
20#include <asm/arch/stm32.h>
21#include <asm/arch/gpio.h>
Michael Kurzb20b70f2017-01-22 16:04:27 +010022#include <asm/arch/syscfg.h>
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070023#include <asm/gpio.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080024
25DECLARE_GLOBAL_DATA_PTR;
26
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090027int dram_init(void)
28{
Vikas Manochab9747692017-05-28 12:55:10 -070029#ifndef CONFIG_SUPPORT_SPL
Patrice Chotard8ff21d62018-08-03 13:09:55 +020030 int rv;
Vikas Manochab9747692017-05-28 12:55:10 -070031 struct udevice *dev;
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070032 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
33 if (rv) {
34 debug("DRAM init failed: %d\n", rv);
35 return rv;
36 }
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090037
Vikas Manochab9747692017-05-28 12:55:10 -070038#endif
Patrice Chotard8ff21d62018-08-03 13:09:55 +020039 return fdtdec_setup_mem_size_base();
Vikas Manocha57af3cc2017-04-10 15:03:01 -070040}
41
42int dram_init_banksize(void)
43{
Patrice Chotard8ff21d62018-08-03 13:09:55 +020044 return fdtdec_setup_memory_banksize();
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090045}
46
Vikas Manocha280057b2017-04-10 15:02:59 -070047int board_early_init_f(void)
Michael Kurzd4363ba2017-01-22 16:04:30 +010048{
Michael Kurzd4363ba2017-01-22 16:04:30 +010049 return 0;
50}
Michael Kurzd4363ba2017-01-22 16:04:30 +010051
Vikas Manochab9747692017-05-28 12:55:10 -070052#ifdef CONFIG_SPL_BUILD
Vikas Manocha55a3ef72017-05-28 12:55:13 -070053#ifdef CONFIG_SPL_OS_BOOT
54int spl_start_uboot(void)
55{
56 debug("SPL: booting kernel\n");
57 /* break into full u-boot on 'c' */
58 return serial_tstc() && serial_getc() == 'c';
59}
60#endif
61
Vikas Manochab9747692017-05-28 12:55:10 -070062int spl_dram_init(void)
63{
64 struct udevice *dev;
65 int rv;
66 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
67 if (rv)
68 debug("DRAM init failed: %d\n", rv);
69 return rv;
70}
71void spl_board_init(void)
72{
73 spl_dram_init();
74 preloader_console_init();
75 arch_cpu_init(); /* to configure mpu for sdram rw permissions */
76}
77u32 spl_boot_device(void)
78{
Vikas Manocha1a73bd82017-05-28 12:55:14 -070079 return BOOT_DEVICE_XIP;
Vikas Manochab9747692017-05-28 12:55:10 -070080}
81
82#endif
Vikas Manochae66c49f2016-02-11 15:47:20 -080083u32 get_board_rev(void)
84{
85 return 0;
86}
87
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070088int board_late_init(void)
89{
90 struct gpio_desc gpio = {};
91 int node;
92
93 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
94 if (node < 0)
95 return -1;
96
Simon Glass150c5af2017-05-30 21:47:09 -060097 gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070098 GPIOD_IS_OUT);
99
100 if (dm_gpio_is_valid(&gpio)) {
101 dm_gpio_set_value(&gpio, 0);
102 mdelay(10);
103 dm_gpio_set_value(&gpio, 1);
104 }
105
106 /* read button 1*/
107 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
108 if (node < 0)
109 return -1;
110
Simon Glass150c5af2017-05-30 21:47:09 -0600111 gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
112 &gpio, GPIOD_IS_IN);
Vikas Manocha2f80a9f2017-04-10 15:03:00 -0700113
114 if (dm_gpio_is_valid(&gpio)) {
115 if (dm_gpio_get_value(&gpio))
116 puts("usr button is at HIGH LEVEL\n");
117 else
118 puts("usr button is at LOW LEVEL\n");
119 }
120
121 return 0;
122}
123
Vikas Manochae66c49f2016-02-11 15:47:20 -0800124int board_init(void)
125{
Vikas Manocha57af3cc2017-04-10 15:03:01 -0700126 gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
Patrice Chotard20fe38e2018-01-18 14:10:05 +0100127
128#ifdef CONFIG_ETH_DESIGNWARE
Patrice Chotard77594d72019-02-22 15:04:44 +0100129 const char *phy_mode;
130 int node;
131
132 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,stm32-dwmac");
133 if (node < 0)
134 return -1;
135
136 phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
137
138 switch (phy_get_interface_by_name(phy_mode)) {
139 case PHY_INTERFACE_MODE_RMII:
140 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
141 break;
142 case PHY_INTERFACE_MODE_MII:
143 STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
144 break;
145 default:
146 printf("PHY interface %s not supported !\n", phy_mode);
147 }
Patrice Chotard20fe38e2018-01-18 14:10:05 +0100148#endif
149
yannick fertre92eac582018-03-02 15:59:28 +0100150#if defined(CONFIG_CMD_BMP)
151 bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
152 BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
153#endif /* CONFIG_CMD_BMP */
154
Vikas Manochae66c49f2016-02-11 15:47:20 -0800155 return 0;
156}