Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame^] | 1 | // SPDX-License-Identifier: BSD-3-Clause |
| 2 | /* |
| 3 | * Copyright (c) 2020, Yassine Oudjana <y.oudjana@protonmail.com> |
| 4 | */ |
| 5 | |
| 6 | #include "pm8994.dtsi" |
| 7 | #include "pmi8994.dtsi" |
| 8 | #include <dt-bindings/input/input.h> |
| 9 | #include <dt-bindings/gpio/gpio.h> |
| 10 | #include <dt-bindings/leds/common.h> |
| 11 | #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> |
| 12 | |
| 13 | / { |
| 14 | divclk1_cdc: divclk1 { |
| 15 | compatible = "gpio-gate-clock"; |
| 16 | clocks = <&rpmcc RPM_SMD_DIV_CLK1>; |
| 17 | #clock-cells = <0>; |
| 18 | enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>; |
| 19 | |
| 20 | pinctrl-names = "default"; |
| 21 | pinctrl-0 = <&divclk1_default>; |
| 22 | }; |
| 23 | |
| 24 | divclk4: divclk4 { |
| 25 | compatible = "fixed-clock"; |
| 26 | #clock-cells = <0>; |
| 27 | clock-frequency = <32768>; |
| 28 | clock-output-names = "divclk4"; |
| 29 | |
| 30 | pinctrl-names = "default"; |
| 31 | pinctrl-0 = <&divclk4_pin_a>; |
| 32 | }; |
| 33 | |
| 34 | gpio-keys { |
| 35 | compatible = "gpio-keys"; |
| 36 | |
| 37 | key-vol-up { |
| 38 | label = "Volume Up"; |
| 39 | gpios = <&pm8994_gpios 2 GPIO_ACTIVE_LOW>; |
| 40 | linux,code = <KEY_VOLUMEUP>; |
| 41 | wakeup-source; |
| 42 | debounce-interval = <15>; |
| 43 | }; |
| 44 | |
| 45 | key-dome { |
| 46 | label = "Home"; |
| 47 | gpios = <&tlmm 34 GPIO_ACTIVE_LOW>; |
| 48 | linux,code = <KEY_HOME>; |
| 49 | wakeup-source; |
| 50 | debounce-interval = <15>; |
| 51 | }; |
| 52 | }; |
| 53 | |
| 54 | irled { |
| 55 | compatible = "pwm-ir-tx"; |
| 56 | pwms = <&pm8994_lpg 1 1000000>; |
| 57 | |
| 58 | pinctrl-names = "default"; |
| 59 | pinctrl-0 = <&irled_default>; |
| 60 | }; |
| 61 | |
| 62 | reserved-memory { |
| 63 | memory@88800000 { |
| 64 | reg = <0x0 0x88800000 0x0 0x1400000>; |
| 65 | no-map; |
| 66 | }; |
| 67 | |
| 68 | /* This platform has all PIL regions offset by 0x1400000 */ |
| 69 | /delete-node/ mpss@88800000; |
| 70 | mpss_mem: mpss@89c00000 { |
| 71 | reg = <0x0 0x89c00000 0x0 0x6200000>; |
| 72 | no-map; |
| 73 | }; |
| 74 | |
| 75 | /delete-node/ adsp@8ea00000; |
| 76 | adsp_mem: adsp@8fe00000 { |
| 77 | reg = <0x0 0x8fe00000 0x0 0x1b00000>; |
| 78 | no-map; |
| 79 | }; |
| 80 | |
| 81 | /delete-node/ slpi@90500000; |
| 82 | slpi_mem: slpi@91900000 { |
| 83 | reg = <0x0 0x91900000 0x0 0xa00000>; |
| 84 | no-map; |
| 85 | }; |
| 86 | |
| 87 | /delete-node/ gpu@90f00000; |
| 88 | gpu_mem: gpu@92300000 { |
| 89 | compatible = "shared-dma-pool"; |
| 90 | reg = <0x0 0x92300000 0x0 0x2000>; |
| 91 | no-map; |
| 92 | }; |
| 93 | |
| 94 | /delete-node/ venus@91000000; |
| 95 | venus_mem: venus@92400000 { |
| 96 | reg = <0x0 0x92400000 0x0 0x500000>; |
| 97 | no-map; |
| 98 | }; |
| 99 | |
| 100 | ramoops@92900000 { |
| 101 | compatible = "ramoops"; |
| 102 | reg = <0x0 0x92900000 0x0 0x100000>; |
| 103 | no-map; |
| 104 | |
| 105 | record-size = <0x8000>; |
| 106 | console-size = <0x80000>; |
| 107 | ftrace-size = <0x20000>; |
| 108 | pmsg-size = <0x40000>; |
| 109 | }; |
| 110 | |
| 111 | /delete-node/ rmtfs; |
| 112 | rmtfs@f6c00000 { |
| 113 | compatible = "qcom,rmtfs-mem"; |
| 114 | reg = <0 0xf6c00000 0 0x200000>; |
| 115 | no-map; |
| 116 | |
| 117 | qcom,client-id = <1>; |
| 118 | qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>; |
| 119 | }; |
| 120 | |
| 121 | /delete-node/ mba@91500000; |
| 122 | mba_mem: mba@f6f00000 { |
| 123 | reg = <0x0 0xf6f00000 0x0 0x100000>; |
| 124 | no-map; |
| 125 | }; |
| 126 | }; |
| 127 | |
| 128 | vph_pwr: vph-pwr-regulator { |
| 129 | compatible = "regulator-fixed"; |
| 130 | regulator-name = "vph_pwr"; |
| 131 | regulator-min-microvolt = <3800000>; |
| 132 | regulator-max-microvolt = <3800000>; |
| 133 | regulator-always-on; |
| 134 | regulator-boot-on; |
| 135 | }; |
| 136 | |
| 137 | vdd_3v2_tp: vdd-3v2-tp { |
| 138 | compatible = "regulator-fixed"; |
| 139 | regulator-name = "vdd_3v2_tp"; |
| 140 | regulator-min-microvolt = <3200000>; |
| 141 | regulator-max-microvolt = <3200000>; |
| 142 | startup-delay-us = <4000>; |
| 143 | vin-supply = <&vph_pwr>; |
| 144 | |
| 145 | gpio = <&tlmm 73 0>; |
| 146 | enable-active-high; |
| 147 | }; |
| 148 | |
| 149 | vdd_3v3: rome-vreg { |
| 150 | compatible = "regulator-fixed"; |
| 151 | regulator-name = "vdd_3v3"; |
| 152 | regulator-min-microvolt = <3300000>; |
| 153 | regulator-max-microvolt = <3300000>; |
| 154 | startup-delay-us = <4000>; |
| 155 | vin-supply = <&vph_pwr_bbyp>; |
| 156 | |
| 157 | gpio = <&pm8994_gpios 9 0>; |
| 158 | enable-active-high; |
| 159 | pinctrl-names = "default"; |
| 160 | pinctrl-0 = <&rome_enable_default>; |
| 161 | |
| 162 | /* Required by QCA6174a - vddpe-3v3 */ |
| 163 | regulator-always-on; |
| 164 | }; |
| 165 | |
| 166 | /* WL_EN pin defined as a fixed regulator */ |
| 167 | wlan_en: wlan-en-1-8v { |
| 168 | compatible = "regulator-fixed"; |
| 169 | regulator-name = "wlan-en-regulator"; |
| 170 | regulator-min-microvolt = <1800000>; |
| 171 | regulator-max-microvolt = <1800000>; |
| 172 | |
| 173 | gpio = <&pm8994_gpios 8 0>; |
| 174 | /* WLAN card specific delay */ |
| 175 | startup-delay-us = <70000>; |
| 176 | enable-active-high; |
| 177 | pinctrl-names = "default"; |
| 178 | pinctrl-0 = <&wlan_en_default>; |
| 179 | }; |
| 180 | }; |
| 181 | |
| 182 | &adsp_pil { |
| 183 | status = "okay"; |
| 184 | }; |
| 185 | |
| 186 | &blsp2_i2c2 { |
| 187 | status = "okay"; |
| 188 | clock-frequency = <400000>; |
| 189 | |
| 190 | nfc: nfc@28 { |
| 191 | compatible = "nxp,nxp-nci-i2c"; |
| 192 | |
| 193 | reg = <0x28>; |
| 194 | |
| 195 | interrupt-parent = <&tlmm>; |
| 196 | interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; |
| 197 | |
| 198 | enable-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>; |
| 199 | firmware-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; |
| 200 | |
| 201 | pinctrl-names = "default"; |
| 202 | pinctrl-0 = <&nfc_default>; |
| 203 | }; |
| 204 | }; |
| 205 | |
| 206 | &blsp2_i2c3 { |
| 207 | status = "okay"; |
| 208 | |
| 209 | typec: typec@47 { |
| 210 | compatible = "ti,tusb320l"; |
| 211 | reg = <0x47>; |
| 212 | interrupt-parent = <&tlmm>; |
| 213 | interrupts = <63 IRQ_TYPE_EDGE_RISING>; |
| 214 | }; |
| 215 | }; |
| 216 | |
| 217 | &blsp2_i2c6 { |
| 218 | status = "okay"; |
| 219 | /* MSM_TS */ |
| 220 | }; |
| 221 | |
| 222 | &blsp1_uart2 { |
| 223 | status = "okay"; |
| 224 | label = "QCA_UART"; |
| 225 | |
| 226 | bluetooth: bluetooth { |
| 227 | compatible = "qcom,qca6174-bt"; |
| 228 | |
| 229 | enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>; |
| 230 | clocks = <&divclk4>; |
| 231 | }; |
| 232 | }; |
| 233 | |
| 234 | &gpu { |
| 235 | status = "okay"; |
| 236 | }; |
| 237 | |
| 238 | &mdss { |
| 239 | status = "okay"; |
| 240 | }; |
| 241 | |
| 242 | &mdss_dsi0 { |
| 243 | status = "okay"; |
| 244 | |
| 245 | vdd-supply = <&vreg_l2a_1p25>; |
| 246 | vddio-supply = <&vreg_l14a_1p8>; |
| 247 | |
| 248 | pinctrl-names = "default", "sleep"; |
| 249 | pinctrl-0 = <&mdss_dsi_default &mdss_te_default>; |
| 250 | pinctrl-1 = <&mdss_dsi_sleep &mdss_te_sleep>; |
| 251 | }; |
| 252 | |
| 253 | &mdss_dsi0_out { |
| 254 | status = "okay"; |
| 255 | |
| 256 | data-lanes = <0 1 2 3>; |
| 257 | }; |
| 258 | |
| 259 | &mdss_dsi0_phy { |
| 260 | status = "okay"; |
| 261 | |
| 262 | vcca-supply = <&vreg_l28a_0p925>; |
| 263 | }; |
| 264 | |
| 265 | &mmcc { |
| 266 | vdd-gfx-supply = <&vdd_gfx>; |
| 267 | }; |
| 268 | |
| 269 | &mss_pil { |
| 270 | status = "okay"; |
| 271 | |
| 272 | pll-supply = <&vreg_l12a_1p8>; |
| 273 | }; |
| 274 | |
| 275 | &pcie0 { |
| 276 | status = "okay"; |
| 277 | |
| 278 | /* Supplied by vdd_3v3, but choose wlan_en to drive enable pin high */ |
| 279 | vddpe-3v3-supply = <&wlan_en>; |
| 280 | vdda-supply = <&vreg_l28a_0p925>; |
| 281 | |
| 282 | perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; |
| 283 | wake-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; |
| 284 | }; |
| 285 | |
| 286 | &pcie_phy { |
| 287 | status = "okay"; |
| 288 | |
| 289 | vdda-phy-supply = <&vreg_l28a_0p925>; |
| 290 | vdda-pll-supply = <&vreg_l12a_1p8>; |
| 291 | }; |
| 292 | |
| 293 | &pm8994_resin { |
| 294 | status = "okay"; |
| 295 | |
| 296 | linux,code = <KEY_VOLUMEDOWN>; |
| 297 | }; |
| 298 | |
| 299 | &pm8994_lpg { |
| 300 | status = "okay"; |
| 301 | |
| 302 | qcom,power-source = <1>; |
| 303 | }; |
| 304 | |
| 305 | &pmi8994_lpg { |
| 306 | status = "okay"; |
| 307 | |
| 308 | qcom,power-source = <1>; |
| 309 | |
| 310 | multi-led { |
| 311 | color = <LED_COLOR_ID_RGB>; |
| 312 | function = LED_FUNCTION_STATUS; |
| 313 | |
| 314 | #address-cells = <1>; |
| 315 | #size-cells = <0>; |
| 316 | |
| 317 | led@1 { |
| 318 | reg = <1>; |
| 319 | color = <LED_COLOR_ID_BLUE>; |
| 320 | }; |
| 321 | |
| 322 | led@2 { |
| 323 | reg = <2>; |
| 324 | color = <LED_COLOR_ID_GREEN>; |
| 325 | }; |
| 326 | |
| 327 | led@3 { |
| 328 | reg = <3>; |
| 329 | color = <LED_COLOR_ID_RED>; |
| 330 | }; |
| 331 | }; |
| 332 | }; |
| 333 | |
| 334 | &slim_msm { |
| 335 | status = "okay"; |
| 336 | |
| 337 | slim@1 { |
| 338 | reg = <1>; |
| 339 | #address-cells = <2>; |
| 340 | #size-cells = <0>; |
| 341 | |
| 342 | tasha_ifd: tas-ifd@0,0 { |
| 343 | compatible = "slim217,1a0"; |
| 344 | reg = <0 0>; |
| 345 | }; |
| 346 | |
| 347 | wcd9335: codec@1,0 { |
| 348 | compatible = "slim217,1a0"; |
| 349 | reg = <1 0>; |
| 350 | |
| 351 | clock-names = "mclk", "slimbus"; |
| 352 | clocks = <&divclk1_cdc>, |
| 353 | <&rpmcc RPM_SMD_BB_CLK1>; |
| 354 | interrupt-parent = <&tlmm>; |
| 355 | interrupts = <54 IRQ_TYPE_LEVEL_HIGH>, |
| 356 | <53 IRQ_TYPE_LEVEL_HIGH>; |
| 357 | interrupt-names = "intr1", "intr2"; |
| 358 | interrupt-controller; |
| 359 | #interrupt-cells = <1>; |
| 360 | |
| 361 | pinctrl-0 = <&cdc_reset_active &wcd_intr_default>; |
| 362 | pinctrl-names = "default"; |
| 363 | |
| 364 | reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>; |
| 365 | slim-ifc-dev = <&tasha_ifd>; |
| 366 | |
| 367 | #sound-dai-cells = <1>; |
| 368 | |
| 369 | vdd-buck-supply = <&vreg_s4a_1p8>; |
| 370 | vdd-buck-sido-supply = <&vreg_s4a_1p8>; |
| 371 | vdd-rx-supply = <&vreg_s4a_1p8>; |
| 372 | vdd-tx-supply = <&vreg_s4a_1p8>; |
| 373 | vdd-vbat-supply = <&vph_pwr>; |
| 374 | vdd-micbias-supply = <&vph_pwr_bbyp>; |
| 375 | vdd-io-supply = <&vreg_s4a_1p8>; |
| 376 | }; |
| 377 | }; |
| 378 | }; |
| 379 | |
| 380 | &slpi_pil { |
| 381 | status = "okay"; |
| 382 | |
| 383 | px-supply = <&vreg_lvs2a_1p8>; |
| 384 | }; |
| 385 | |
| 386 | &usb3 { |
| 387 | status = "okay"; |
| 388 | extcon = <&typec>; |
| 389 | |
| 390 | qcom,select-utmi-as-pipe-clk; |
| 391 | }; |
| 392 | |
| 393 | &usb3_dwc3 { |
| 394 | extcon = <&typec>; |
| 395 | |
| 396 | /* usb3-phy is not used on this device */ |
| 397 | phys = <&hsusb_phy1>; |
| 398 | phy-names = "usb2-phy"; |
| 399 | |
| 400 | maximum-speed = "high-speed"; |
| 401 | snps,is-utmi-l1-suspend; |
| 402 | snps,usb2-gadget-lpm-disable; |
| 403 | snps,hird-threshold = /bits/ 8 <0>; |
| 404 | }; |
| 405 | |
| 406 | &hsusb_phy1 { |
| 407 | status = "okay"; |
| 408 | extcon = <&typec>; |
| 409 | |
| 410 | vdda-pll-supply = <&vreg_l12a_1p8>; |
| 411 | vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; |
| 412 | }; |
| 413 | |
| 414 | &ufshc { |
| 415 | status = "okay"; |
| 416 | |
| 417 | vcc-supply = <&vreg_l20a_2p95>; |
| 418 | vccq-supply = <&vreg_l25a_1p2>; |
| 419 | vccq2-supply = <&vreg_s4a_1p8>; |
| 420 | vdd-hba-supply = <&vreg_l25a_1p2>; |
| 421 | |
| 422 | vcc-max-microamp = <600000>; |
| 423 | vccq-max-microamp = <450000>; |
| 424 | vccq2-max-microamp = <450000>; |
| 425 | }; |
| 426 | |
| 427 | &ufsphy { |
| 428 | status = "okay"; |
| 429 | |
| 430 | vdda-phy-supply = <&vreg_l28a_0p925>; |
| 431 | vdda-pll-supply = <&vreg_l12a_1p8>; |
| 432 | }; |
| 433 | |
| 434 | &venus { |
| 435 | status = "okay"; |
| 436 | }; |
| 437 | |
| 438 | &rpm_requests { |
| 439 | regulators-0 { |
| 440 | compatible = "qcom,rpm-pm8994-regulators"; |
| 441 | |
| 442 | vdd_s1-supply = <&vph_pwr>; |
| 443 | vdd_s2-supply = <&vph_pwr>; |
| 444 | vdd_s3-supply = <&vph_pwr>; |
| 445 | vdd_s4-supply = <&vph_pwr>; |
| 446 | vdd_s5-supply = <&vph_pwr>; |
| 447 | vdd_s6-supply = <&vph_pwr>; |
| 448 | vdd_s7-supply = <&vph_pwr>; |
| 449 | vdd_s8-supply = <&vph_pwr>; |
| 450 | vdd_s9-supply = <&vph_pwr>; |
| 451 | vdd_s10-supply = <&vph_pwr>; |
| 452 | vdd_s11-supply = <&vph_pwr>; |
| 453 | vdd_s12-supply = <&vph_pwr>; |
| 454 | vdd_l1-supply = <&vreg_s1b_1p025>; |
| 455 | vdd_l2_l26_l28-supply = <&vreg_s3a_1p3>; |
| 456 | vdd_l3_l11-supply = <&vreg_s3a_1p3>; |
| 457 | vdd_l4_l27_l31-supply = <&vreg_s3a_1p3>; |
| 458 | vdd_l5_l7-supply = <&vreg_s5a_2p15>; |
| 459 | vdd_l6_l12_l32-supply = <&vreg_s5a_2p15>; |
| 460 | vdd_l8_l16_l30-supply = <&vph_pwr>; |
| 461 | vdd_l9_l10_l18_l22-supply = <&vph_pwr_bbyp>; |
| 462 | vdd_l13_l19_l23_l24-supply = <&vph_pwr_bbyp>; |
| 463 | vdd_l14_l15-supply = <&vreg_s5a_2p15>; |
| 464 | vdd_l17_l29-supply = <&vph_pwr_bbyp>; |
| 465 | vdd_l20_l21-supply = <&vph_pwr_bbyp>; |
| 466 | vdd_l25-supply = <&vreg_s3a_1p3>; |
| 467 | vdd_lvs1_2-supply = <&vreg_s4a_1p8>; |
| 468 | |
| 469 | vreg_s3a_1p3: s3 { |
| 470 | regulator-name = "vreg_s3a_1p3"; |
| 471 | regulator-min-microvolt = <1300000>; |
| 472 | regulator-max-microvolt = <1300000>; |
| 473 | |
| 474 | /* Required by QCA6174a - vdd-core */ |
| 475 | regulator-always-on; |
| 476 | }; |
| 477 | vreg_s4a_1p8: s4 { |
| 478 | regulator-name = "vreg_s4a_1p8"; |
| 479 | regulator-min-microvolt = <1800000>; |
| 480 | regulator-max-microvolt = <1800000>; |
| 481 | regulator-allow-set-load; |
| 482 | |
| 483 | /* Required by QCA6174a - vddio */ |
| 484 | regulator-always-on; |
| 485 | }; |
| 486 | vreg_s5a_2p15: s5 { |
| 487 | regulator-name = "vreg_s5a_2p15"; |
| 488 | regulator-min-microvolt = <2150000>; |
| 489 | regulator-max-microvolt = <2150000>; |
| 490 | }; |
| 491 | vreg_s7a_0p8: s7 { |
| 492 | regulator-name = "vreg_s7a_0p8"; |
| 493 | regulator-min-microvolt = <800000>; |
| 494 | regulator-max-microvolt = <800000>; |
| 495 | }; |
| 496 | vreg_l1a_1p0: l1 { |
| 497 | regulator-name = "vreg_l1a_1p0"; |
| 498 | regulator-min-microvolt = <1000000>; |
| 499 | regulator-max-microvolt = <1000000>; |
| 500 | }; |
| 501 | vreg_l2a_1p25: l2 { |
| 502 | regulator-name = "vreg_l2a_1p25"; |
| 503 | regulator-min-microvolt = <1250000>; |
| 504 | regulator-max-microvolt = <1250000>; |
| 505 | }; |
| 506 | vreg_l4a_1p225: l4 { |
| 507 | regulator-name = "vreg_l4a_1p225"; |
| 508 | regulator-min-microvolt = <1225000>; |
| 509 | regulator-max-microvolt = <1225000>; |
| 510 | }; |
| 511 | vreg_l6a_1p8: l6 { |
| 512 | regulator-name = "vreg_l6a_1p8"; |
| 513 | regulator-min-microvolt = <1800000>; |
| 514 | regulator-max-microvolt = <1800000>; |
| 515 | }; |
| 516 | vreg_l8a_1p8: l8 { |
| 517 | regulator-name = "vreg_l8a_1p8"; |
| 518 | regulator-min-microvolt = <1800000>; |
| 519 | regulator-max-microvolt = <1800000>; |
| 520 | }; |
| 521 | vreg_l9a_1p8: l9 { |
| 522 | regulator-name = "vreg_l9a_1p8"; |
| 523 | regulator-min-microvolt = <1800000>; |
| 524 | regulator-max-microvolt = <1800000>; |
| 525 | }; |
| 526 | vreg_l10a_1p8: l10 { |
| 527 | regulator-name = "vreg_l10a_1p8"; |
| 528 | regulator-min-microvolt = <1800000>; |
| 529 | regulator-max-microvolt = <1800000>; |
| 530 | }; |
| 531 | vreg_l12a_1p8: l12 { |
| 532 | regulator-name = "vreg_l12a_1p8"; |
| 533 | regulator-min-microvolt = <1800000>; |
| 534 | regulator-max-microvolt = <1800000>; |
| 535 | regulator-allow-set-load; |
| 536 | }; |
| 537 | vreg_l13a_2p95: l13 { |
| 538 | regulator-name = "vreg_l13a_2p95"; |
| 539 | regulator-min-microvolt = <1800000>; |
| 540 | regulator-max-microvolt = <2950000>; |
| 541 | }; |
| 542 | vreg_l14a_1p8: l14 { |
| 543 | regulator-name = "vreg_l14a_1p8"; |
| 544 | regulator-min-microvolt = <1800000>; |
| 545 | regulator-max-microvolt = <1800000>; |
| 546 | }; |
| 547 | vreg_l15a_1p8: l15 { |
| 548 | regulator-name = "vreg_l15a_1p8"; |
| 549 | regulator-min-microvolt = <1800000>; |
| 550 | regulator-max-microvolt = <1800000>; |
| 551 | }; |
| 552 | vreg_l16a_2p7: l16 { |
| 553 | regulator-name = "vreg_l16a_2p7"; |
| 554 | regulator-min-microvolt = <2700000>; |
| 555 | regulator-max-microvolt = <2700000>; |
| 556 | }; |
| 557 | vreg_l19a_3p3: l19 { |
| 558 | regulator-name = "vreg_l19a_3p3"; |
| 559 | regulator-min-microvolt = <3000000>; |
| 560 | regulator-max-microvolt = <3000000>; |
| 561 | }; |
| 562 | vreg_l20a_2p95: l20 { |
| 563 | regulator-name = "vreg_l20a_2p95"; |
| 564 | regulator-min-microvolt = <2950000>; |
| 565 | regulator-max-microvolt = <2950000>; |
| 566 | regulator-allow-set-load; |
| 567 | }; |
| 568 | vreg_l21a_2p95: l21 { |
| 569 | regulator-name = "vreg_l21a_2p95"; |
| 570 | regulator-min-microvolt = <3300000>; |
| 571 | regulator-max-microvolt = <3300000>; |
| 572 | regulator-always-on; |
| 573 | }; |
| 574 | vreg_l23a_2p8: l23 { |
| 575 | regulator-name = "vreg_l23a_2p8"; |
| 576 | regulator-min-microvolt = <2800000>; |
| 577 | regulator-max-microvolt = <2800000>; |
| 578 | }; |
| 579 | vreg_l24a_3p075: l24 { |
| 580 | regulator-name = "vreg_l24a_3p075"; |
| 581 | regulator-min-microvolt = <3075000>; |
| 582 | regulator-max-microvolt = <3075000>; |
| 583 | }; |
| 584 | vreg_l25a_1p2: l25 { |
| 585 | regulator-name = "vreg_l25a_1p2"; |
| 586 | regulator-min-microvolt = <1200000>; |
| 587 | regulator-max-microvolt = <1200000>; |
| 588 | regulator-allow-set-load; |
| 589 | }; |
| 590 | vreg_l27a_1p2: l27 { |
| 591 | regulator-name = "vreg_l27a_1p2"; |
| 592 | regulator-min-microvolt = <1200000>; |
| 593 | regulator-max-microvolt = <1200000>; |
| 594 | }; |
| 595 | vreg_l28a_0p925: l28 { |
| 596 | regulator-name = "vreg_l28a_0p925"; |
| 597 | regulator-min-microvolt = <925000>; |
| 598 | regulator-max-microvolt = <925000>; |
| 599 | regulator-allow-set-load; |
| 600 | }; |
| 601 | vreg_l30a_1p8: l30 { |
| 602 | regulator-name = "vreg_l30a_1p8"; |
| 603 | regulator-min-microvolt = <1800000>; |
| 604 | regulator-max-microvolt = <1800000>; |
| 605 | |
| 606 | /* Required by QCA6174a - vddio-xtal */ |
| 607 | regulator-always-on; |
| 608 | }; |
| 609 | vreg_l32a_1p8: l32 { |
| 610 | regulator-name = "vreg_l32a_1p8"; |
| 611 | regulator-min-microvolt = <1800000>; |
| 612 | regulator-max-microvolt = <1800000>; |
| 613 | }; |
| 614 | vreg_lvs1a_1p8: lvs1 { |
| 615 | regulator-min-microvolt = <1800000>; |
| 616 | regulator-max-microvolt = <1800000>; |
| 617 | }; |
| 618 | vreg_lvs2a_1p8: lvs2 { |
| 619 | regulator-min-microvolt = <1800000>; |
| 620 | regulator-max-microvolt = <1800000>; |
| 621 | }; |
| 622 | }; |
| 623 | |
| 624 | regulators-1 { |
| 625 | compatible = "qcom,rpm-pmi8994-regulators"; |
| 626 | |
| 627 | vdd_s1-supply = <&vph_pwr>; |
| 628 | vdd_s2-supply = <&vph_pwr>; |
| 629 | vdd_s3-supply = <&vph_pwr>; |
| 630 | vdd_bst_byp-supply = <&vph_pwr>; |
| 631 | |
| 632 | vreg_s1b_1p025: s1 { |
| 633 | regulator-name = "vreg_s1b_1p025"; |
| 634 | regulator-min-microvolt = <1025000>; |
| 635 | regulator-max-microvolt = <1025000>; |
| 636 | }; |
| 637 | |
| 638 | vph_pwr_bbyp: boost-bypass { |
| 639 | regulator-name = "vph_pwr_bbyp"; |
| 640 | regulator-min-microvolt = <3150000>; |
| 641 | regulator-max-microvolt = <3600000>; |
| 642 | }; |
| 643 | }; |
| 644 | }; |
| 645 | |
| 646 | &pm8994_spmi_regulators { |
| 647 | qcom,saw-reg = <&saw3>; |
| 648 | s8 { |
| 649 | qcom,saw-slave; |
| 650 | }; |
| 651 | s9 { |
| 652 | qcom,saw-slave; |
| 653 | }; |
| 654 | s10 { |
| 655 | qcom,saw-slave; |
| 656 | }; |
| 657 | vreg_apc_0p8: s11 { |
| 658 | qcom,saw-leader; |
| 659 | regulator-name = "vreg_apc_0p8"; |
| 660 | regulator-min-microvolt = <470000>; |
| 661 | regulator-max-microvolt = <1140000>; |
| 662 | regulator-max-step-microvolt = <150000>; |
| 663 | regulator-always-on; |
| 664 | }; |
| 665 | }; |
| 666 | |
| 667 | &pmi8994_spmi_regulators { |
| 668 | vdd_gfx: s2 { |
| 669 | regulator-name = "vdd_gfx"; |
| 670 | regulator-min-microvolt = <400000>; |
| 671 | regulator-max-microvolt = <1015000>; |
| 672 | regulator-enable-ramp-delay = <500>; |
| 673 | }; |
| 674 | }; |
| 675 | |
| 676 | &pm8994_gpios { |
| 677 | irled_default: irled-default-state { |
| 678 | pins = "gpio5"; |
| 679 | function = PMIC_GPIO_FUNC_FUNC1; |
| 680 | output-low; |
| 681 | qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; |
| 682 | power-source = <PM8994_GPIO_S4>; |
| 683 | bias-disable; |
| 684 | }; |
| 685 | |
| 686 | wlan_en_default: wlan-en-state { |
| 687 | pins = "gpio8"; |
| 688 | function = PMIC_GPIO_FUNC_NORMAL; |
| 689 | output-low; |
| 690 | qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; |
| 691 | power-source = <PM8994_GPIO_S4>; |
| 692 | bias-disable; |
| 693 | }; |
| 694 | |
| 695 | rome_enable_default: rome-enable-state { |
| 696 | pins = "gpio9"; |
| 697 | function = PMIC_GPIO_FUNC_NORMAL; |
| 698 | output-high; |
| 699 | qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; |
| 700 | power-source = <PM8994_GPIO_VPH>; |
| 701 | }; |
| 702 | |
| 703 | divclk1_default: divclk1-state { |
| 704 | pins = "gpio15"; |
| 705 | function = PMIC_GPIO_FUNC_FUNC1; |
| 706 | bias-disable; |
| 707 | power-source = <PM8994_GPIO_S4>; |
| 708 | qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; |
| 709 | }; |
| 710 | |
| 711 | divclk4_pin_a: divclk4-state { |
| 712 | pins = "gpio18"; |
| 713 | function = PMIC_GPIO_FUNC_FUNC2; |
| 714 | bias-disable; |
| 715 | power-source = <PM8994_GPIO_S4>; |
| 716 | }; |
| 717 | }; |
| 718 | |
| 719 | &tlmm { |
| 720 | mdss_dsi_default: mdss-dsi-default-state { |
| 721 | pins = "gpio8"; |
| 722 | function = "gpio"; |
| 723 | drive-strength = <8>; |
| 724 | bias-disable; |
| 725 | }; |
| 726 | |
| 727 | mdss_dsi_sleep: mdss-dsi-sleep-state { |
| 728 | pins = "gpio8"; |
| 729 | function = "gpio"; |
| 730 | drive-strength = <2>; |
| 731 | bias-pull-down; |
| 732 | }; |
| 733 | |
| 734 | mdss_te_default: mdss-te-default-state { |
| 735 | pins = "gpio10"; |
| 736 | function = "mdp_vsync"; |
| 737 | drive-strength = <2>; |
| 738 | bias-pull-down; |
| 739 | }; |
| 740 | |
| 741 | mdss_te_sleep: mdss-te-sleep-state { |
| 742 | pins = "gpio10"; |
| 743 | function = "mdp_vsync"; |
| 744 | drive-strength = <2>; |
| 745 | bias-pull-down; |
| 746 | }; |
| 747 | |
| 748 | nfc_default: nfc-default-state { |
| 749 | pins = "gpio12", "gpio21"; |
| 750 | function = "gpio"; |
| 751 | drive-strength = <16>; |
| 752 | bias-pull-up; |
| 753 | }; |
| 754 | }; |