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Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +09001/*
2 * (C) Copyright 2007
3 * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
Nobuhiro Iwamatsu64f3c0b2009-02-27 18:35:41 +090026#include <netdev.h>
Nobuhiro Iwamatsub02bad12007-09-23 02:12:30 +090027#include <asm/processor.h>
Nobuhiro Iwamatsue92c95182008-03-12 12:15:29 +090028#include <asm/cache.h>
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090029
30int checkcpu(void)
31{
32 puts("CPU: SH4\n");
33 return 0;
34}
35
36int cpu_init (void)
37{
38 return 0;
39}
40
41int cleanup_before_linux (void)
42{
43 disable_interrupts();
44 return 0;
45}
46
47int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
48{
49 disable_interrupts();
50 reset_cpu (0);
51 return 0;
52}
53
Nobuhiro Iwamatsub02bad12007-09-23 02:12:30 +090054void flush_cache (unsigned long addr, unsigned long size)
55{
Nobuhiro Iwamatsue92c95182008-03-12 12:15:29 +090056 dcache_invalid_range( addr , addr + size );
Nobuhiro Iwamatsub02bad12007-09-23 02:12:30 +090057}
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090058
59void icache_enable (void)
60{
Nobuhiro Iwamatsub02bad12007-09-23 02:12:30 +090061 cache_control(0);
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090062}
63
64void icache_disable (void)
65{
Nobuhiro Iwamatsub02bad12007-09-23 02:12:30 +090066 cache_control(1);
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090067}
68
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090069int icache_status (void)
70{
Wolfgang Denk61fb15c52007-12-27 01:52:50 +010071 return 0;
Nobuhiro Iwamatsu0b135cf2007-05-13 20:58:00 +090072}
Nobuhiro Iwamatsub02bad12007-09-23 02:12:30 +090073
74void dcache_enable (void)
75{
76}
77
78void dcache_disable (void)
79{
80}
81
82int dcache_status (void)
83{
84 return 0;
85}
Nobuhiro Iwamatsubd3980c2008-11-21 12:04:18 +090086
87int cpu_eth_init(bd_t *bis)
88{
89#ifdef CONFIG_SH_ETHER
90 sh_eth_initialize(bis);
91#endif
92 return 0;
93}