Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2019 |
| 4 | * Alex Marginean, NXP |
| 5 | */ |
| 6 | |
Tom Rini | d678a59 | 2024-05-18 20:20:43 -0600 | [diff] [blame] | 7 | #include <common.h> |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 8 | #include <dm.h> |
Roger Quadros | 052bff8 | 2024-03-05 15:24:53 +0200 | [diff] [blame] | 9 | #include <dm/lists.h> |
| 10 | #include <eth_phy.h> |
Simon Glass | f7ae49f | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 11 | #include <log.h> |
Simon Glass | 336d461 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 12 | #include <malloc.h> |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 13 | #include <miiphy.h> |
| 14 | #include <dm/device-internal.h> |
Simon Glass | 336d461 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 15 | #include <dm/device_compat.h> |
Bin Meng | 33aad0b | 2021-03-14 20:14:47 +0800 | [diff] [blame] | 16 | #include <dm/of_extra.h> |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 17 | #include <dm/uclass-internal.h> |
Simon Glass | 336d461 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 18 | #include <linux/compat.h> |
Roger Quadros | a0e02c6 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 19 | #include <linux/delay.h> |
| 20 | |
| 21 | #define DEFAULT_GPIO_RESET_DELAY 10 /* in microseconds */ |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 22 | |
| 23 | void dm_mdio_probe_devices(void) |
| 24 | { |
| 25 | struct udevice *it; |
| 26 | struct uclass *uc; |
| 27 | |
| 28 | uclass_get(UCLASS_MDIO, &uc); |
| 29 | uclass_foreach_dev(it, uc) { |
| 30 | device_probe(it); |
| 31 | } |
| 32 | } |
| 33 | |
| 34 | static int dm_mdio_post_bind(struct udevice *dev) |
| 35 | { |
Alex Marginean | 6b3abc0 | 2019-07-25 12:33:17 +0300 | [diff] [blame] | 36 | const char *dt_name; |
| 37 | |
| 38 | /* set a custom name for the MDIO device, if present in DT */ |
Simon Glass | f10643c | 2020-12-19 10:40:14 -0700 | [diff] [blame] | 39 | if (dev_has_ofnode(dev)) { |
| 40 | dt_name = dev_read_string(dev, "device-name"); |
Alex Marginean | 6b3abc0 | 2019-07-25 12:33:17 +0300 | [diff] [blame] | 41 | if (dt_name) { |
| 42 | debug("renaming dev %s to %s\n", dev->name, dt_name); |
| 43 | device_set_name(dev, dt_name); |
| 44 | } |
| 45 | } |
| 46 | |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 47 | /* |
| 48 | * MDIO command doesn't like spaces in names, don't allow them to keep |
| 49 | * it happy |
| 50 | */ |
| 51 | if (strchr(dev->name, ' ')) { |
| 52 | debug("\nError: MDIO device name \"%s\" has a space!\n", |
| 53 | dev->name); |
| 54 | return -EINVAL; |
| 55 | } |
| 56 | |
Tim Harvey | f54002d | 2022-11-30 09:42:44 -0800 | [diff] [blame] | 57 | #if CONFIG_IS_ENABLED(OF_REAL) |
| 58 | return dm_scan_fdt_dev(dev); |
| 59 | #else |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 60 | return 0; |
Tim Harvey | f54002d | 2022-11-30 09:42:44 -0800 | [diff] [blame] | 61 | #endif |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 62 | } |
| 63 | |
Marek Behún | 351bfa6 | 2022-04-07 00:32:58 +0200 | [diff] [blame] | 64 | int dm_mdio_read(struct udevice *mdio_dev, int addr, int devad, int reg) |
| 65 | { |
| 66 | struct mdio_ops *ops = mdio_get_ops(mdio_dev); |
| 67 | |
| 68 | if (!ops->read) |
| 69 | return -ENOSYS; |
| 70 | |
| 71 | return ops->read(mdio_dev, addr, devad, reg); |
| 72 | } |
| 73 | |
| 74 | int dm_mdio_write(struct udevice *mdio_dev, int addr, int devad, int reg, |
| 75 | u16 val) |
| 76 | { |
| 77 | struct mdio_ops *ops = mdio_get_ops(mdio_dev); |
| 78 | |
| 79 | if (!ops->write) |
| 80 | return -ENOSYS; |
| 81 | |
| 82 | return ops->write(mdio_dev, addr, devad, reg, val); |
| 83 | } |
| 84 | |
| 85 | int dm_mdio_reset(struct udevice *mdio_dev) |
| 86 | { |
| 87 | struct mdio_ops *ops = mdio_get_ops(mdio_dev); |
Roger Quadros | a0e02c6 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 88 | struct mdio_perdev_priv *pdata = dev_get_uclass_priv(mdio_dev); |
| 89 | struct mii_dev *mii_bus = pdata->mii_bus; |
| 90 | |
| 91 | if (CONFIG_IS_ENABLED(DM_GPIO) && dm_gpio_is_valid(&mii_bus->reset_gpiod)) { |
| 92 | dm_gpio_set_value(&mii_bus->reset_gpiod, 1); |
| 93 | udelay(mii_bus->reset_delay_us); |
| 94 | dm_gpio_set_value(&mii_bus->reset_gpiod, 0); |
| 95 | if (mii_bus->reset_post_delay_us > 0) |
| 96 | udelay(mii_bus->reset_post_delay_us); |
| 97 | } |
Marek Behún | 351bfa6 | 2022-04-07 00:32:58 +0200 | [diff] [blame] | 98 | |
| 99 | if (!ops->reset) |
| 100 | return 0; |
| 101 | |
| 102 | return ops->reset(mdio_dev); |
| 103 | } |
| 104 | |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 105 | /* |
| 106 | * Following read/write/reset functions are registered with legacy MII code. |
| 107 | * These are called for PHY operations by upper layers and we further call the |
| 108 | * DM MDIO driver functions. |
| 109 | */ |
| 110 | static int mdio_read(struct mii_dev *mii_bus, int addr, int devad, int reg) |
| 111 | { |
Marek Behún | 1776a24 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 112 | return dm_mdio_read(mii_bus->priv, addr, devad, reg); |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 113 | } |
| 114 | |
| 115 | static int mdio_write(struct mii_dev *mii_bus, int addr, int devad, int reg, |
| 116 | u16 val) |
| 117 | { |
Marek Behún | 1776a24 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 118 | return dm_mdio_write(mii_bus->priv, addr, devad, reg, val); |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | static int mdio_reset(struct mii_dev *mii_bus) |
| 122 | { |
Marek Behún | 1776a24 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 123 | return dm_mdio_reset(mii_bus->priv); |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 124 | } |
| 125 | |
Roger Quadros | 052bff8 | 2024-03-05 15:24:53 +0200 | [diff] [blame] | 126 | static int mdio_bind_phy_nodes(struct udevice *mdio_dev) |
| 127 | { |
| 128 | ofnode mdio_node, phy_node; |
| 129 | struct udevice *phy_dev; |
| 130 | const char *node_name; |
| 131 | int ret; |
| 132 | |
| 133 | mdio_node = dev_ofnode(mdio_dev); |
| 134 | if (!ofnode_valid(mdio_node)) { |
| 135 | dev_dbg(mdio_dev, "invalid ofnode for mdio_dev\n"); |
| 136 | return -ENXIO; |
| 137 | } |
| 138 | |
| 139 | ofnode_for_each_subnode(phy_node, mdio_node) { |
| 140 | node_name = ofnode_get_name(phy_node); |
| 141 | dev_dbg(mdio_dev, "* Found child node: '%s'\n", node_name); |
| 142 | ret = device_bind_driver_to_node(mdio_dev, |
| 143 | "eth_phy_generic_drv", |
| 144 | node_name, phy_node, &phy_dev); |
| 145 | if (ret) { |
| 146 | dev_dbg(mdio_dev, " - Eth phy binding error: %d\n", ret); |
| 147 | continue; |
| 148 | } |
| 149 | |
| 150 | dev_dbg(mdio_dev, " - bound phy device: '%s'\n", node_name); |
| 151 | ret = device_probe(phy_dev); |
| 152 | if (ret) { |
| 153 | dev_dbg(mdio_dev, "Device '%s' probe failed\n", phy_dev->name); |
| 154 | device_unbind(phy_dev); |
| 155 | continue; |
| 156 | } |
| 157 | } |
| 158 | |
| 159 | return 0; |
| 160 | } |
| 161 | |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 162 | static int dm_mdio_post_probe(struct udevice *dev) |
| 163 | { |
| 164 | struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev); |
Roger Quadros | a0e02c6 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 165 | struct mii_dev *mii_bus; |
| 166 | int ret; |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 167 | |
Roger Quadros | a0e02c6 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 168 | mii_bus = mdio_alloc(); |
| 169 | if (!mii_bus) { |
| 170 | dev_err(dev, "couldn't allocate mii_bus\n"); |
| 171 | return -ENOMEM; |
| 172 | } |
| 173 | pdata->mii_bus = mii_bus; |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 174 | pdata->mii_bus->read = mdio_read; |
| 175 | pdata->mii_bus->write = mdio_write; |
| 176 | pdata->mii_bus->reset = mdio_reset; |
| 177 | pdata->mii_bus->priv = dev; |
Vladimir Oltean | bf35c31 | 2021-09-27 14:22:00 +0300 | [diff] [blame] | 178 | strlcpy(pdata->mii_bus->name, dev->name, MDIO_NAME_LEN); |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 179 | |
Roger Quadros | a0e02c6 | 2024-02-28 12:35:26 +0200 | [diff] [blame] | 180 | if (IS_ENABLED(CONFIG_DM_GPIO)) { |
| 181 | /* Get bus level PHY reset GPIO details */ |
| 182 | mii_bus->reset_delay_us = dev_read_u32_default(dev, "reset-delay-us", |
| 183 | DEFAULT_GPIO_RESET_DELAY); |
| 184 | mii_bus->reset_post_delay_us = dev_read_u32_default(dev, |
| 185 | "reset-post-delay-us", |
| 186 | 0); |
| 187 | ret = gpio_request_by_name(dev, "reset-gpios", 0, &mii_bus->reset_gpiod, |
| 188 | GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); |
| 189 | if (ret && ret != -ENOENT) { |
| 190 | dev_err(dev, "couldn't get reset-gpios: %d\n", ret); |
| 191 | return ret; |
| 192 | } |
| 193 | } |
| 194 | |
Roger Quadros | 052bff8 | 2024-03-05 15:24:53 +0200 | [diff] [blame] | 195 | if (CONFIG_IS_ENABLED(DM_ETH_PHY)) |
| 196 | mdio_bind_phy_nodes(dev); |
| 197 | |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 198 | return mdio_register(pdata->mii_bus); |
| 199 | } |
| 200 | |
| 201 | static int dm_mdio_pre_remove(struct udevice *dev) |
| 202 | { |
| 203 | struct mdio_perdev_priv *pdata = dev_get_uclass_priv(dev); |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 204 | |
Marek Behún | 1776a24 | 2022-04-07 00:32:59 +0200 | [diff] [blame] | 205 | dm_mdio_reset(dev); |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 206 | mdio_unregister(pdata->mii_bus); |
| 207 | mdio_free(pdata->mii_bus); |
| 208 | |
| 209 | return 0; |
| 210 | } |
| 211 | |
Marek Behún | 00b1bad | 2022-04-27 12:41:49 +0200 | [diff] [blame] | 212 | struct phy_device *dm_phy_find_by_ofnode(ofnode phynode) |
| 213 | { |
| 214 | struct mdio_perdev_priv *pdata; |
| 215 | struct udevice *mdiodev; |
| 216 | u32 phy_addr; |
| 217 | |
| 218 | if (ofnode_read_u32(phynode, "reg", &phy_addr)) |
| 219 | return NULL; |
| 220 | |
| 221 | if (uclass_get_device_by_ofnode(UCLASS_MDIO, |
| 222 | ofnode_get_parent(phynode), |
| 223 | &mdiodev)) |
| 224 | return NULL; |
| 225 | |
| 226 | if (device_probe(mdiodev)) |
| 227 | return NULL; |
| 228 | |
| 229 | pdata = dev_get_uclass_priv(mdiodev); |
| 230 | |
| 231 | return phy_find_by_mask(pdata->mii_bus, BIT(phy_addr)); |
| 232 | } |
| 233 | |
Alex Marginean | a5d32c3 | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 234 | struct phy_device *dm_mdio_phy_connect(struct udevice *mdiodev, int phyaddr, |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 235 | struct udevice *ethdev, |
| 236 | phy_interface_t interface) |
| 237 | { |
Alex Marginean | a5d32c3 | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 238 | struct mdio_perdev_priv *pdata = dev_get_uclass_priv(mdiodev); |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 239 | |
Alex Marginean | a5d32c3 | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 240 | if (device_probe(mdiodev)) |
| 241 | return NULL; |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 242 | |
Alex Marginean | a5d32c3 | 2019-11-25 17:15:11 +0200 | [diff] [blame] | 243 | return phy_connect(pdata->mii_bus, phyaddr, ethdev, interface); |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 244 | } |
| 245 | |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 246 | static struct phy_device *dm_eth_connect_phy_handle(struct udevice *ethdev, |
| 247 | phy_interface_t interface) |
| 248 | { |
| 249 | u32 phy_addr; |
| 250 | struct udevice *mdiodev; |
| 251 | struct phy_device *phy; |
Vladimir Oltean | f27bc8a | 2021-03-14 20:14:48 +0800 | [diff] [blame] | 252 | ofnode phynode; |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 253 | |
Simon Glass | b51b1a8 | 2023-02-22 09:33:51 -0700 | [diff] [blame] | 254 | if (IS_ENABLED(CONFIG_PHY_FIXED) && |
Vladimir Oltean | f27bc8a | 2021-03-14 20:14:48 +0800 | [diff] [blame] | 255 | ofnode_phy_is_fixed_link(dev_ofnode(ethdev), &phynode)) { |
| 256 | phy = phy_connect(NULL, 0, ethdev, interface); |
Rasmus Villemoes | bdf3192 | 2020-10-05 15:15:16 +0200 | [diff] [blame] | 257 | goto out; |
| 258 | } |
| 259 | |
Marek Behún | f3dd213 | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 260 | phynode = dev_get_phy_node(ethdev); |
| 261 | if (!ofnode_valid(phynode)) { |
Sean Anderson | 0851bd1 | 2020-09-15 10:44:53 -0400 | [diff] [blame] | 262 | dev_dbg(ethdev, "can't find PHY node\n"); |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 263 | return NULL; |
| 264 | } |
| 265 | |
| 266 | /* |
| 267 | * reading 'reg' directly should be fine. This is a PHY node, the |
| 268 | * address is always size 1 and requires no translation |
| 269 | */ |
Marek Behún | f3dd213 | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 270 | if (ofnode_read_u32(phynode, "reg", &phy_addr)) { |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 271 | dev_dbg(ethdev, "missing reg property in phy node\n"); |
| 272 | return NULL; |
| 273 | } |
| 274 | |
| 275 | if (uclass_get_device_by_ofnode(UCLASS_MDIO, |
Marek Behún | f3dd213 | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 276 | ofnode_get_parent(phynode), |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 277 | &mdiodev)) { |
Sean Anderson | 0851bd1 | 2020-09-15 10:44:53 -0400 | [diff] [blame] | 278 | dev_dbg(ethdev, "can't find MDIO bus for node %s\n", |
Marek Behún | f3dd213 | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 279 | ofnode_get_name(ofnode_get_parent(phynode))); |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 280 | return NULL; |
| 281 | } |
| 282 | |
| 283 | phy = dm_mdio_phy_connect(mdiodev, phy_addr, ethdev, interface); |
| 284 | |
Rasmus Villemoes | bdf3192 | 2020-10-05 15:15:16 +0200 | [diff] [blame] | 285 | out: |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 286 | if (phy) |
Marek Behún | f3dd213 | 2022-04-07 00:32:57 +0200 | [diff] [blame] | 287 | phy->node = phynode; |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 288 | |
| 289 | return phy; |
| 290 | } |
| 291 | |
| 292 | /* Connect to a PHY linked in eth DT node */ |
| 293 | struct phy_device *dm_eth_phy_connect(struct udevice *ethdev) |
| 294 | { |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 295 | phy_interface_t interface; |
| 296 | struct phy_device *phy; |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 297 | |
Simon Glass | f10643c | 2020-12-19 10:40:14 -0700 | [diff] [blame] | 298 | if (!dev_has_ofnode(ethdev)) { |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 299 | debug("%s: supplied eth dev has no DT node!\n", ethdev->name); |
| 300 | return NULL; |
| 301 | } |
| 302 | |
Marek Behún | 123ca11 | 2022-04-07 00:33:01 +0200 | [diff] [blame] | 303 | interface = dev_read_phy_mode(ethdev); |
Marek Behún | ffb0f6f | 2022-04-07 00:33:03 +0200 | [diff] [blame] | 304 | if (interface == PHY_INTERFACE_MODE_NA) |
| 305 | dev_dbg(ethdev, "can't find interface mode, default to NA\n"); |
Alex Marginean | 2f62455 | 2019-11-25 17:15:12 +0200 | [diff] [blame] | 306 | |
| 307 | phy = dm_eth_connect_phy_handle(ethdev, interface); |
| 308 | |
| 309 | if (!phy) |
| 310 | return NULL; |
| 311 | |
| 312 | phy->interface = interface; |
| 313 | |
| 314 | return phy; |
| 315 | } |
| 316 | |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 317 | UCLASS_DRIVER(mdio) = { |
| 318 | .id = UCLASS_MDIO, |
| 319 | .name = "mdio", |
| 320 | .post_bind = dm_mdio_post_bind, |
| 321 | .post_probe = dm_mdio_post_probe, |
| 322 | .pre_remove = dm_mdio_pre_remove, |
Simon Glass | 41575d8 | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 323 | .per_device_auto = sizeof(struct mdio_perdev_priv), |
Alex Marginean | c3452b5 | 2019-06-03 19:10:30 +0300 | [diff] [blame] | 324 | }; |