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Vikas Manochae66c49f2016-02-11 15:47:20 -08001/*
2 * (C) Copyright 2016
3 * Vikas Manocha, <vikas.manocha@st.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
Vikas Manocha2d9c33c2017-04-10 15:02:54 -07009#include <dm.h>
10#include <ram.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080011#include <asm/io.h>
12#include <asm/armv7m.h>
13#include <asm/arch/stm32.h>
14#include <asm/arch/gpio.h>
15#include <dm/platdata.h>
16#include <dm/platform_data/serial_stm32x7.h>
17#include <asm/arch/stm32_periph.h>
18#include <asm/arch/stm32_defs.h>
Michael Kurzb20b70f2017-01-22 16:04:27 +010019#include <asm/arch/syscfg.h>
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070020#include <asm/gpio.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080021
22DECLARE_GLOBAL_DATA_PTR;
23
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090024int dram_init(void)
25{
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070026 struct udevice *dev;
27 struct ram_info ram;
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090028 int rv;
29
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070030 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
31 if (rv) {
32 debug("DRAM init failed: %d\n", rv);
33 return rv;
34 }
35 rv = ram_get_info(dev, &ram);
36 if (rv) {
37 debug("Cannot get DRAM size: %d\n", rv);
38 return rv;
39 }
40 debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
41 gd->ram_size = ram.size;
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090042
43 /*
44 * Fill in global info with description of SRAM configuration
45 */
46 gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE;
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070047 gd->bd->bi_dram[0].size = ram.size;
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090048
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090049 return rv;
50}
51
Michael Kurzb20b70f2017-01-22 16:04:27 +010052#ifdef CONFIG_ETH_DESIGNWARE
Michael Kurzb20b70f2017-01-22 16:04:27 +010053static int stmmac_setup(void)
54{
Michael Kurzb20b70f2017-01-22 16:04:27 +010055 clock_setup(SYSCFG_CLOCK_CFG);
Michael Kurzb20b70f2017-01-22 16:04:27 +010056 /* Set >RMII mode */
57 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
Michael Kurzb20b70f2017-01-22 16:04:27 +010058 clock_setup(STMMAC_CLOCK_CFG);
59
60 return 0;
61}
Michael Kurzb20b70f2017-01-22 16:04:27 +010062
Vikas Manocha280057b2017-04-10 15:02:59 -070063int board_early_init_f(void)
Michael Kurzd4363ba2017-01-22 16:04:30 +010064{
Vikas Manocha280057b2017-04-10 15:02:59 -070065 stmmac_setup();
66
Michael Kurzd4363ba2017-01-22 16:04:30 +010067 return 0;
68}
69#endif
70
Vikas Manochae66c49f2016-02-11 15:47:20 -080071u32 get_board_rev(void)
72{
73 return 0;
74}
75
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070076int board_late_init(void)
77{
78 struct gpio_desc gpio = {};
79 int node;
80
81 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
82 if (node < 0)
83 return -1;
84
85 gpio_request_by_name_nodev(gd->fdt_blob, node, "led-gpio", 0, &gpio,
86 GPIOD_IS_OUT);
87
88 if (dm_gpio_is_valid(&gpio)) {
89 dm_gpio_set_value(&gpio, 0);
90 mdelay(10);
91 dm_gpio_set_value(&gpio, 1);
92 }
93
94 /* read button 1*/
95 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
96 if (node < 0)
97 return -1;
98
99 gpio_request_by_name_nodev(gd->fdt_blob, node, "button-gpio", 0, &gpio,
100 GPIOD_IS_IN);
101
102 if (dm_gpio_is_valid(&gpio)) {
103 if (dm_gpio_get_value(&gpio))
104 puts("usr button is at HIGH LEVEL\n");
105 else
106 puts("usr button is at LOW LEVEL\n");
107 }
108
109 return 0;
110}
111
Vikas Manochae66c49f2016-02-11 15:47:20 -0800112int board_init(void)
113{
114 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
115
116 return 0;
117}