Blame - include/configs/malta.h - platform/external/u-boot

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Tom Rini	83d290c	2018-05-06 17:58:06 -0400	[diff] [blame]	1	/* SPDX-License-Identifier: GPL-2.0 */
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	2	/*
				3	* Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	4	*/
				5
Paul Burton	7a9d109	2013-11-09 10:22:08 +0000	[diff] [blame]	6	#ifndef _MALTA_CONFIG_H
				7	#define _MALTA_CONFIG_H
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	8
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	9	/*
				10	* System configuration
				11	*/
Paul Burton	7a9d109	2013-11-09 10:22:08 +0000	[diff] [blame]	12	#define CONFIG_MALTA
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	13
Gabor Juhos	ab41305	2013-10-24 14:32:00 +0200	[diff] [blame]	14	#define CONFIG_MEMSIZE_IN_BYTES
				15
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	16	#define CONFIG_PCI_GT64120
Paul Burton	baf37f0	2013-11-08 11:18:50 +0000	[diff] [blame]	17	#define CONFIG_PCI_MSC01
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	18
Paul Burton	3ced12a	2013-11-08 11:18:55 +0000	[diff] [blame]	19	#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
				20
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	21	/*
				22	* CPU Configuration
				23	*/
				24	#define CONFIG_SYS_MHZ 250 /* arbitrary value */
				25	#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	26
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	27	/*
				28	* Memory map
				29	*/
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	30
Paul Burton	0f832b9	2016-05-26 14:49:36 +0100	[diff] [blame]	31	#ifdef CONFIG_64BIT
				32	# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
				33	#else
				34	# define CONFIG_SYS_SDRAM_BASE 0x80000000
				35	#endif
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	36	#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
				37
				38	#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
				39
Paul Burton	67d4752	2013-11-26 17:45:28 +0000	[diff] [blame]	40	#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	41
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	42	/*
				43	* Serial driver
				44	*/
Paul Burton	2e7eb12	2016-05-17 07:43:27 +0100	[diff] [blame]	45	#define CONFIG_SYS_NS16550_PORT_MAPPED
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	46
				47	/*
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	48	* Flash configuration
				49	*/
Paul Burton	0f832b9	2016-05-26 14:49:36 +0100	[diff] [blame]	50	#ifdef CONFIG_64BIT
				51	# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
				52	#else
				53	# define CONFIG_SYS_FLASH_BASE 0xbe000000
				54	#endif
Gabor Juhos	52caee0	2013-05-22 03:57:39 +0000	[diff] [blame]	55	#define CONFIG_SYS_MAX_FLASH_SECT 128
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	56
				57	/*
Paul Burton	fba6f45	2013-11-08 11:18:56 +0000	[diff] [blame]	58	* Environment
				59	*/
Paul Burton	fba6f45	2013-11-08 11:18:56 +0000	[diff] [blame]	60
				61	/*
Paul Burton	ba21a45	2015-01-29 10:38:20 +0000	[diff] [blame]	62	* IDE/ATA
				63	*/
Paul Burton	ba21a45	2015-01-29 10:38:20 +0000	[diff] [blame]	64
				65	/*
Gabor Juhos	5a4dcfa	2013-05-22 03:57:37 +0000	[diff] [blame]	66	* Commands
				67	*/
Gabor Juhos	feaa606	2013-05-22 03:57:42 +0000	[diff] [blame]	68
Paul Burton	7a9d109	2013-11-09 10:22:08 +0000	[diff] [blame]	69	#endif /* _MALTA_CONFIG_H */