blob: b23db3f1315443df5b95f2e7d8f9732c5aa5a7b3 [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
wdenk1a344f22005-02-03 23:00:49 +00002 * (C) Copyright 2000-2005
wdenkc6097192002-11-03 00:24:07 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * IDE support
27 */
Albert Aribaud113bfe42010-08-08 05:17:06 +053028
wdenkc6097192002-11-03 00:24:07 +000029#include <common.h>
30#include <config.h>
31#include <watchdog.h>
32#include <command.h>
33#include <image.h>
34#include <asm/byteorder.h>
Heiko Schocherf98984c2007-08-28 17:39:14 +020035#include <asm/io.h>
Grant Likely735dd972007-02-20 09:04:34 +010036
wdenkc6097192002-11-03 00:24:07 +000037#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
38# include <pcmcia.h>
39#endif
Grant Likely735dd972007-02-20 09:04:34 +010040
wdenkc6097192002-11-03 00:24:07 +000041#ifdef CONFIG_8xx
42# include <mpc8xx.h>
43#endif
Grant Likely735dd972007-02-20 09:04:34 +010044
wdenk132ba5f2004-02-27 08:20:54 +000045#ifdef CONFIG_MPC5xxx
46#include <mpc5xxx.h>
47#endif
Grant Likely735dd972007-02-20 09:04:34 +010048
Albert Aribaud113bfe42010-08-08 05:17:06 +053049#ifdef CONFIG_ORION5X
50#include <asm/arch/orion5x.h>
51#endif
52
wdenkc6097192002-11-03 00:24:07 +000053#include <ide.h>
54#include <ata.h>
Grant Likely735dd972007-02-20 09:04:34 +010055
wdenkc6097192002-11-03 00:24:07 +000056#ifdef CONFIG_STATUS_LED
57# include <status_led.h>
58#endif
Grant Likely735dd972007-02-20 09:04:34 +010059
Wolfgang Denkd87080b2006-03-31 18:32:53 +020060#ifdef CONFIG_IDE_8xx_DIRECT
61DECLARE_GLOBAL_DATA_PTR;
62#endif
63
wdenk5cf91d62004-04-23 20:32:05 +000064#ifdef __PPC__
65# define EIEIO __asm__ volatile ("eieio")
wdenk1a344f22005-02-03 23:00:49 +000066# define SYNC __asm__ volatile ("sync")
wdenk5cf91d62004-04-23 20:32:05 +000067#else
68# define EIEIO /* nothing */
wdenk1a344f22005-02-03 23:00:49 +000069# define SYNC /* nothing */
wdenkc6097192002-11-03 00:24:07 +000070#endif
71
wdenk15647dc2003-10-09 19:00:25 +000072#ifdef CONFIG_IDE_8xx_DIRECT
wdenkc6097192002-11-03 00:24:07 +000073/* Timings for IDE Interface
74 *
75 * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
76 * 70 165 30 PIO-Mode 0, [ns]
77 * 4 9 2 [Cycles]
78 * 50 125 20 PIO-Mode 1, [ns]
79 * 3 7 2 [Cycles]
80 * 30 100 15 PIO-Mode 2, [ns]
81 * 2 6 1 [Cycles]
82 * 30 80 10 PIO-Mode 3, [ns]
83 * 2 5 1 [Cycles]
84 * 25 70 10 PIO-Mode 4, [ns]
85 * 2 4 1 [Cycles]
86 */
87
88const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
89{
90 /* Setup Length Hold */
91 { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
92 { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
93 { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
94 { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
95 { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
96};
97
98static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
99
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200100#ifndef CONFIG_SYS_PIO_MODE
101#define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
wdenkc6097192002-11-03 00:24:07 +0000102#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200103static int pio_mode = CONFIG_SYS_PIO_MODE;
wdenkc6097192002-11-03 00:24:07 +0000104
105/* Make clock cycles and always round up */
106
107#define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
108
wdenk15647dc2003-10-09 19:00:25 +0000109#endif /* CONFIG_IDE_8xx_DIRECT */
110
wdenkc6097192002-11-03 00:24:07 +0000111/* ------------------------------------------------------------------------- */
112
113/* Current I/O Device */
114static int curr_device = -1;
115
116/* Current offset for IDE0 / IDE1 bus access */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
118#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
119 CONFIG_SYS_ATA_IDE0_OFFSET,
wdenkc6097192002-11-03 00:24:07 +0000120#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200121#if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
122 CONFIG_SYS_ATA_IDE1_OFFSET,
wdenkc6097192002-11-03 00:24:07 +0000123#endif
124};
125
wdenk15647dc2003-10-09 19:00:25 +0000126
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
wdenkc6097192002-11-03 00:24:07 +0000128
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200129block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
wdenkc6097192002-11-03 00:24:07 +0000130/* ------------------------------------------------------------------------- */
131
132#ifdef CONFIG_IDE_LED
Wolfgang Denk953b7e62010-06-13 18:28:54 +0200133# if !defined(CONFIG_BMS2003) && \
134 !defined(CONFIG_CPC45) && \
135 !defined(CONFIG_KUP4K) && \
136 !defined(CONFIG_KUP4X)
wdenkc6097192002-11-03 00:24:07 +0000137static void ide_led (uchar led, uchar status);
138#else
wdenk1f53a412002-12-04 23:39:58 +0000139extern void ide_led (uchar led, uchar status);
140#endif
141#else
wdenkc6097192002-11-03 00:24:07 +0000142#define ide_led(a,b) /* dummy */
143#endif
144
145#ifdef CONFIG_IDE_RESET
146static void ide_reset (void);
147#else
148#define ide_reset() /* dummy */
149#endif
150
151static void ide_ident (block_dev_desc_t *dev_desc);
152static uchar ide_wait (int dev, ulong t);
153
154#define IDE_TIME_OUT 2000 /* 2 sec timeout */
155
156#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
157
158#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
159
wdenkc6097192002-11-03 00:24:07 +0000160static void input_data(int dev, ulong *sect_buf, int words);
161static void output_data(int dev, ulong *sect_buf, int words);
162static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
163
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200164#ifndef CONFIG_SYS_ATA_PORT_ADDR
165#define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
Heiko Schocher566a4942007-06-22 19:11:54 +0200166#endif
wdenkc6097192002-11-03 00:24:07 +0000167
168#ifdef CONFIG_ATAPI
169static void atapi_inquiry(block_dev_desc_t *dev_desc);
Grant Likelyeb867a72007-02-20 09:05:45 +0100170ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
wdenkc6097192002-11-03 00:24:07 +0000171#endif
172
173
174#ifdef CONFIG_IDE_8xx_DIRECT
175static void set_pcmcia_timing (int pmode);
wdenkc6097192002-11-03 00:24:07 +0000176#endif
177
178/* ------------------------------------------------------------------------- */
179
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200180int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenkc6097192002-11-03 00:24:07 +0000181{
182 int rcode = 0;
183
184 switch (argc) {
185 case 0:
186 case 1:
Wolfgang Denk47e26b12010-07-17 01:06:04 +0200187 return cmd_usage(cmdtp);
wdenkc6097192002-11-03 00:24:07 +0000188 case 2:
189 if (strncmp(argv[1],"res",3) == 0) {
190 puts ("\nReset IDE"
191#ifdef CONFIG_IDE_8xx_DIRECT
192 " on PCMCIA " PCMCIA_SLOT_MSG
193#endif
194 ": ");
195
196 ide_init ();
197 return 0;
198 } else if (strncmp(argv[1],"inf",3) == 0) {
199 int i;
200
201 putc ('\n');
202
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
wdenkc6097192002-11-03 00:24:07 +0000204 if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
205 continue; /* list only known devices */
206 printf ("IDE device %d: ", i);
207 dev_print(&ide_dev_desc[i]);
208 }
209 return 0;
210
211 } else if (strncmp(argv[1],"dev",3) == 0) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200212 if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
wdenkc6097192002-11-03 00:24:07 +0000213 puts ("\nno IDE devices available\n");
214 return 1;
215 }
216 printf ("\nIDE device %d: ", curr_device);
217 dev_print(&ide_dev_desc[curr_device]);
218 return 0;
219 } else if (strncmp(argv[1],"part",4) == 0) {
220 int dev, ok;
221
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222 for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
wdenkc6097192002-11-03 00:24:07 +0000223 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
224 ++ok;
225 if (dev)
226 putc ('\n');
227 print_part(&ide_dev_desc[dev]);
228 }
229 }
230 if (!ok) {
231 puts ("\nno IDE devices available\n");
232 rcode ++;
233 }
234 return rcode;
235 }
Wolfgang Denk47e26b12010-07-17 01:06:04 +0200236 return cmd_usage(cmdtp);
wdenkc6097192002-11-03 00:24:07 +0000237 case 3:
238 if (strncmp(argv[1],"dev",3) == 0) {
239 int dev = (int)simple_strtoul(argv[2], NULL, 10);
240
241 printf ("\nIDE device %d: ", dev);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200242 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
wdenkc6097192002-11-03 00:24:07 +0000243 puts ("unknown device\n");
244 return 1;
245 }
246 dev_print(&ide_dev_desc[dev]);
247 /*ide_print (dev);*/
248
249 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
250 return 1;
251 }
252
253 curr_device = dev;
254
255 puts ("... is now current device\n");
256
257 return 0;
258 } else if (strncmp(argv[1],"part",4) == 0) {
259 int dev = (int)simple_strtoul(argv[2], NULL, 10);
260
261 if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
262 print_part(&ide_dev_desc[dev]);
263 } else {
264 printf ("\nIDE device %d not available\n", dev);
265 rcode = 1;
266 }
267 return rcode;
268#if 0
269 } else if (strncmp(argv[1],"pio",4) == 0) {
270 int mode = (int)simple_strtoul(argv[2], NULL, 10);
271
272 if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
273 puts ("\nSetting ");
274 pio_mode = mode;
275 ide_init ();
276 } else {
277 printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
278 mode, IDE_MAX_PIO_MODE);
279 }
280 return;
281#endif
282 }
283
Wolfgang Denk47e26b12010-07-17 01:06:04 +0200284 return cmd_usage(cmdtp);
wdenkc6097192002-11-03 00:24:07 +0000285 default:
286 /* at least 4 args */
287
288 if (strcmp(argv[1],"read") == 0) {
289 ulong addr = simple_strtoul(argv[2], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000290 ulong cnt = simple_strtoul(argv[4], NULL, 16);
291 ulong n;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200292#ifdef CONFIG_SYS_64BIT_LBA
wdenk42dfe7a2004-03-14 22:25:36 +0000293 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000294
Mike Frysinger6c6166f2009-02-16 23:21:36 -0500295 printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
wdenkc6097192002-11-03 00:24:07 +0000296 curr_device, blk, cnt);
wdenk42dfe7a2004-03-14 22:25:36 +0000297#else
298 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
299
300 printf ("\nIDE read: device %d block # %ld, count %ld ... ",
301 curr_device, blk, cnt);
302#endif
wdenkc6097192002-11-03 00:24:07 +0000303
304 n = ide_dev_desc[curr_device].block_read (curr_device,
305 blk, cnt,
306 (ulong *)addr);
307 /* flush cache after read */
308 flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
309
310 printf ("%ld blocks read: %s\n",
311 n, (n==cnt) ? "OK" : "ERROR");
312 if (n==cnt) {
313 return 0;
314 } else {
315 return 1;
316 }
317 } else if (strcmp(argv[1],"write") == 0) {
318 ulong addr = simple_strtoul(argv[2], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000319 ulong cnt = simple_strtoul(argv[4], NULL, 16);
320 ulong n;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200321#ifdef CONFIG_SYS_64BIT_LBA
wdenk42dfe7a2004-03-14 22:25:36 +0000322 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
wdenkc6097192002-11-03 00:24:07 +0000323
Mike Frysinger6c6166f2009-02-16 23:21:36 -0500324 printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
wdenkc6097192002-11-03 00:24:07 +0000325 curr_device, blk, cnt);
wdenk42dfe7a2004-03-14 22:25:36 +0000326#else
327 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
328
329 printf ("\nIDE write: device %d block # %ld, count %ld ... ",
330 curr_device, blk, cnt);
331#endif
wdenkc6097192002-11-03 00:24:07 +0000332
333 n = ide_write (curr_device, blk, cnt, (ulong *)addr);
334
335 printf ("%ld blocks written: %s\n",
336 n, (n==cnt) ? "OK" : "ERROR");
Wolfgang Denk47e26b12010-07-17 01:06:04 +0200337 if (n==cnt)
wdenkc6097192002-11-03 00:24:07 +0000338 return 0;
Wolfgang Denk47e26b12010-07-17 01:06:04 +0200339 else
wdenkc6097192002-11-03 00:24:07 +0000340 return 1;
wdenkc6097192002-11-03 00:24:07 +0000341 } else {
Wolfgang Denk47e26b12010-07-17 01:06:04 +0200342 return cmd_usage(cmdtp);
wdenkc6097192002-11-03 00:24:07 +0000343 }
344
345 return rcode;
346 }
347}
348
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200349int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenkc6097192002-11-03 00:24:07 +0000350{
351 char *boot_device = NULL;
352 char *ep;
353 int dev, part = 0;
Marian Balakowiczb97a2a02008-01-08 18:14:09 +0100354 ulong addr, cnt;
wdenkc6097192002-11-03 00:24:07 +0000355 disk_partition_t info;
356 image_header_t *hdr;
357 int rcode = 0;
Marian Balakowicz09475f72008-03-12 10:33:01 +0100358#if defined(CONFIG_FIT)
Marian Balakowicz3bab76a2008-06-06 23:07:40 +0200359 const void *fit_hdr = NULL;
Marian Balakowicz09475f72008-03-12 10:33:01 +0100360#endif
wdenkc6097192002-11-03 00:24:07 +0000361
Heiko Schocherfad63402007-07-13 09:54:17 +0200362 show_boot_progress (41);
wdenkc6097192002-11-03 00:24:07 +0000363 switch (argc) {
364 case 1:
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200365 addr = CONFIG_SYS_LOAD_ADDR;
wdenkc6097192002-11-03 00:24:07 +0000366 boot_device = getenv ("bootdevice");
367 break;
368 case 2:
369 addr = simple_strtoul(argv[1], NULL, 16);
370 boot_device = getenv ("bootdevice");
371 break;
372 case 3:
373 addr = simple_strtoul(argv[1], NULL, 16);
374 boot_device = argv[2];
375 break;
376 default:
Heiko Schocherfad63402007-07-13 09:54:17 +0200377 show_boot_progress (-42);
Wolfgang Denk47e26b12010-07-17 01:06:04 +0200378 return cmd_usage(cmdtp);
wdenkc6097192002-11-03 00:24:07 +0000379 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200380 show_boot_progress (42);
wdenkc6097192002-11-03 00:24:07 +0000381
382 if (!boot_device) {
383 puts ("\n** No boot device **\n");
Heiko Schocherfad63402007-07-13 09:54:17 +0200384 show_boot_progress (-43);
wdenkc6097192002-11-03 00:24:07 +0000385 return 1;
386 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200387 show_boot_progress (43);
wdenkc6097192002-11-03 00:24:07 +0000388
389 dev = simple_strtoul(boot_device, &ep, 16);
390
391 if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
392 printf ("\n** Device %d not available\n", dev);
Heiko Schocherfad63402007-07-13 09:54:17 +0200393 show_boot_progress (-44);
wdenkc6097192002-11-03 00:24:07 +0000394 return 1;
395 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200396 show_boot_progress (44);
wdenkc6097192002-11-03 00:24:07 +0000397
398 if (*ep) {
399 if (*ep != ':') {
400 puts ("\n** Invalid boot device, use `dev[:part]' **\n");
Heiko Schocherfad63402007-07-13 09:54:17 +0200401 show_boot_progress (-45);
wdenkc6097192002-11-03 00:24:07 +0000402 return 1;
403 }
404 part = simple_strtoul(++ep, NULL, 16);
405 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200406 show_boot_progress (45);
Denis Peter78827512007-04-13 09:13:33 +0200407 if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
Heiko Schocherfad63402007-07-13 09:54:17 +0200408 show_boot_progress (-46);
wdenkc6097192002-11-03 00:24:07 +0000409 return 1;
410 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200411 show_boot_progress (46);
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200412 if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
413 (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
wdenkc6097192002-11-03 00:24:07 +0000414 printf ("\n** Invalid partition type \"%.32s\""
415 " (expect \"" BOOT_PART_TYPE "\")\n",
416 info.type);
Heiko Schocherfad63402007-07-13 09:54:17 +0200417 show_boot_progress (-47);
wdenkc6097192002-11-03 00:24:07 +0000418 return 1;
419 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200420 show_boot_progress (47);
wdenkc6097192002-11-03 00:24:07 +0000421
422 printf ("\nLoading from IDE device %d, partition %d: "
423 "Name: %.32s Type: %.32s\n",
424 dev, part, info.name, info.type);
425
wdenk1a344f22005-02-03 23:00:49 +0000426 debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
wdenkc6097192002-11-03 00:24:07 +0000427 info.start, info.size, info.blksz);
428
429 if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
430 printf ("** Read error on %d:%d\n", dev, part);
Heiko Schocherfad63402007-07-13 09:54:17 +0200431 show_boot_progress (-48);
wdenkc6097192002-11-03 00:24:07 +0000432 return 1;
433 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200434 show_boot_progress (48);
wdenkc6097192002-11-03 00:24:07 +0000435
Marian Balakowicz9a4daad2008-02-29 14:58:34 +0100436 switch (genimg_get_format ((void *)addr)) {
Marian Balakowiczd5934ad2008-02-04 08:28:09 +0100437 case IMAGE_FORMAT_LEGACY:
438 hdr = (image_header_t *)addr;
wdenkc6097192002-11-03 00:24:07 +0000439
Marian Balakowiczd5934ad2008-02-04 08:28:09 +0100440 show_boot_progress (49);
441
442 if (!image_check_hcrc (hdr)) {
443 puts ("\n** Bad Header Checksum **\n");
444 show_boot_progress (-50);
445 return 1;
446 }
447 show_boot_progress (50);
448
449 image_print_contents (hdr);
450
451 cnt = image_get_image_size (hdr);
452 break;
453#if defined(CONFIG_FIT)
454 case IMAGE_FORMAT_FIT:
Marian Balakowicz09475f72008-03-12 10:33:01 +0100455 fit_hdr = (const void *)addr;
Marian Balakowicz09475f72008-03-12 10:33:01 +0100456 puts ("Fit image detected...\n");
457
458 cnt = fit_get_size (fit_hdr);
459 break;
Marian Balakowiczd5934ad2008-02-04 08:28:09 +0100460#endif
461 default:
Marian Balakowicz09475f72008-03-12 10:33:01 +0100462 show_boot_progress (-49);
Marian Balakowiczd5934ad2008-02-04 08:28:09 +0100463 puts ("** Unknown image type\n");
wdenkc6097192002-11-03 00:24:07 +0000464 return 1;
465 }
466
wdenk1a344f22005-02-03 23:00:49 +0000467 cnt += info.blksz - 1;
468 cnt /= info.blksz;
469 cnt -= 1;
470
wdenkc6097192002-11-03 00:24:07 +0000471 if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
472 (ulong *)(addr+info.blksz)) != cnt) {
473 printf ("** Read error on %d:%d\n", dev, part);
Heiko Schocherfad63402007-07-13 09:54:17 +0200474 show_boot_progress (-51);
wdenkc6097192002-11-03 00:24:07 +0000475 return 1;
476 }
Heiko Schocherfad63402007-07-13 09:54:17 +0200477 show_boot_progress (51);
wdenkc6097192002-11-03 00:24:07 +0000478
Marian Balakowicz09475f72008-03-12 10:33:01 +0100479#if defined(CONFIG_FIT)
480 /* This cannot be done earlier, we need complete FIT image in RAM first */
Marian Balakowicz3bab76a2008-06-06 23:07:40 +0200481 if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
482 if (!fit_check_format (fit_hdr)) {
483 show_boot_progress (-140);
484 puts ("** Bad FIT image format\n");
485 return 1;
486 }
487 show_boot_progress (141);
488 fit_print_contents (fit_hdr);
489 }
Marian Balakowicz09475f72008-03-12 10:33:01 +0100490#endif
wdenkc6097192002-11-03 00:24:07 +0000491
492 /* Loading ok, update default load address */
493
494 load_addr = addr;
495
496 /* Check if we should attempt an auto-start */
497 if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
498 char *local_args[2];
499 extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
500
501 local_args[0] = argv[0];
502 local_args[1] = NULL;
503
504 printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
505
506 do_bootm (cmdtp, 0, 1, local_args);
507 rcode = 1;
508 }
509 return rcode;
510}
511
512/* ------------------------------------------------------------------------- */
513
Stefan Roesef2302d42008-08-06 14:05:38 +0200514void inline
515__ide_outb(int dev, int port, unsigned char val)
516{
517 debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200518 dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
519 outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
Stefan Roesef2302d42008-08-06 14:05:38 +0200520}
Kim Phillips2df72b82009-05-19 12:53:36 -0500521void ide_outb (int dev, int port, unsigned char val)
Stefan Roesef2302d42008-08-06 14:05:38 +0200522 __attribute__((weak, alias("__ide_outb")));
523
524unsigned char inline
525__ide_inb(int dev, int port)
526{
527 uchar val;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200528 val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
Stefan Roesef2302d42008-08-06 14:05:38 +0200529 debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200530 dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
Stefan Roesef2302d42008-08-06 14:05:38 +0200531 return val;
532}
Kim Phillips2df72b82009-05-19 12:53:36 -0500533unsigned char ide_inb(int dev, int port)
Stefan Roesef2302d42008-08-06 14:05:38 +0200534 __attribute__((weak, alias("__ide_inb")));
535
Steven A. Falco36c2d302008-08-15 15:34:10 -0400536#ifdef CONFIG_TUNE_PIO
537int inline
538__ide_set_piomode(int pio_mode)
539{
540 return 0;
541}
542int inline ide_set_piomode(int pio_mode)
543 __attribute__((weak, alias("__ide_set_piomode")));
544#endif
545
wdenkc6097192002-11-03 00:24:07 +0000546void ide_init (void)
547{
wdenkc6097192002-11-03 00:24:07 +0000548
549#ifdef CONFIG_IDE_8xx_DIRECT
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200550 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenkc6097192002-11-03 00:24:07 +0000551 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
552#endif
553 unsigned char c;
554 int i, bus;
Wolfgang Denk953b7e62010-06-13 18:28:54 +0200555#if defined(CONFIG_SC3)
Wolfgang Denk9045f332007-06-08 10:24:58 +0200556 unsigned int ata_reset_time = ATA_RESET_TIME;
Wolfgang Denk51056dd2007-04-11 17:22:55 +0200557#endif
wdenk9fd5e312003-12-07 23:55:12 +0000558#ifdef CONFIG_IDE_8xx_PCCARD
559 extern int pcmcia_on (void);
560 extern int ide_devices_found; /* Initialized in check_ide_device() */
561#endif /* CONFIG_IDE_8xx_PCCARD */
562
563#ifdef CONFIG_IDE_PREINIT
wdenk4d13cba2004-03-14 14:09:05 +0000564 extern int ide_preinit (void);
wdenk9fd5e312003-12-07 23:55:12 +0000565 WATCHDOG_RESET();
566
567 if (ide_preinit ()) {
568 puts ("ide_preinit failed\n");
569 return;
570 }
571#endif /* CONFIG_IDE_PREINIT */
wdenkc6097192002-11-03 00:24:07 +0000572
573#ifdef CONFIG_IDE_8xx_PCCARD
574 extern int pcmcia_on (void);
wdenk6069ff22003-02-28 00:49:47 +0000575 extern int ide_devices_found; /* Initialized in check_ide_device() */
wdenkc6097192002-11-03 00:24:07 +0000576
577 WATCHDOG_RESET();
578
wdenk6069ff22003-02-28 00:49:47 +0000579 ide_devices_found = 0;
wdenkc6097192002-11-03 00:24:07 +0000580 /* initialize the PCMCIA IDE adapter card */
wdenk6069ff22003-02-28 00:49:47 +0000581 pcmcia_on();
582 if (!ide_devices_found)
wdenkc6097192002-11-03 00:24:07 +0000583 return;
584 udelay (1000000); /* 1 s */
585#endif /* CONFIG_IDE_8xx_PCCARD */
586
587 WATCHDOG_RESET();
588
wdenk15647dc2003-10-09 19:00:25 +0000589#ifdef CONFIG_IDE_8xx_DIRECT
wdenkc6097192002-11-03 00:24:07 +0000590 /* Initialize PIO timing tables */
591 for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
wdenk1a344f22005-02-03 23:00:49 +0000592 pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
593 gd->bus_clk);
594 pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
595 gd->bus_clk);
596 pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
597 gd->bus_clk);
598 debug ( "PIO Mode %d: setup=%2d ns/%d clk"
599 " len=%3d ns/%d clk"
600 " hold=%2d ns/%d clk\n",
601 i,
602 pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
603 pio_config_ns[i].t_length, pio_config_clk[i].t_length,
604 pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
wdenkc6097192002-11-03 00:24:07 +0000605 }
wdenk15647dc2003-10-09 19:00:25 +0000606#endif /* CONFIG_IDE_8xx_DIRECT */
wdenkc6097192002-11-03 00:24:07 +0000607
608 /* Reset the IDE just to be sure.
609 * Light LED's to show
610 */
611 ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
612 ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
613
614#ifdef CONFIG_IDE_8xx_DIRECT
615 /* PCMCIA / IDE initialization for common mem space */
616 pcmp->pcmc_pgcrb = 0;
wdenkc6097192002-11-03 00:24:07 +0000617
618 /* start in PIO mode 0 - most relaxed timings */
619 pio_mode = 0;
620 set_pcmcia_timing (pio_mode);
wdenk15647dc2003-10-09 19:00:25 +0000621#endif /* CONFIG_IDE_8xx_DIRECT */
wdenkc6097192002-11-03 00:24:07 +0000622
623 /*
624 * Wait for IDE to get ready.
625 * According to spec, this can take up to 31 seconds!
626 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200627 for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
628 int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
wdenkc6097192002-11-03 00:24:07 +0000629
wdenk6069ff22003-02-28 00:49:47 +0000630#ifdef CONFIG_IDE_8xx_PCCARD
631 /* Skip non-ide devices from probing */
632 if ((ide_devices_found & (1 << bus)) == 0) {
633 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
634 continue;
635 }
636#endif
wdenkc6097192002-11-03 00:24:07 +0000637 printf ("Bus %d: ", bus);
638
639 ide_bus_ok[bus] = 0;
640
641 /* Select device
642 */
643 udelay (100000); /* 100 ms */
wdenk2262cfe2002-11-18 00:14:45 +0000644 ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
wdenkc6097192002-11-03 00:24:07 +0000645 udelay (100000); /* 100 ms */
wdenkc6097192002-11-03 00:24:07 +0000646 i = 0;
647 do {
648 udelay (10000); /* 10 ms */
649
wdenk2262cfe2002-11-18 00:14:45 +0000650 c = ide_inb (dev, ATA_STATUS);
wdenkc6097192002-11-03 00:24:07 +0000651 i++;
Wolfgang Denk953b7e62010-06-13 18:28:54 +0200652#if defined(CONFIG_SC3)
wdenkc7de8292002-11-19 11:04:11 +0000653 if (i > (ata_reset_time * 100)) {
654#else
wdenkc6097192002-11-03 00:24:07 +0000655 if (i > (ATA_RESET_TIME * 100)) {
wdenkc7de8292002-11-19 11:04:11 +0000656#endif
wdenkc6097192002-11-03 00:24:07 +0000657 puts ("** Timeout **\n");
658 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
659 return;
660 }
661 if ((i >= 100) && ((i%100)==0)) {
662 putc ('.');
663 }
664 } while (c & ATA_STAT_BUSY);
665
666 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
667 puts ("not available ");
wdenk1a344f22005-02-03 23:00:49 +0000668 debug ("Status = 0x%02X ", c);
wdenkc6097192002-11-03 00:24:07 +0000669#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
670 } else if ((c & ATA_STAT_READY) == 0) {
671 puts ("not available ");
wdenk1a344f22005-02-03 23:00:49 +0000672 debug ("Status = 0x%02X ", c);
wdenkc6097192002-11-03 00:24:07 +0000673#endif
674 } else {
675 puts ("OK ");
676 ide_bus_ok[bus] = 1;
677 }
678 WATCHDOG_RESET();
679 }
wdenkc7de8292002-11-19 11:04:11 +0000680
wdenkc6097192002-11-03 00:24:07 +0000681 putc ('\n');
682
683 ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
684
685 curr_device = -1;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200686 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
wdenkc6097192002-11-03 00:24:07 +0000687#ifdef CONFIG_IDE_LED
688 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
689#endif
wdenk5cf9da42003-11-07 13:42:26 +0000690 ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
wdenkc6097192002-11-03 00:24:07 +0000691 ide_dev_desc[i].if_type=IF_TYPE_IDE;
692 ide_dev_desc[i].dev=i;
693 ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
694 ide_dev_desc[i].blksz=0;
695 ide_dev_desc[i].lba=0;
696 ide_dev_desc[i].block_read=ide_read;
697 if (!ide_bus_ok[IDE_BUS(i)])
698 continue;
699 ide_led (led, 1); /* LED on */
700 ide_ident(&ide_dev_desc[i]);
701 ide_led (led, 0); /* LED off */
702 dev_print(&ide_dev_desc[i]);
703/* ide_print (i); */
704 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
705 init_part (&ide_dev_desc[i]); /* initialize partition type */
706 if (curr_device < 0)
707 curr_device = i;
708 }
709 }
710 WATCHDOG_RESET();
711}
712
713/* ------------------------------------------------------------------------- */
714
715block_dev_desc_t * ide_get_dev(int dev)
716{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200717 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
wdenkc6097192002-11-03 00:24:07 +0000718}
719
720
721#ifdef CONFIG_IDE_8xx_DIRECT
722
723static void
724set_pcmcia_timing (int pmode)
725{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200726 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenkc6097192002-11-03 00:24:07 +0000727 volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
728 ulong timings;
729
wdenk1a344f22005-02-03 23:00:49 +0000730 debug ("Set timing for PIO Mode %d\n", pmode);
wdenkc6097192002-11-03 00:24:07 +0000731
732 timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
733 | PCMCIA_SST(pio_config_clk[pmode].t_setup)
734 | PCMCIA_SL (pio_config_clk[pmode].t_length)
735 ;
736
737 /* IDE 0
738 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200739 pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
740 pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
741#if (CONFIG_SYS_PCMCIA_POR0 != 0)
wdenkc6097192002-11-03 00:24:07 +0000742 | timings
743#endif
744 ;
wdenk1a344f22005-02-03 23:00:49 +0000745 debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
wdenkc6097192002-11-03 00:24:07 +0000746
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200747 pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
748 pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
749#if (CONFIG_SYS_PCMCIA_POR1 != 0)
wdenkc6097192002-11-03 00:24:07 +0000750 | timings
751#endif
752 ;
wdenk1a344f22005-02-03 23:00:49 +0000753 debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
wdenkc6097192002-11-03 00:24:07 +0000754
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200755 pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
756 pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
757#if (CONFIG_SYS_PCMCIA_POR2 != 0)
wdenkc6097192002-11-03 00:24:07 +0000758 | timings
759#endif
760 ;
wdenk1a344f22005-02-03 23:00:49 +0000761 debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
wdenkc6097192002-11-03 00:24:07 +0000762
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200763 pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
764 pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
765#if (CONFIG_SYS_PCMCIA_POR3 != 0)
wdenkc6097192002-11-03 00:24:07 +0000766 | timings
767#endif
768 ;
wdenk1a344f22005-02-03 23:00:49 +0000769 debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
wdenkc6097192002-11-03 00:24:07 +0000770
771 /* IDE 1
772 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200773 pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
774 pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
775#if (CONFIG_SYS_PCMCIA_POR4 != 0)
wdenkc6097192002-11-03 00:24:07 +0000776 | timings
777#endif
778 ;
wdenk1a344f22005-02-03 23:00:49 +0000779 debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
wdenkc6097192002-11-03 00:24:07 +0000780
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200781 pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
782 pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
783#if (CONFIG_SYS_PCMCIA_POR5 != 0)
wdenkc6097192002-11-03 00:24:07 +0000784 | timings
785#endif
786 ;
wdenk1a344f22005-02-03 23:00:49 +0000787 debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
wdenkc6097192002-11-03 00:24:07 +0000788
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200789 pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
790 pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
791#if (CONFIG_SYS_PCMCIA_POR6 != 0)
wdenkc6097192002-11-03 00:24:07 +0000792 | timings
793#endif
794 ;
wdenk1a344f22005-02-03 23:00:49 +0000795 debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
wdenkc6097192002-11-03 00:24:07 +0000796
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200797 pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
798 pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
799#if (CONFIG_SYS_PCMCIA_POR7 != 0)
wdenkc6097192002-11-03 00:24:07 +0000800 | timings
801#endif
802 ;
wdenk1a344f22005-02-03 23:00:49 +0000803 debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
wdenkc6097192002-11-03 00:24:07 +0000804
805}
806
807#endif /* CONFIG_IDE_8xx_DIRECT */
808
809/* ------------------------------------------------------------------------- */
810
wdenk5da627a2003-10-09 20:09:04 +0000811/* We only need to swap data if we are running on a big endian cpu. */
812/* But Au1x00 cpu:s already swaps data in big endian mode! */
Wolfgang Denk0c32d962006-06-16 17:32:31 +0200813#if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
wdenk5da627a2003-10-09 20:09:04 +0000814#define input_swap_data(x,y,z) input_data(x,y,z)
815#else
wdenkc6097192002-11-03 00:24:07 +0000816static void
817input_swap_data(int dev, ulong *sect_buf, int words)
818{
wdenk1a344f22005-02-03 23:00:49 +0000819#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +0000820 uchar i;
821 volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
822 volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
823 ushort *dbuf = (ushort *)sect_buf;
824
825 while (words--) {
826 for (i=0; i<2; i++) {
827 *(((uchar *)(dbuf)) + 1) = *pbuf_even;
828 *(uchar *)dbuf = *pbuf_odd;
829 dbuf+=1;
830 }
831 }
wdenkf4733a02005-03-06 01:21:30 +0000832#else
wdenk1a344f22005-02-03 23:00:49 +0000833 volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
834 ushort *dbuf = (ushort *)sect_buf;
835
836 debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
837
838 while (words--) {
Wolfgang Denk0c32d962006-06-16 17:32:31 +0200839#ifdef __MIPS__
840 *dbuf++ = swab16p((u16*)pbuf);
841 *dbuf++ = swab16p((u16*)pbuf);
Heiko Schocher566a4942007-06-22 19:11:54 +0200842#elif defined(CONFIG_PCS440EP)
843 *dbuf++ = *pbuf;
844 *dbuf++ = *pbuf;
Wolfgang Denk0c32d962006-06-16 17:32:31 +0200845#else
wdenk1a344f22005-02-03 23:00:49 +0000846 *dbuf++ = ld_le16(pbuf);
847 *dbuf++ = ld_le16(pbuf);
Wolfgang Denk0c32d962006-06-16 17:32:31 +0200848#endif /* !MIPS */
wdenk1a344f22005-02-03 23:00:49 +0000849 }
850#endif
wdenkc6097192002-11-03 00:24:07 +0000851}
wdenk5da627a2003-10-09 20:09:04 +0000852#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
wdenkc6097192002-11-03 00:24:07 +0000853
wdenk2262cfe2002-11-18 00:14:45 +0000854
Albert Aribaudf2a37fc2010-08-08 05:17:05 +0530855#if defined(CONFIG_IDE_SWAP_IO)
wdenkc6097192002-11-03 00:24:07 +0000856static void
857output_data(int dev, ulong *sect_buf, int words)
858{
wdenk1a344f22005-02-03 23:00:49 +0000859#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +0000860 uchar *dbuf;
861 volatile uchar *pbuf_even;
862 volatile uchar *pbuf_odd;
863
864 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
865 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
866 dbuf = (uchar *)sect_buf;
867 while (words--) {
wdenk5cf91d62004-04-23 20:32:05 +0000868 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000869 *pbuf_even = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000870 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000871 *pbuf_odd = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000872 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000873 *pbuf_even = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +0000874 EIEIO;
wdenka522fa02004-01-04 22:51:12 +0000875 *pbuf_odd = *dbuf++;
876 }
wdenk1a344f22005-02-03 23:00:49 +0000877#else
878 ushort *dbuf;
879 volatile ushort *pbuf;
880
881 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
882 dbuf = (ushort *)sect_buf;
883 while (words--) {
Heiko Schocher566a4942007-06-22 19:11:54 +0200884#if defined(CONFIG_PCS440EP)
885 /* not tested, because CF was write protected */
886 EIEIO;
887 *pbuf = ld_le16(dbuf++);
888 EIEIO;
889 *pbuf = ld_le16(dbuf++);
890#else
wdenk1a344f22005-02-03 23:00:49 +0000891 EIEIO;
892 *pbuf = *dbuf++;
893 EIEIO;
894 *pbuf = *dbuf++;
Heiko Schocher566a4942007-06-22 19:11:54 +0200895#endif
wdenk1a344f22005-02-03 23:00:49 +0000896 }
897#endif
wdenkc6097192002-11-03 00:24:07 +0000898}
Albert Aribaudf2a37fc2010-08-08 05:17:05 +0530899#else /* ! CONFIG_IDE_SWAP_IO */
wdenk2262cfe2002-11-18 00:14:45 +0000900static void
901output_data(int dev, ulong *sect_buf, int words)
902{
wdenk15647dc2003-10-09 19:00:25 +0000903 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
wdenk2262cfe2002-11-18 00:14:45 +0000904}
Albert Aribaudf2a37fc2010-08-08 05:17:05 +0530905#endif /* CONFIG_IDE_SWAP_IO */
wdenkc6097192002-11-03 00:24:07 +0000906
Albert Aribaudf2a37fc2010-08-08 05:17:05 +0530907#if defined(CONFIG_IDE_SWAP_IO)
wdenkc6097192002-11-03 00:24:07 +0000908static void
909input_data(int dev, ulong *sect_buf, int words)
910{
wdenk1a344f22005-02-03 23:00:49 +0000911#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +0000912 uchar *dbuf;
913 volatile uchar *pbuf_even;
914 volatile uchar *pbuf_odd;
915
916 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
917 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
918 dbuf = (uchar *)sect_buf;
919 while (words--) {
wdenka522fa02004-01-04 22:51:12 +0000920 *dbuf++ = *pbuf_even;
wdenk5cf91d62004-04-23 20:32:05 +0000921 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +0000922 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000923 *dbuf++ = *pbuf_odd;
wdenk5cf91d62004-04-23 20:32:05 +0000924 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +0000925 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000926 *dbuf++ = *pbuf_even;
wdenk5cf91d62004-04-23 20:32:05 +0000927 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +0000928 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000929 *dbuf++ = *pbuf_odd;
wdenk1a344f22005-02-03 23:00:49 +0000930 EIEIO;
931 SYNC;
wdenka522fa02004-01-04 22:51:12 +0000932 }
wdenk1a344f22005-02-03 23:00:49 +0000933#else
934 ushort *dbuf;
935 volatile ushort *pbuf;
936
937 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
938 dbuf = (ushort *)sect_buf;
939
940 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
941
942 while (words--) {
Heiko Schocher566a4942007-06-22 19:11:54 +0200943#if defined(CONFIG_PCS440EP)
944 EIEIO;
945 *dbuf++ = ld_le16(pbuf);
946 EIEIO;
947 *dbuf++ = ld_le16(pbuf);
948#else
wdenk1a344f22005-02-03 23:00:49 +0000949 EIEIO;
950 *dbuf++ = *pbuf;
951 EIEIO;
952 *dbuf++ = *pbuf;
Heiko Schocher566a4942007-06-22 19:11:54 +0200953#endif
wdenk1a344f22005-02-03 23:00:49 +0000954 }
955#endif
wdenkc6097192002-11-03 00:24:07 +0000956}
Albert Aribaudf2a37fc2010-08-08 05:17:05 +0530957#else /* ! CONFIG_IDE_SWAP_IO */
wdenk2262cfe2002-11-18 00:14:45 +0000958static void
959input_data(int dev, ulong *sect_buf, int words)
960{
wdenk15647dc2003-10-09 19:00:25 +0000961 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
wdenk2262cfe2002-11-18 00:14:45 +0000962}
963
Albert Aribaudf2a37fc2010-08-08 05:17:05 +0530964#endif /* CONFIG_IDE_SWAP_IO */
wdenkc6097192002-11-03 00:24:07 +0000965
966/* -------------------------------------------------------------------------
967 */
968static void ide_ident (block_dev_desc_t *dev_desc)
969{
970 ulong iobuf[ATA_SECTORWORDS];
971 unsigned char c;
972 hd_driveid_t *iop = (hd_driveid_t *)iobuf;
973
wdenk64f70be2004-09-28 20:34:50 +0000974#ifdef CONFIG_ATAPI
975 int retries = 0;
wdenkc7de8292002-11-19 11:04:11 +0000976 int do_retry = 0;
977#endif
978
Steven A. Falco36c2d302008-08-15 15:34:10 -0400979#ifdef CONFIG_TUNE_PIO
980 int pio_mode;
981#endif
982
wdenkc6097192002-11-03 00:24:07 +0000983#if 0
984 int mode, cycle_time;
985#endif
986 int device;
987 device=dev_desc->dev;
988 printf (" Device %d: ", device);
989
990 ide_led (DEVICE_LED(device), 1); /* LED on */
991 /* Select device
992 */
wdenk2262cfe2002-11-18 00:14:45 +0000993 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +0000994 dev_desc->if_type=IF_TYPE_IDE;
995#ifdef CONFIG_ATAPI
wdenkc7de8292002-11-19 11:04:11 +0000996
wdenkc7de8292002-11-19 11:04:11 +0000997 do_retry = 0;
998 retries = 0;
999
1000 /* Warning: This will be tricky to read */
wdenkc40b2952004-03-13 23:29:43 +00001001 while (retries <= 1) {
wdenkc6097192002-11-03 00:24:07 +00001002 /* check signature */
wdenk2262cfe2002-11-18 00:14:45 +00001003 if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
1004 (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
1005 (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
1006 (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
wdenkc6097192002-11-03 00:24:07 +00001007 /* ATAPI Signature found */
1008 dev_desc->if_type=IF_TYPE_ATAPI;
1009 /* Start Ident Command
1010 */
wdenk2262cfe2002-11-18 00:14:45 +00001011 ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
wdenkc6097192002-11-03 00:24:07 +00001012 /*
1013 * Wait for completion - ATAPI devices need more time
1014 * to become ready
1015 */
1016 c = ide_wait (device, ATAPI_TIME_OUT);
wdenkc40b2952004-03-13 23:29:43 +00001017 } else
wdenkc6097192002-11-03 00:24:07 +00001018#endif
1019 {
1020 /* Start Ident Command
1021 */
wdenk2262cfe2002-11-18 00:14:45 +00001022 ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
wdenkc6097192002-11-03 00:24:07 +00001023
1024 /* Wait for completion
1025 */
1026 c = ide_wait (device, IDE_TIME_OUT);
1027 }
1028 ide_led (DEVICE_LED(device), 0); /* LED off */
1029
1030 if (((c & ATA_STAT_DRQ) == 0) ||
1031 ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
wdenk64f70be2004-09-28 20:34:50 +00001032#ifdef CONFIG_ATAPI
wdenk1a344f22005-02-03 23:00:49 +00001033 {
1034 /* Need to soft reset the device in case it's an ATAPI... */
1035 debug ("Retrying...\n");
1036 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1037 udelay(100000);
1038 ide_outb (device, ATA_COMMAND, 0x08);
1039 udelay (500000); /* 500 ms */
1040 }
wdenk64f70be2004-09-28 20:34:50 +00001041 /* Select device
1042 */
1043 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1044 retries++;
wdenkc7de8292002-11-19 11:04:11 +00001045#else
wdenkc6097192002-11-03 00:24:07 +00001046 return;
wdenk64f70be2004-09-28 20:34:50 +00001047#endif
wdenkc6097192002-11-03 00:24:07 +00001048 }
wdenk64f70be2004-09-28 20:34:50 +00001049#ifdef CONFIG_ATAPI
1050 else
1051 break;
wdenkc7de8292002-11-19 11:04:11 +00001052 } /* see above - ugly to read */
wdenk64f70be2004-09-28 20:34:50 +00001053
1054 if (retries == 2) /* Not found */
1055 return;
1056#endif
wdenkc7de8292002-11-19 11:04:11 +00001057
wdenkc6097192002-11-03 00:24:07 +00001058 input_swap_data (device, iobuf, ATA_SECTORWORDS);
1059
Jean-Christophe PLAGNIOL-VILLARD7a60ee72007-11-07 08:19:19 +01001060 ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
1061 ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
1062 ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
wdenkc3f9d492004-03-14 00:59:59 +00001063#ifdef __LITTLE_ENDIAN
1064 /*
Richard Retanubunbcdf1d22008-11-06 14:01:51 -05001065 * firmware revision, model, and serial number have Big Endian Byte
1066 * order in Word. Convert all three to little endian.
wdenkc3f9d492004-03-14 00:59:59 +00001067 *
1068 * See CF+ and CompactFlash Specification Revision 2.0:
Richard Retanubunbcdf1d22008-11-06 14:01:51 -05001069 * 6.2.1.6: Identify Drive, Table 39 for more details
wdenkc3f9d492004-03-14 00:59:59 +00001070 */
1071
1072 strswab (dev_desc->revision);
1073 strswab (dev_desc->vendor);
Richard Retanubunbcdf1d22008-11-06 14:01:51 -05001074 strswab (dev_desc->product);
wdenkc3f9d492004-03-14 00:59:59 +00001075#endif /* __LITTLE_ENDIAN */
wdenkc6097192002-11-03 00:24:07 +00001076
1077 if ((iop->config & 0x0080)==0x0080)
1078 dev_desc->removable = 1;
1079 else
1080 dev_desc->removable = 0;
1081
Steven A. Falco36c2d302008-08-15 15:34:10 -04001082#ifdef CONFIG_TUNE_PIO
1083 /* Mode 0 - 2 only, are directly determined by word 51. */
1084 pio_mode = iop->tPIO;
1085 if (pio_mode > 2) {
1086 printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
1087 pio_mode = 0; /* Force it to dead slow, and hope for the best... */
1088 }
1089
1090 /* Any CompactFlash Storage Card that supports PIO mode 3 or above
1091 * shall set bit 1 of word 53 to one and support the fields contained
1092 * in words 64 through 70.
1093 */
1094 if (iop->field_valid & 0x02) {
1095 /* Mode 3 and above are possible. Check in order from slow
1096 * to fast, so we wind up with the highest mode allowed.
1097 */
1098 if (iop->eide_pio_modes & 0x01)
1099 pio_mode = 3;
1100 if (iop->eide_pio_modes & 0x02)
1101 pio_mode = 4;
1102 if (ata_id_is_cfa((u16 *)iop)) {
1103 if ((iop->cf_advanced_caps & 0x07) == 0x01)
1104 pio_mode = 5;
1105 if ((iop->cf_advanced_caps & 0x07) == 0x02)
1106 pio_mode = 6;
1107 }
1108 }
1109
1110 /* System-specific, depends on bus speeds, etc. */
1111 ide_set_piomode(pio_mode);
1112#endif /* CONFIG_TUNE_PIO */
1113
wdenkc6097192002-11-03 00:24:07 +00001114#if 0
1115 /*
1116 * Drive PIO mode autoselection
1117 */
1118 mode = iop->tPIO;
1119
1120 printf ("tPIO = 0x%02x = %d\n",mode, mode);
1121 if (mode > 2) { /* 2 is maximum allowed tPIO value */
1122 mode = 2;
wdenk1a344f22005-02-03 23:00:49 +00001123 debug ("Override tPIO -> 2\n");
wdenkc6097192002-11-03 00:24:07 +00001124 }
1125 if (iop->field_valid & 2) { /* drive implements ATA2? */
wdenk1a344f22005-02-03 23:00:49 +00001126 debug ("Drive implements ATA2\n");
wdenkc6097192002-11-03 00:24:07 +00001127 if (iop->capability & 8) { /* drive supports use_iordy? */
1128 cycle_time = iop->eide_pio_iordy;
1129 } else {
1130 cycle_time = iop->eide_pio;
1131 }
wdenk1a344f22005-02-03 23:00:49 +00001132 debug ("cycle time = %d\n", cycle_time);
wdenkc6097192002-11-03 00:24:07 +00001133 mode = 4;
1134 if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
1135 if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
1136 if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
1137 if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
1138 }
1139 printf ("PIO mode to use: PIO %d\n", mode);
1140#endif /* 0 */
1141
1142#ifdef CONFIG_ATAPI
1143 if (dev_desc->if_type==IF_TYPE_ATAPI) {
1144 atapi_inquiry(dev_desc);
1145 return;
1146 }
1147#endif /* CONFIG_ATAPI */
1148
wdenkc3f9d492004-03-14 00:59:59 +00001149#ifdef __BIG_ENDIAN
wdenkc6097192002-11-03 00:24:07 +00001150 /* swap shorts */
1151 dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
wdenkc3f9d492004-03-14 00:59:59 +00001152#else /* ! __BIG_ENDIAN */
1153 /*
1154 * do not swap shorts on little endian
1155 *
1156 * See CF+ and CompactFlash Specification Revision 2.0:
1157 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
1158 */
1159 dev_desc->lba = iop->lba_capacity;
1160#endif /* __BIG_ENDIAN */
wdenkc40b2952004-03-13 23:29:43 +00001161
wdenk42dfe7a2004-03-14 22:25:36 +00001162#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001163 if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
wdenk6e592382004-04-18 17:39:38 +00001164 dev_desc->lba48 = 1;
1165 dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
wdenkc40b2952004-03-13 23:29:43 +00001166 ((unsigned long long)iop->lba48_capacity[1] << 16) |
1167 ((unsigned long long)iop->lba48_capacity[2] << 32) |
1168 ((unsigned long long)iop->lba48_capacity[3] << 48);
1169 } else {
wdenkc40b2952004-03-13 23:29:43 +00001170 dev_desc->lba48 = 0;
1171 }
1172#endif /* CONFIG_LBA48 */
wdenkc6097192002-11-03 00:24:07 +00001173 /* assuming HD */
1174 dev_desc->type=DEV_TYPE_HARDDISK;
1175 dev_desc->blksz=ATA_BLOCKSIZE;
1176 dev_desc->lun=0; /* just to fill something in... */
1177
Wolfgang Denk53677ef2008-05-20 16:00:29 +02001178#if 0 /* only used to test the powersaving mode,
wdenkc6097192002-11-03 00:24:07 +00001179 * if enabled, the drive goes after 5 sec
1180 * in standby mode */
wdenk2262cfe2002-11-18 00:14:45 +00001181 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001182 c = ide_wait (device, IDE_TIME_OUT);
wdenk2262cfe2002-11-18 00:14:45 +00001183 ide_outb (device, ATA_SECT_CNT, 1);
1184 ide_outb (device, ATA_LBA_LOW, 0);
1185 ide_outb (device, ATA_LBA_MID, 0);
1186 ide_outb (device, ATA_LBA_HIGH, 0);
wdenk1a344f22005-02-03 23:00:49 +00001187 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenk2262cfe2002-11-18 00:14:45 +00001188 ide_outb (device, ATA_COMMAND, 0xe3);
wdenkc6097192002-11-03 00:24:07 +00001189 udelay (50);
1190 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1191#endif
1192}
1193
1194
1195/* ------------------------------------------------------------------------- */
1196
Grant Likelyeb867a72007-02-20 09:05:45 +01001197ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
wdenkc6097192002-11-03 00:24:07 +00001198{
1199 ulong n = 0;
1200 unsigned char c;
1201 unsigned char pwrsave=0; /* power save */
wdenk42dfe7a2004-03-14 22:25:36 +00001202#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001203 unsigned char lba48 = 0;
wdenkc6097192002-11-03 00:24:07 +00001204
Guennadi Liakhovetski413bf582008-04-28 14:36:06 +02001205 if (blknr & 0x0000fffff0000000ULL) {
wdenkc40b2952004-03-13 23:29:43 +00001206 /* more than 28 bits used, use 48bit mode */
1207 lba48 = 1;
1208 }
1209#endif
Mike Frysinger6c6166f2009-02-16 23:21:36 -05001210 debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
wdenkc6097192002-11-03 00:24:07 +00001211 device, blknr, blkcnt, (ulong)buffer);
1212
1213 ide_led (DEVICE_LED(device), 1); /* LED on */
1214
1215 /* Select device
1216 */
wdenk2262cfe2002-11-18 00:14:45 +00001217 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001218 c = ide_wait (device, IDE_TIME_OUT);
1219
1220 if (c & ATA_STAT_BUSY) {
1221 printf ("IDE read: device %d not ready\n", device);
1222 goto IDE_READ_E;
1223 }
1224
1225 /* first check if the drive is in Powersaving mode, if yes,
1226 * increase the timeout value */
wdenk2262cfe2002-11-18 00:14:45 +00001227 ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
wdenkc6097192002-11-03 00:24:07 +00001228 udelay (50);
1229
1230 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1231
1232 if (c & ATA_STAT_BUSY) {
1233 printf ("IDE read: device %d not ready\n", device);
1234 goto IDE_READ_E;
1235 }
1236 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
1237 printf ("No Powersaving mode %X\n", c);
1238 } else {
wdenk2262cfe2002-11-18 00:14:45 +00001239 c = ide_inb(device,ATA_SECT_CNT);
wdenk1a344f22005-02-03 23:00:49 +00001240 debug ("Powersaving %02X\n",c);
wdenkc6097192002-11-03 00:24:07 +00001241 if(c==0)
1242 pwrsave=1;
1243 }
1244
1245
1246 while (blkcnt-- > 0) {
1247
1248 c = ide_wait (device, IDE_TIME_OUT);
1249
1250 if (c & ATA_STAT_BUSY) {
1251 printf ("IDE read: device %d not ready\n", device);
1252 break;
1253 }
wdenk42dfe7a2004-03-14 22:25:36 +00001254#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001255 if (lba48) {
1256 /* write high bits */
1257 ide_outb (device, ATA_SECT_CNT, 0);
1258 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001259#ifdef CONFIG_SYS_64BIT_LBA
wdenkc40b2952004-03-13 23:29:43 +00001260 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1261 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
Guennadi Liakhovetski413bf582008-04-28 14:36:06 +02001262#else
1263 ide_outb (device, ATA_LBA_MID, 0);
1264 ide_outb (device, ATA_LBA_HIGH, 0);
1265#endif
wdenkc40b2952004-03-13 23:29:43 +00001266 }
1267#endif
wdenk2262cfe2002-11-18 00:14:45 +00001268 ide_outb (device, ATA_SECT_CNT, 1);
1269 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1270 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1271 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
wdenkc40b2952004-03-13 23:29:43 +00001272
wdenk42dfe7a2004-03-14 22:25:36 +00001273#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001274 if (lba48) {
1275 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1276 ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
1277
1278 } else
1279#endif
1280 {
1281 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1282 ATA_DEVICE(device) |
1283 ((blknr >> 24) & 0xF) );
1284 ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
1285 }
wdenkc6097192002-11-03 00:24:07 +00001286
1287 udelay (50);
1288
1289 if(pwrsave) {
1290 c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
1291 pwrsave=0;
1292 } else {
1293 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1294 }
1295
1296 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
Heiko Schocher4b142fe2009-12-03 11:21:21 +01001297#if defined(CONFIG_SYS_64BIT_LBA)
Mike Frysinger6c6166f2009-02-16 23:21:36 -05001298 printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
wdenkc6097192002-11-03 00:24:07 +00001299 device, blknr, c);
wdenkc40b2952004-03-13 23:29:43 +00001300#else
1301 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1302 device, (ulong)blknr, c);
1303#endif
wdenkc6097192002-11-03 00:24:07 +00001304 break;
1305 }
1306
1307 input_data (device, buffer, ATA_SECTORWORDS);
wdenk2262cfe2002-11-18 00:14:45 +00001308 (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
wdenkc6097192002-11-03 00:24:07 +00001309
1310 ++n;
1311 ++blknr;
Greg Lopp0b945042007-04-13 08:02:24 +02001312 buffer += ATA_BLOCKSIZE;
wdenkc6097192002-11-03 00:24:07 +00001313 }
1314IDE_READ_E:
1315 ide_led (DEVICE_LED(device), 0); /* LED off */
1316 return (n);
1317}
1318
1319/* ------------------------------------------------------------------------- */
1320
1321
Grant Likelyeb867a72007-02-20 09:05:45 +01001322ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
wdenkc6097192002-11-03 00:24:07 +00001323{
1324 ulong n = 0;
1325 unsigned char c;
wdenk42dfe7a2004-03-14 22:25:36 +00001326#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001327 unsigned char lba48 = 0;
1328
Guennadi Liakhovetski413bf582008-04-28 14:36:06 +02001329 if (blknr & 0x0000fffff0000000ULL) {
wdenkc40b2952004-03-13 23:29:43 +00001330 /* more than 28 bits used, use 48bit mode */
1331 lba48 = 1;
1332 }
1333#endif
wdenkc6097192002-11-03 00:24:07 +00001334
1335 ide_led (DEVICE_LED(device), 1); /* LED on */
1336
1337 /* Select device
1338 */
wdenk2262cfe2002-11-18 00:14:45 +00001339 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001340
1341 while (blkcnt-- > 0) {
1342
1343 c = ide_wait (device, IDE_TIME_OUT);
1344
1345 if (c & ATA_STAT_BUSY) {
1346 printf ("IDE read: device %d not ready\n", device);
1347 goto WR_OUT;
1348 }
wdenk42dfe7a2004-03-14 22:25:36 +00001349#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001350 if (lba48) {
1351 /* write high bits */
1352 ide_outb (device, ATA_SECT_CNT, 0);
1353 ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001354#ifdef CONFIG_SYS_64BIT_LBA
wdenkc40b2952004-03-13 23:29:43 +00001355 ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1356 ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
Guennadi Liakhovetski413bf582008-04-28 14:36:06 +02001357#else
1358 ide_outb (device, ATA_LBA_MID, 0);
1359 ide_outb (device, ATA_LBA_HIGH, 0);
1360#endif
wdenkc40b2952004-03-13 23:29:43 +00001361 }
1362#endif
wdenk2262cfe2002-11-18 00:14:45 +00001363 ide_outb (device, ATA_SECT_CNT, 1);
1364 ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1365 ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1366 ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
wdenkc40b2952004-03-13 23:29:43 +00001367
wdenk42dfe7a2004-03-14 22:25:36 +00001368#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001369 if (lba48) {
1370 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
1371 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1372
1373 } else
1374#endif
1375 {
1376 ide_outb (device, ATA_DEV_HD, ATA_LBA |
1377 ATA_DEVICE(device) |
1378 ((blknr >> 24) & 0xF) );
1379 ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
1380 }
wdenkc6097192002-11-03 00:24:07 +00001381
1382 udelay (50);
1383
1384 c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
1385
1386 if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
Heiko Schocher4b142fe2009-12-03 11:21:21 +01001387#if defined(CONFIG_SYS_64BIT_LBA)
Mike Frysinger6c6166f2009-02-16 23:21:36 -05001388 printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
wdenkc6097192002-11-03 00:24:07 +00001389 device, blknr, c);
wdenkc40b2952004-03-13 23:29:43 +00001390#else
1391 printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
1392 device, (ulong)blknr, c);
1393#endif
wdenkc6097192002-11-03 00:24:07 +00001394 goto WR_OUT;
1395 }
1396
1397 output_data (device, buffer, ATA_SECTORWORDS);
wdenk2262cfe2002-11-18 00:14:45 +00001398 c = ide_inb (device, ATA_STATUS); /* clear IRQ */
wdenkc6097192002-11-03 00:24:07 +00001399 ++n;
1400 ++blknr;
Greg Lopp0b945042007-04-13 08:02:24 +02001401 buffer += ATA_BLOCKSIZE;
wdenkc6097192002-11-03 00:24:07 +00001402 }
1403WR_OUT:
1404 ide_led (DEVICE_LED(device), 0); /* LED off */
1405 return (n);
1406}
1407
1408/* ------------------------------------------------------------------------- */
1409
1410/*
1411 * copy src to dest, skipping leading and trailing blanks and null
1412 * terminate the string
wdenk7d7ce412004-03-17 01:13:07 +00001413 * "len" is the size of available memory including the terminating '\0'
wdenkc6097192002-11-03 00:24:07 +00001414 */
wdenk7d7ce412004-03-17 01:13:07 +00001415static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
wdenkc6097192002-11-03 00:24:07 +00001416{
wdenk7d7ce412004-03-17 01:13:07 +00001417 unsigned char *end, *last;
wdenkc6097192002-11-03 00:24:07 +00001418
wdenk7d7ce412004-03-17 01:13:07 +00001419 last = dst;
wdenk6fb6af62004-03-23 23:20:24 +00001420 end = src + len - 1;
wdenk7d7ce412004-03-17 01:13:07 +00001421
1422 /* reserve space for '\0' */
1423 if (len < 2)
1424 goto OUT;
wdenkefa329c2004-03-23 20:18:25 +00001425
wdenk7d7ce412004-03-17 01:13:07 +00001426 /* skip leading white space */
1427 while ((*src) && (src<end) && (*src==' '))
1428 ++src;
1429
1430 /* copy string, omitting trailing white space */
1431 while ((*src) && (src<end)) {
1432 *dst++ = *src;
1433 if (*src++ != ' ')
1434 last = dst;
wdenkc6097192002-11-03 00:24:07 +00001435 }
wdenk7d7ce412004-03-17 01:13:07 +00001436OUT:
1437 *last = '\0';
wdenkc6097192002-11-03 00:24:07 +00001438}
1439
1440/* ------------------------------------------------------------------------- */
1441
1442/*
1443 * Wait until Busy bit is off, or timeout (in ms)
1444 * Return last status
1445 */
1446static uchar ide_wait (int dev, ulong t)
1447{
1448 ulong delay = 10 * t; /* poll every 100 us */
1449 uchar c;
1450
wdenk2262cfe2002-11-18 00:14:45 +00001451 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
wdenkc6097192002-11-03 00:24:07 +00001452 udelay (100);
1453 if (delay-- == 0) {
1454 break;
1455 }
1456 }
1457 return (c);
1458}
1459
1460/* ------------------------------------------------------------------------- */
1461
1462#ifdef CONFIG_IDE_RESET
1463extern void ide_set_reset(int idereset);
1464
1465static void ide_reset (void)
1466{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001467#if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
1468 volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
wdenkc6097192002-11-03 00:24:07 +00001469#endif
1470 int i;
1471
1472 curr_device = -1;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001473 for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
wdenkc6097192002-11-03 00:24:07 +00001474 ide_bus_ok[i] = 0;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001475 for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
wdenkc6097192002-11-03 00:24:07 +00001476 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
1477
1478 ide_set_reset (1); /* assert reset */
1479
Martin Krausee175eac2008-04-03 13:37:56 +02001480 /* the reset signal shall be asserted for et least 25 us */
1481 udelay(25);
1482
wdenkc6097192002-11-03 00:24:07 +00001483 WATCHDOG_RESET();
1484
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001485#ifdef CONFIG_SYS_PB_12V_ENABLE
1486 immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
1487 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
1488 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
1489 immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
wdenkc6097192002-11-03 00:24:07 +00001490
1491 /* wait 500 ms for the voltage to stabilize
1492 */
1493 for (i=0; i<500; ++i) {
1494 udelay (1000);
1495 }
1496
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001497 immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
1498#endif /* CONFIG_SYS_PB_12V_ENABLE */
wdenkc6097192002-11-03 00:24:07 +00001499
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001500#ifdef CONFIG_SYS_PB_IDE_MOTOR
wdenkc6097192002-11-03 00:24:07 +00001501 /* configure IDE Motor voltage monitor pin as input */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001502 immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1503 immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
1504 immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
wdenkc6097192002-11-03 00:24:07 +00001505
1506 /* wait up to 1 s for the motor voltage to stabilize
1507 */
1508 for (i=0; i<1000; ++i) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001509 if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
wdenkc6097192002-11-03 00:24:07 +00001510 break;
1511 }
1512 udelay (1000);
1513 }
1514
1515 if (i == 1000) { /* Timeout */
1516 printf ("\nWarning: 5V for IDE Motor missing\n");
1517# ifdef CONFIG_STATUS_LED
1518# ifdef STATUS_LED_YELLOW
1519 status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
1520# endif
1521# ifdef STATUS_LED_GREEN
1522 status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
1523# endif
1524# endif /* CONFIG_STATUS_LED */
1525 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +02001526#endif /* CONFIG_SYS_PB_IDE_MOTOR */
wdenkc6097192002-11-03 00:24:07 +00001527
1528 WATCHDOG_RESET();
1529
1530 /* de-assert RESET signal */
1531 ide_set_reset(0);
1532
1533 /* wait 250 ms */
1534 for (i=0; i<250; ++i) {
1535 udelay (1000);
1536 }
1537}
1538
1539#endif /* CONFIG_IDE_RESET */
1540
1541/* ------------------------------------------------------------------------- */
1542
wdenke2ffd592004-12-31 09:32:47 +00001543#if defined(CONFIG_IDE_LED) && \
wdenke2ffd592004-12-31 09:32:47 +00001544 !defined(CONFIG_CPC45) && \
1545 !defined(CONFIG_HMI10) && \
1546 !defined(CONFIG_KUP4K) && \
1547 !defined(CONFIG_KUP4X)
wdenkc6097192002-11-03 00:24:07 +00001548
1549static uchar led_buffer = 0; /* Buffer for current LED status */
1550
1551static void ide_led (uchar led, uchar status)
1552{
1553 uchar *led_port = LED_PORT;
1554
1555 if (status) { /* switch LED on */
1556 led_buffer |= led;
1557 } else { /* switch LED off */
1558 led_buffer &= ~led;
1559 }
1560
1561 *led_port = led_buffer;
1562}
1563
1564#endif /* CONFIG_IDE_LED */
1565
Heiko Schocher3887c3f2009-09-23 07:56:08 +02001566#if defined(CONFIG_OF_IDE_FIXUP)
1567int ide_device_present(int dev)
1568{
1569 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1570 return 0;
1571 return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
1572}
1573#endif
wdenkc6097192002-11-03 00:24:07 +00001574/* ------------------------------------------------------------------------- */
1575
1576#ifdef CONFIG_ATAPI
1577/****************************************************************************
1578 * ATAPI Support
1579 */
1580
Albert Aribaudf2a37fc2010-08-08 05:17:05 +05301581#if defined(CONFIG_IDE_SWAP_IO)
wdenkc6097192002-11-03 00:24:07 +00001582/* since ATAPI may use commands with not 4 bytes alligned length
1583 * we have our own transfer functions, 2 bytes alligned */
1584static void
1585output_data_shorts(int dev, ushort *sect_buf, int shorts)
1586{
wdenk1a344f22005-02-03 23:00:49 +00001587#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +00001588 uchar *dbuf;
1589 volatile uchar *pbuf_even;
1590 volatile uchar *pbuf_odd;
1591
1592 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1593 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1594 while (shorts--) {
wdenk5cf91d62004-04-23 20:32:05 +00001595 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001596 *pbuf_even = *dbuf++;
wdenk5cf91d62004-04-23 20:32:05 +00001597 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001598 *pbuf_odd = *dbuf++;
1599 }
wdenk1a344f22005-02-03 23:00:49 +00001600#else
wdenkc6097192002-11-03 00:24:07 +00001601 ushort *dbuf;
1602 volatile ushort *pbuf;
1603
1604 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1605 dbuf = (ushort *)sect_buf;
wdenkdb01a2e2004-04-15 23:14:49 +00001606
wdenk1a344f22005-02-03 23:00:49 +00001607 debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
wdenkdb01a2e2004-04-15 23:14:49 +00001608
wdenkc6097192002-11-03 00:24:07 +00001609 while (shorts--) {
wdenk5cf91d62004-04-23 20:32:05 +00001610 EIEIO;
wdenk1a344f22005-02-03 23:00:49 +00001611 *pbuf = *dbuf++;
wdenkc6097192002-11-03 00:24:07 +00001612 }
wdenk1a344f22005-02-03 23:00:49 +00001613#endif
1614}
1615
1616static void
1617input_data_shorts(int dev, ushort *sect_buf, int shorts)
1618{
1619#if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
wdenka522fa02004-01-04 22:51:12 +00001620 uchar *dbuf;
1621 volatile uchar *pbuf_even;
1622 volatile uchar *pbuf_odd;
1623
1624 pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
1625 pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
1626 while (shorts--) {
wdenk5cf91d62004-04-23 20:32:05 +00001627 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001628 *dbuf++ = *pbuf_even;
wdenk5cf91d62004-04-23 20:32:05 +00001629 EIEIO;
wdenka522fa02004-01-04 22:51:12 +00001630 *dbuf++ = *pbuf_odd;
1631 }
wdenk1a344f22005-02-03 23:00:49 +00001632#else
1633 ushort *dbuf;
1634 volatile ushort *pbuf;
1635
1636 pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
1637 dbuf = (ushort *)sect_buf;
1638
1639 debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
1640
1641 while (shorts--) {
1642 EIEIO;
1643 *dbuf++ = *pbuf;
1644 }
1645#endif
wdenkc6097192002-11-03 00:24:07 +00001646}
1647
Albert Aribaudf2a37fc2010-08-08 05:17:05 +05301648#else /* ! CONFIG_IDE_SWAP_IO */
wdenk2262cfe2002-11-18 00:14:45 +00001649static void
1650output_data_shorts(int dev, ushort *sect_buf, int shorts)
1651{
wdenk15647dc2003-10-09 19:00:25 +00001652 outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
wdenk2262cfe2002-11-18 00:14:45 +00001653}
1654
wdenk2262cfe2002-11-18 00:14:45 +00001655static void
1656input_data_shorts(int dev, ushort *sect_buf, int shorts)
1657{
wdenk15647dc2003-10-09 19:00:25 +00001658 insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
wdenk2262cfe2002-11-18 00:14:45 +00001659}
1660
Albert Aribaudf2a37fc2010-08-08 05:17:05 +05301661#endif /* CONFIG_IDE_SWAP_IO */
wdenk2262cfe2002-11-18 00:14:45 +00001662
wdenkc6097192002-11-03 00:24:07 +00001663/*
1664 * Wait until (Status & mask) == res, or timeout (in ms)
1665 * Return last status
1666 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1667 * and then they set their DRQ Bit
1668 */
1669static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
1670{
1671 ulong delay = 10 * t; /* poll every 100 us */
1672 uchar c;
1673
wdenk2262cfe2002-11-18 00:14:45 +00001674 c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
1675 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
wdenkc6097192002-11-03 00:24:07 +00001676 /* break if error occurs (doesn't make sense to wait more) */
1677 if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
1678 break;
1679 udelay (100);
1680 if (delay-- == 0) {
1681 break;
1682 }
1683 }
1684 return (c);
1685}
1686
1687/*
1688 * issue an atapi command
1689 */
1690unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
1691{
1692 unsigned char c,err,mask,res;
1693 int n;
1694 ide_led (DEVICE_LED(device), 1); /* LED on */
1695
1696 /* Select device
1697 */
1698 mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
1699 res = 0;
wdenk2262cfe2002-11-18 00:14:45 +00001700 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001701 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1702 if ((c & mask) != res) {
1703 printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
1704 err=0xFF;
1705 goto AI_OUT;
1706 }
1707 /* write taskfile */
wdenk2262cfe2002-11-18 00:14:45 +00001708 ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
wdenkc7de8292002-11-19 11:04:11 +00001709 ide_outb (device, ATA_SECT_CNT, 0);
1710 ide_outb (device, ATA_SECT_NUM, 0);
wdenk2262cfe2002-11-18 00:14:45 +00001711 ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
wdenkc7de8292002-11-19 11:04:11 +00001712 ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
wdenk2262cfe2002-11-18 00:14:45 +00001713 ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
wdenkc6097192002-11-03 00:24:07 +00001714
wdenk2262cfe2002-11-18 00:14:45 +00001715 ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
wdenkc6097192002-11-03 00:24:07 +00001716 udelay (50);
1717
1718 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1719 res = ATA_STAT_DRQ;
1720 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1721
1722 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
Steven A. Falco4afbef92008-08-15 15:37:31 -04001723 printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
wdenkc6097192002-11-03 00:24:07 +00001724 err=0xFF;
1725 goto AI_OUT;
1726 }
1727
1728 output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
Wolfgang Denk53677ef2008-05-20 16:00:29 +02001729 /* ATAPI Command written wait for completition */
wdenkc6097192002-11-03 00:24:07 +00001730 udelay (5000); /* device must set bsy */
1731
1732 mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
1733 /* if no data wait for DRQ = 0 BSY = 0
1734 * if data wait for DRQ = 1 BSY = 0 */
1735 res=0;
1736 if(buflen)
1737 res = ATA_STAT_DRQ;
1738 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1739 if ((c & mask) != res ) {
1740 if (c & ATA_STAT_ERR) {
wdenk2262cfe2002-11-18 00:14:45 +00001741 err=(ide_inb(device,ATA_ERROR_REG))>>4;
wdenk1a344f22005-02-03 23:00:49 +00001742 debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
wdenkc6097192002-11-03 00:24:07 +00001743 } else {
Steven A. Falco4afbef92008-08-15 15:37:31 -04001744 printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
wdenkc6097192002-11-03 00:24:07 +00001745 err=0xFF;
1746 }
1747 goto AI_OUT;
1748 }
wdenk2262cfe2002-11-18 00:14:45 +00001749 n=ide_inb(device, ATA_CYL_HIGH);
wdenkc6097192002-11-03 00:24:07 +00001750 n<<=8;
wdenk2262cfe2002-11-18 00:14:45 +00001751 n+=ide_inb(device, ATA_CYL_LOW);
wdenkc6097192002-11-03 00:24:07 +00001752 if(n>buflen) {
1753 printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
1754 err=0xff;
1755 goto AI_OUT;
1756 }
1757 if((n==0)&&(buflen<0)) {
1758 printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
1759 err=0xff;
1760 goto AI_OUT;
1761 }
1762 if(n!=buflen) {
wdenk1a344f22005-02-03 23:00:49 +00001763 debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
wdenkc6097192002-11-03 00:24:07 +00001764 }
1765 if(n!=0) { /* data transfer */
wdenk1a344f22005-02-03 23:00:49 +00001766 debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
wdenkc6097192002-11-03 00:24:07 +00001767 /* we transfer shorts */
1768 n>>=1;
1769 /* ok now decide if it is an in or output */
wdenk2262cfe2002-11-18 00:14:45 +00001770 if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
wdenk1a344f22005-02-03 23:00:49 +00001771 debug ("Write to device\n");
wdenkc6097192002-11-03 00:24:07 +00001772 output_data_shorts(device,(unsigned short *)buffer,n);
1773 } else {
wdenk1a344f22005-02-03 23:00:49 +00001774 debug ("Read from device @ %p shorts %d\n",buffer,n);
wdenkc6097192002-11-03 00:24:07 +00001775 input_data_shorts(device,(unsigned short *)buffer,n);
1776 }
1777 }
1778 udelay(5000); /* seems that some CD ROMs need this... */
1779 mask = ATA_STAT_BUSY|ATA_STAT_ERR;
1780 res=0;
1781 c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
1782 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
wdenk2262cfe2002-11-18 00:14:45 +00001783 err=(ide_inb(device,ATA_ERROR_REG) >> 4);
wdenk1a344f22005-02-03 23:00:49 +00001784 debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
wdenkc6097192002-11-03 00:24:07 +00001785 } else {
1786 err = 0;
1787 }
1788AI_OUT:
1789 ide_led (DEVICE_LED(device), 0); /* LED off */
1790 return (err);
1791}
1792
1793/*
1794 * sending the command to atapi_issue. If an status other than good
1795 * returns, an request_sense will be issued
1796 */
1797
Wolfgang Denk53677ef2008-05-20 16:00:29 +02001798#define ATAPI_DRIVE_NOT_READY 100
wdenkc6097192002-11-03 00:24:07 +00001799#define ATAPI_UNIT_ATTN 10
1800
1801unsigned char atapi_issue_autoreq (int device,
1802 unsigned char* ccb,
1803 int ccblen,
1804 unsigned char *buffer,
1805 int buflen)
1806{
1807 unsigned char sense_data[18],sense_ccb[12];
1808 unsigned char res,key,asc,ascq;
1809 int notready,unitattn;
1810
1811 unitattn=ATAPI_UNIT_ATTN;
1812 notready=ATAPI_DRIVE_NOT_READY;
1813
1814retry:
1815 res= atapi_issue(device,ccb,ccblen,buffer,buflen);
1816 if (res==0)
1817 return (0); /* Ok */
1818
1819 if (res==0xFF)
1820 return (0xFF); /* error */
1821
wdenk1a344f22005-02-03 23:00:49 +00001822 debug ("(auto_req)atapi_issue returned sense key %X\n",res);
wdenkc6097192002-11-03 00:24:07 +00001823
1824 memset(sense_ccb,0,sizeof(sense_ccb));
1825 memset(sense_data,0,sizeof(sense_data));
1826 sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
wdenkc7de8292002-11-19 11:04:11 +00001827 sense_ccb[4]=18; /* allocation Length */
wdenkc6097192002-11-03 00:24:07 +00001828
1829 res=atapi_issue(device,sense_ccb,12,sense_data,18);
1830 key=(sense_data[2]&0xF);
1831 asc=(sense_data[12]);
1832 ascq=(sense_data[13]);
1833
wdenk1a344f22005-02-03 23:00:49 +00001834 debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
1835 debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
wdenkc6097192002-11-03 00:24:07 +00001836 sense_data[0],
1837 key,
1838 asc,
1839 ascq);
1840
1841 if((key==0))
1842 return 0; /* ok device ready */
1843
1844 if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
1845 if(unitattn-->0) {
1846 udelay(200*1000);
1847 goto retry;
1848 }
1849 printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
1850 goto error;
1851 }
1852 if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
1853 if (notready-->0) {
1854 udelay(200*1000);
1855 goto retry;
1856 }
1857 printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
1858 goto error;
1859 }
1860 if(asc==0x3a) {
wdenk1a344f22005-02-03 23:00:49 +00001861 debug ("Media not present\n");
wdenkc6097192002-11-03 00:24:07 +00001862 goto error;
1863 }
wdenkc7de8292002-11-19 11:04:11 +00001864
wdenkc6097192002-11-03 00:24:07 +00001865 printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
1866error:
wdenk1a344f22005-02-03 23:00:49 +00001867 debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
wdenkc6097192002-11-03 00:24:07 +00001868 return (0xFF);
1869}
1870
1871
wdenkc6097192002-11-03 00:24:07 +00001872static void atapi_inquiry(block_dev_desc_t * dev_desc)
1873{
1874 unsigned char ccb[12]; /* Command descriptor block */
1875 unsigned char iobuf[64]; /* temp buf */
1876 unsigned char c;
1877 int device;
1878
1879 device=dev_desc->dev;
1880 dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
1881 dev_desc->block_read=atapi_read;
1882
1883 memset(ccb,0,sizeof(ccb));
1884 memset(iobuf,0,sizeof(iobuf));
1885
1886 ccb[0]=ATAPI_CMD_INQUIRY;
1887 ccb[4]=40; /* allocation Legnth */
1888 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
1889
wdenk1a344f22005-02-03 23:00:49 +00001890 debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001891 if (c!=0)
1892 return;
1893
1894 /* copy device ident strings */
Jean-Christophe PLAGNIOL-VILLARD7a60ee72007-11-07 08:19:19 +01001895 ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
1896 ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
1897 ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
wdenkc6097192002-11-03 00:24:07 +00001898
1899 dev_desc->lun=0;
1900 dev_desc->lba=0;
1901 dev_desc->blksz=0;
1902 dev_desc->type=iobuf[0] & 0x1f;
1903
1904 if ((iobuf[1]&0x80)==0x80)
1905 dev_desc->removable = 1;
1906 else
1907 dev_desc->removable = 0;
1908
1909 memset(ccb,0,sizeof(ccb));
1910 memset(iobuf,0,sizeof(iobuf));
1911 ccb[0]=ATAPI_CMD_START_STOP;
1912 ccb[4]=0x03; /* start */
1913
1914 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1915
wdenk1a344f22005-02-03 23:00:49 +00001916 debug ("ATAPI_CMD_START_STOP returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001917 if (c!=0)
1918 return;
1919
1920 memset(ccb,0,sizeof(ccb));
1921 memset(iobuf,0,sizeof(iobuf));
1922 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
1923
wdenk1a344f22005-02-03 23:00:49 +00001924 debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001925 if (c!=0)
1926 return;
1927
1928 memset(ccb,0,sizeof(ccb));
1929 memset(iobuf,0,sizeof(iobuf));
1930 ccb[0]=ATAPI_CMD_READ_CAP;
1931 c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
wdenk1a344f22005-02-03 23:00:49 +00001932 debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
wdenkc6097192002-11-03 00:24:07 +00001933 if (c!=0)
1934 return;
1935
wdenk1a344f22005-02-03 23:00:49 +00001936 debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
wdenkc6097192002-11-03 00:24:07 +00001937 iobuf[0],iobuf[1],iobuf[2],iobuf[3],
1938 iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
1939
1940 dev_desc->lba =((unsigned long)iobuf[0]<<24) +
1941 ((unsigned long)iobuf[1]<<16) +
1942 ((unsigned long)iobuf[2]<< 8) +
1943 ((unsigned long)iobuf[3]);
1944 dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
1945 ((unsigned long)iobuf[5]<<16) +
1946 ((unsigned long)iobuf[6]<< 8) +
1947 ((unsigned long)iobuf[7]);
wdenk42dfe7a2004-03-14 22:25:36 +00001948#ifdef CONFIG_LBA48
wdenkc40b2952004-03-13 23:29:43 +00001949 dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
wdenk42dfe7a2004-03-14 22:25:36 +00001950#endif
wdenkc6097192002-11-03 00:24:07 +00001951 return;
1952}
1953
1954
1955/*
1956 * atapi_read:
1957 * we transfer only one block per command, since the multiple DRQ per
1958 * command is not yet implemented
1959 */
1960#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
1961#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
1962#define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
1963
Grant Likelyeb867a72007-02-20 09:05:45 +01001964ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
wdenkc6097192002-11-03 00:24:07 +00001965{
1966 ulong n = 0;
1967 unsigned char ccb[12]; /* Command descriptor block */
1968 ulong cnt;
1969
wdenk1a344f22005-02-03 23:00:49 +00001970 debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
wdenkc6097192002-11-03 00:24:07 +00001971 device, blknr, blkcnt, (ulong)buffer);
1972
1973 do {
1974 if (blkcnt>ATAPI_READ_MAX_BLOCK) {
1975 cnt=ATAPI_READ_MAX_BLOCK;
1976 } else {
1977 cnt=blkcnt;
1978 }
1979 ccb[0]=ATAPI_CMD_READ_12;
1980 ccb[1]=0; /* reserved */
1981 ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
1982 ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
1983 ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
1984 ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
1985 ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
1986 ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
1987 ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
1988 ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
1989 ccb[10]=0; /* reserved */
1990 ccb[11]=0; /* reserved */
1991
1992 if (atapi_issue_autoreq(device,ccb,12,
1993 (unsigned char *)buffer,
1994 cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
1995 return (n);
1996 }
1997 n+=cnt;
1998 blkcnt-=cnt;
1999 blknr+=cnt;
Greg Lopp0b945042007-04-13 08:02:24 +02002000 buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
wdenkc6097192002-11-03 00:24:07 +00002001 } while (blkcnt > 0);
2002 return (n);
2003}
2004
2005/* ------------------------------------------------------------------------- */
2006
2007#endif /* CONFIG_ATAPI */
2008
wdenk0d498392003-07-01 21:06:45 +00002009U_BOOT_CMD(
2010 ide, 5, 1, do_ide,
Peter Tyser2fb26042009-01-27 18:03:12 -06002011 "IDE sub-system",
wdenk8bde7f72003-06-27 21:31:46 +00002012 "reset - reset IDE controller\n"
2013 "ide info - show available IDE devices\n"
2014 "ide device [dev] - show or set current device\n"
2015 "ide part [dev] - print partition table of one or all IDE devices\n"
2016 "ide read addr blk# cnt\n"
2017 "ide write addr blk# cnt - read/write `cnt'"
2018 " blocks starting at block `blk#'\n"
Wolfgang Denka89c33d2009-05-24 17:06:54 +02002019 " to/from memory address `addr'"
wdenk8bde7f72003-06-27 21:31:46 +00002020);
2021
wdenk0d498392003-07-01 21:06:45 +00002022U_BOOT_CMD(
2023 diskboot, 3, 1, do_diskboot,
Peter Tyser2fb26042009-01-27 18:03:12 -06002024 "boot from IDE device",
Wolfgang Denka89c33d2009-05-24 17:06:54 +02002025 "loadAddr dev:part"
wdenk8bde7f72003-06-27 21:31:46 +00002026);