Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 63ff004c4fcad9f690bf44dbd15d568bb47aac2d / . / drivers / sk98lin / skge.c
blob: 61a6094230db84d91b59cec2a7e7a1ea7048f1f7 [file] [log] [blame]
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1/******************************************************************************
2 *
3 * Name: skge.c
4 * Project: GEnesis, PCI Gigabit Ethernet Adapter
5 * Version: $Revision: 1.46 $
6 * Date: $Date: 2003/02/25 14:16:36 $
7 * Purpose: The main driver source module
8 *
9 ******************************************************************************/
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]10
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]11/******************************************************************************
12 *
13 * (C)Copyright 1998-2003 SysKonnect GmbH.
14 *
15 * Driver for SysKonnect Gigabit Ethernet Server Adapters:
16 *
17 * SK-9871 (single link 1000Base-ZX)
18 * SK-9872 (dual link 1000Base-ZX)
19 * SK-9861 (single link 1000Base-SX, VF45 Volition Plug)
20 * SK-9862 (dual link 1000Base-SX, VF45 Volition Plug)
21 * SK-9841 (single link 1000Base-LX)
22 * SK-9842 (dual link 1000Base-LX)
23 * SK-9843 (single link 1000Base-SX)
24 * SK-9844 (dual link 1000Base-SX)
25 * SK-9821 (single link 1000Base-T)
26 * SK-9822 (dual link 1000Base-T)
27 * SK-9881 (single link 1000Base-SX V2 LC)
28 * SK-9871 (single link 1000Base-ZX V2)
29 * SK-9861 (single link 1000Base-SX V2, VF45 Volition Plug)
30 * SK-9841 (single link 1000Base-LX V2)
31 * SK-9843 (single link 1000Base-SX V2)
32 * SK-9821 (single link 1000Base-T V2)
33 *
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]34 * Created 10-Feb-1999, based on Linux' acenic.c, 3c59x.c and
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]35 * SysKonnects GEnesis Solaris driver
36 * Author: Christoph Goos (cgoos@syskonnect.de)
37 * Mirko Lindner (mlindner@syskonnect.de)
38 *
39 * Address all question to: linux@syskonnect.de
40 *
41 * The technical manual for the adapters is available from SysKonnect's
42 * web pages: www.syskonnect.com
43 * Goto "Support" and search Knowledge Base for "manual".
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]44 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]45 * This program is free software; you can redistribute it and/or modify
46 * it under the terms of the GNU General Public License as published by
47 * the Free Software Foundation; either version 2 of the License, or
48 * (at your option) any later version.
49 *
50 * The information in this file is provided "AS IS" without warranty.
51 *
52 ******************************************************************************/
53
54/******************************************************************************
55 *
56 * History:
57 *
58 * $Log: skge.c,v $
59 * Revision 1.46 2003/02/25 14:16:36 mlindner
60 * Fix: Copyright statement
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]61 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]62 * Revision 1.45 2003/02/25 13:25:55 mlindner
63 * Add: Performance improvements
64 * Add: Support for various vendors
65 * Fix: Init function
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]66 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]67 * Revision 1.44 2003/01/09 09:25:26 mlindner
68 * Fix: Remove useless init_module/cleanup_module forward declarations
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]69 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]70 * Revision 1.43 2002/11/29 08:42:41 mlindner
71 * Fix: Boot message
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]72 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]73 * Revision 1.42 2002/11/28 13:30:23 mlindner
74 * Add: New frame check
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]75 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]76 * Revision 1.41 2002/11/27 13:55:18 mlindner
77 * Fix: Drop wrong csum packets
78 * Fix: Initialize proc_entry after hw check
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]79 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]80 * Revision 1.40 2002/10/31 07:50:37 tschilli
81 * Function SkGeInitAssignRamToQueues() from common module inserted.
82 * Autonegotiation is set to ON for all adapters.
83 * LinkSpeedUsed is used in link up status report.
84 * Role parameter will show up for 1000 Mbps links only.
85 * GetConfiguration() inserted after init level 1 in SkGeChangeMtu().
86 * All return values of SkGeInit() and SkGeInitPort() are checked.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]87 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]88 * Revision 1.39 2002/10/02 12:56:05 mlindner
89 * Add: Support for Yukon
90 * Add: Support for ZEROCOPY, scatter-gather and hw checksum
91 * Add: New transmit ring function (use SG and TCP/UDP hardware checksumming)
92 * Add: New init function
93 * Add: Speed check and setup
94 * Add: Merge source for kernel 2.2.x and 2.4.x
95 * Add: Opcode check for tcp
96 * Add: Frame length check
97 * Fix: Transmit complete interrupt
98 * Fix: Interrupt moderation
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]99 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]100 * Revision 1.29.2.13 2002/01/14 12:44:52 mlindner
101 * Fix: Rlmt modes
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]102 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]103 * Revision 1.29.2.12 2001/12/07 12:06:18 mlindner
104 * Fix: malloc -> slab changes
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]105 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]106 * Revision 1.29.2.11 2001/12/06 15:19:20 mlindner
107 * Add: DMA attributes
108 * Fix: Module initialisation
109 * Fix: pci_map_single and pci_unmap_single replaced
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]110 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]111 * Revision 1.29.2.10 2001/12/06 09:56:50 mlindner
112 * Corrected some printk's
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]113 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]114 * Revision 1.29.2.9 2001/09/05 12:15:34 mlindner
115 * Add: LBFO Changes
116 * Fix: Counter Errors (Jumbo == to long errors)
117 * Fix: Changed pAC->PciDev declaration
118 * Fix: too short counters
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]119 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]120 * Revision 1.29.2.8 2001/06/25 12:10:44 mlindner
121 * fix: ReceiveIrq() changed.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]122 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]123 * Revision 1.29.2.7 2001/06/25 08:07:05 mlindner
124 * fix: RLMT locking in ReceiveIrq() changed.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]125 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]126 * Revision 1.29.2.6 2001/05/21 07:59:29 mlindner
127 * fix: MTU init problems
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]128 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]129 * Revision 1.29.2.5 2001/05/08 11:25:08 mlindner
130 * fix: removed VLAN error message
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]131 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]132 * Revision 1.29.2.4 2001/05/04 13:31:43 gklug
133 * fix: do not handle eth_copy on bad fragments received.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]134 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]135 * Revision 1.29.2.3 2001/04/23 08:06:43 mlindner
136 * Fix: error handling
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]137 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]138 * Revision 1.29.2.2 2001/03/15 12:04:54 mlindner
139 * Fixed memory problem
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]140 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]141 * Revision 1.29.2.1 2001/03/12 16:41:44 mlindner
142 * add: procfs function
143 * add: dual-net function
144 * add: RLMT networks
145 * add: extended PNMI features
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]146 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]147 * Kernel 2.4.x specific:
148 * Revision 1.xx 2000/09/12 13:31:56 cgoos
149 * Fixed missign "dev=NULL in skge_probe.
150 * Added counting for jumbo frames (corrects error statistic).
151 * Removed VLAN tag check (enables VLAN support).
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]152 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]153 * Kernel 2.2.x specific:
154 * Revision 1.29 2000/02/21 13:31:56 cgoos
155 * Fixed "unused" warning for UltraSPARC change.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]156 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]157 * Partially kernel 2.2.x specific:
158 * Revision 1.28 2000/02/21 10:32:36 cgoos
159 * Added fixes for UltraSPARC.
160 * Now printing RlmtMode and PrefPort setting at startup.
161 * Changed XmitFrame return value.
162 * Fixed rx checksum calculation for BIG ENDIAN systems.
163 * Fixed rx jumbo frames counted as ierrors.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]164 *
165 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]166 * Revision 1.27 1999/11/25 09:06:28 cgoos
167 * Changed base_addr to unsigned long.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]168 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]169 * Revision 1.26 1999/11/22 13:29:16 cgoos
170 * Changed license header to GPL.
171 * Changes for inclusion in linux kernel (2.2.13).
172 * Removed 2.0.x defines.
173 * Changed SkGeProbe to skge_probe.
174 * Added checks in SkGeIoctl.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]175 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]176 * Revision 1.25 1999/10/07 14:47:52 cgoos
177 * Changed 984x to 98xx.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]178 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]179 * Revision 1.24 1999/09/30 07:21:01 cgoos
180 * Removed SK_RLMT_SLOW_LOOKAHEAD option.
181 * Giving spanning tree packets also to OS now.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]182 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]183 * Revision 1.23 1999/09/29 07:36:50 cgoos
184 * Changed assignment for IsBc/IsMc.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]185 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]186 * Revision 1.22 1999/09/28 12:57:09 cgoos
187 * Added CheckQueue also to Single-Port-ISR.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]188 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]189 * Revision 1.21 1999/09/28 12:42:41 cgoos
190 * Changed parameter strings for RlmtMode.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]191 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]192 * Revision 1.20 1999/09/28 12:37:57 cgoos
193 * Added CheckQueue for fast delivery of RLMT frames.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]194 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]195 * Revision 1.19 1999/09/16 07:57:25 cgoos
196 * Copperfield changes.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]197 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]198 * Revision 1.18 1999/09/03 13:06:30 cgoos
199 * Fixed RlmtMode=CheckSeg bug: wrong DEV_KFREE_SKB in RLMT_SEND caused
200 * double allocated skb's.
201 * FrameStat in ReceiveIrq was accessed via wrong Rxd.
202 * Queue size for async. standby Tx queue was zero.
203 * FillRxLimit of 0 could cause problems with ReQueue, changed to 1.
204 * Removed debug output of checksum statistic.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]205 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]206 * Revision 1.17 1999/08/11 13:55:27 cgoos
207 * Transmit descriptor polling was not reenabled after SkGePortInit.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]208 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]209 * Revision 1.16 1999/07/27 15:17:29 cgoos
210 * Added some "\n" in output strings (removed while debuging...).
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]211 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]212 * Revision 1.15 1999/07/23 12:09:30 cgoos
213 * Performance optimization, rx checksumming, large frame support.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]214 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]215 * Revision 1.14 1999/07/14 11:26:27 cgoos
216 * Removed Link LED settings (now in RLMT).
217 * Added status output at NET UP.
218 * Fixed SMP problems with Tx and SWITCH running in parallel.
219 * Fixed return code problem at RLMT_SEND event.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]220 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]221 * Revision 1.13 1999/04/07 10:11:42 cgoos
222 * Fixed Single Port problems.
223 * Fixed Multi-Adapter problems.
224 * Always display startup string.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]225 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]226 * Revision 1.12 1999/03/29 12:26:37 cgoos
227 * Reversed locking to fine granularity.
228 * Fixed skb double alloc problem (caused by incorrect xmit return code).
229 * Enhanced function descriptions.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]230 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]231 * Revision 1.11 1999/03/15 13:10:51 cgoos
232 * Changed device identifier in output string to ethX.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]233 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]234 * Revision 1.10 1999/03/15 12:12:34 cgoos
235 * Changed copyright notice.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]236 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]237 * Revision 1.9 1999/03/15 12:10:17 cgoos
238 * Changed locking to one driver lock.
239 * Added check of SK_AC-size (for consistency with library).
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]240 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]241 * Revision 1.8 1999/03/08 11:44:02 cgoos
242 * Fixed missing dev->tbusy in SkGeXmit.
243 * Changed large frame (jumbo) buffer number.
244 * Added copying of short frames.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]245 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]246 * Revision 1.7 1999/03/04 13:26:57 cgoos
247 * Fixed spinlock calls for SMP.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]248 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]249 * Revision 1.6 1999/03/02 09:53:51 cgoos
250 * Added descriptor revertion for big endian machines.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]251 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]252 * Revision 1.5 1999/03/01 08:50:59 cgoos
253 * Fixed SkGeChangeMtu.
254 * Fixed pci config space accesses.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]255 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]256 * Revision 1.4 1999/02/18 15:48:44 cgoos
257 * Corrected some printk's.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]258 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]259 * Revision 1.3 1999/02/18 12:45:55 cgoos
260 * Changed SK_MAX_CARD_PARAM to default 16
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]261 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]262 * Revision 1.2 1999/02/18 10:55:32 cgoos
263 * Removed SkGeDrvTimeStamp function.
264 * Printing "ethX:" before adapter type at adapter init.
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]265 *
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]266 *
267 * 10-Feb-1999 cg Created, based on Linux' acenic.c, 3c59x.c and
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]268 * SysKonnects GEnesis Solaris driver
269 *
270 ******************************************************************************/
271
272/******************************************************************************
273 *
274 * Possible compiler options (#define xxx / -Dxxx):
275 *
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]276 * debugging can be enable by changing SK_DEBUG_CHKMOD and
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]277 * SK_DEBUG_CHKCAT in makefile (described there).
278 *
279 ******************************************************************************/
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]280
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]281/******************************************************************************
282 *
283 * Description:
284 *
285 * This is the main module of the Linux GE driver.
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]286 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]287 * All source files except skge.c, skdrv1st.h, skdrv2nd.h and sktypes.h
288 * are part of SysKonnect's COMMON MODULES for the SK-98xx adapters.
289 * Those are used for drivers on multiple OS', so some thing may seem
290 * unnecessary complicated on Linux. Please do not try to 'clean up'
291 * them without VERY good reasons, because this will make it more
292 * difficult to keep the Linux driver in synchronisation with the
293 * other versions.
294 *
295 * Include file hierarchy:
296 *
297 * <linux/module.h>
298 *
299 * "h/skdrv1st.h"
300 * <linux/version.h>
301 * <linux/types.h>
302 * <linux/kernel.h>
303 * <linux/string.h>
304 * <linux/errno.h>
305 * <linux/ioport.h>
306 * <linux/slab.h>
307 * <linux/interrupt.h>
308 * <linux/pci.h>
309 * <asm/byteorder.h>
310 * <asm/bitops.h>
311 * <asm/io.h>
312 * <linux/netdevice.h>
313 * <linux/etherdevice.h>
314 * <linux/skbuff.h>
315 * those three depending on kernel version used:
316 * <linux/bios32.h>
317 * <linux/init.h>
318 * <asm/uaccess.h>
319 * <net/checksum.h>
320 *
321 * "h/skerror.h"
322 * "h/skdebug.h"
323 * "h/sktypes.h"
324 * "h/lm80.h"
325 * "h/xmac_ii.h"
326 *
327 * "h/skdrv2nd.h"
328 * "h/skqueue.h"
329 * "h/skgehwt.h"
330 * "h/sktimer.h"
331 * "h/ski2c.h"
332 * "h/skgepnmi.h"
333 * "h/skvpd.h"
334 * "h/skgehw.h"
335 * "h/skgeinit.h"
336 * "h/skaddr.h"
337 * "h/skgesirq.h"
338 * "h/skcsum.h"
339 * "h/skrlmt.h"
340 *
341 ******************************************************************************/
342
wdenk149dded2003-09-10 18:20:28 +0000[diff] [blame]343#include <config.h>
344
345#ifdef CONFIG_SK98
346
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]347#include "h/skversion.h"
348#if 0
349#include <linux/module.h>
350#include <linux/init.h>
351#include <linux/proc_fs.h>
352#endif
353#include "h/skdrv1st.h"
354#include "h/skdrv2nd.h"
355
356
357/* defines ******************************************************************/
358/* for debuging on x86 only */
359/* #define BREAKPOINT() asm(" int $3"); */
360
361/* use the scatter-gather functionality with sendfile() */
362#if 0
363#define SK_ZEROCOPY
364#endif
365
366/* use of a transmit complete interrupt */
367#define USE_TX_COMPLETE
368
369/* use interrupt moderation (for tx complete only) */
370#define USE_INT_MOD
371#define INTS_PER_SEC 1000
372
373/*
374 * threshold for copying small receive frames
375 * set to 0 to avoid copying, set to 9001 to copy all frames
376 */
377#define SK_COPY_THRESHOLD 50
378
379/* number of adapters that can be configured via command line params */
380#define SK_MAX_CARD_PARAM 16
381
382
383/*
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]384 * use those defines for a compile-in version of the driver instead
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]385 * of command line parameters
386 */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]387/* #define LINK_SPEED_A {"Auto", } */
388/* #define LINK_SPEED_B {"Auto", } */
389/* #define AUTO_NEG_A {"Sense", } */
390/* #define AUTO_NEG_B {"Sense", } */
391/* #define DUP_CAP_A {"Both", } */
392/* #define DUP_CAP_B {"Both", } */
393/* #define FLOW_CTRL_A {"SymOrRem", } */
394/* #define FLOW_CTRL_B {"SymOrRem", } */
395/* #define ROLE_A {"Auto", } */
396/* #define ROLE_B {"Auto", } */
397/* #define PREF_PORT {"A", } */
398/* #define RLMT_MODE {"CheckLinkState", } */
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]399
400#define DEV_KFREE_SKB(skb) dev_kfree_skb(skb)
401#define DEV_KFREE_SKB_IRQ(skb) dev_kfree_skb_irq(skb)
402#define DEV_KFREE_SKB_ANY(skb) dev_kfree_skb_any(skb)
403
404/* function prototypes ******************************************************/
405static void FreeResources(struct SK_NET_DEVICE *dev);
406static int SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC);
407static SK_BOOL BoardAllocMem(SK_AC *pAC);
408static void BoardFreeMem(SK_AC *pAC);
409static void BoardInitMem(SK_AC *pAC);
410static void SetupRing(SK_AC*, void*, uintptr_t, RXD**, RXD**, RXD**,
411 int*, SK_BOOL);
412
413#if 0
414static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
415static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
416static int SkGeOpen(struct SK_NET_DEVICE *dev);
417static int SkGeClose(struct SK_NET_DEVICE *dev);
418static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
419static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p);
420static void SkGeSetRxMode(struct SK_NET_DEVICE *dev);
421static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev);
422static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd);
423#else
424void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs);
425void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs);
426int SkGeOpen(struct SK_NET_DEVICE *dev);
427int SkGeClose(struct SK_NET_DEVICE *dev);
428int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev);
429#endif
430static void GetConfiguration(SK_AC*);
431static void ProductStr(SK_AC*);
432static int XmitFrame(SK_AC*, TX_PORT*, struct sk_buff*);
433static void FreeTxDescriptors(SK_AC*pAC, TX_PORT*);
434static void FillRxRing(SK_AC*, RX_PORT*);
435static SK_BOOL FillRxDescriptor(SK_AC*, RX_PORT*);
436#if 0
437static void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
438#else
439void ReceiveIrq(SK_AC*, RX_PORT*, SK_BOOL);
440#endif
441static void ClearAndStartRx(SK_AC*, int);
442static void ClearTxIrq(SK_AC*, int, int);
443static void ClearRxRing(SK_AC*, RX_PORT*);
444static void ClearTxRing(SK_AC*, TX_PORT*);
445#if 0
446static void SetQueueSizes(SK_AC *pAC);
447
448static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int new_mtu);
449#endif
450static void PortReInitBmu(SK_AC*, int);
451#if 0
452static int SkGeIocMib(DEV_NET*, unsigned int, int);
453static int XmitFrameSG(SK_AC*, TX_PORT*, struct sk_buff*);
454#endif
455
456/*Extern */
457
458/* external Proc function */
459extern int proc_read(
460 char *buffer,
461 char **buffer_location,
462 off_t offset,
463 int buffer_length,
464 int *eof,
465 void *data);
466
467#ifdef DEBUG
468static void DumpMsg(struct sk_buff*, char*);
469static void DumpData(char*, int);
470static void DumpLong(char*, int);
471#endif
472void dump_frag( SK_U8 *data, int length);
473
474/* global variables *********************************************************/
475#if 0
476static const char *BootString = BOOT_STRING;
477#endif
478struct SK_NET_DEVICE *SkGeRootDev = NULL;
479static int probed __initdata = 0;
480
481/* local variables **********************************************************/
482static uintptr_t TxQueueAddr[SK_MAX_MACS][2] = {{0x680, 0x600},{0x780, 0x700}};
483static uintptr_t RxQueueAddr[SK_MAX_MACS] = {0x400, 0x480};
484
485
486/* local variables **********************************************************/
487const char SK_Root_Dir_entry[8];
488
489#if 0
490static struct proc_dir_entry *pSkRootDir;
491#endif
492
493
494static struct pci_device_id supported[] = {
495 {PCI_VENDOR_ID_3COM, 0x1700},
496 {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE},
wdenk0b8fa032004-04-25 14:37:29 +0000[diff] [blame]497 {PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU},
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]498 {}
499};
500
501
502/*****************************************************************************
503 *
504 * skge_probe - find all SK-98xx adapters
505 *
506 * Description:
507 * This function scans the PCI bus for SK-98xx adapters. Resources for
508 * each adapter are allocated and the adapter is brought into Init 1
509 * state.
510 *
511 * Returns:
512 * 0, if everything is ok
513 * !=0, on error
514 */
515#if 0
516static int __init skge_probe (void)
517#else
518int skge_probe (struct eth_device ** ret_dev)
519#endif
520{
521#if 0
522 int proc_root_initialized = 0;
523#endif
524 int boards_found = 0;
525#if 0
526 int vendor_flag = SK_FALSE;
527#endif
528 SK_AC *pAC;
529 DEV_NET *pNet = NULL;
530#if 0
531 struct proc_dir_entry *pProcFile;
532 struct pci_dev *pdev = NULL;
533 unsigned long base_address;
534#else
535 u32 base_address;
536#endif
537 struct SK_NET_DEVICE *dev = NULL;
538#if 0
539 SK_BOOL DeviceFound = SK_FALSE;
540#endif
541 SK_BOOL BootStringCount = SK_FALSE;
542#if 1
543 pci_dev_t devno;
544#endif
545
546 if (probed)
547 return -ENODEV;
548 probed++;
549
550 if (!pci_present()) /* is PCI support present? */
551 return -ENODEV;
552
553#if 0
554 while((pdev = pci_find_class(PCI_CLASS_NETWORK_ETHERNET << 8, pdev)))
555#else
556 while((devno = pci_find_devices (supported, boards_found)) >= 0)
557#endif
558 {
559
560 dev = NULL;
561 pNet = NULL;
562
563
564#if 0
565 SK_PCI_ISCOMPLIANT(vendor_flag, pdev);
566 if (!vendor_flag)
567 continue;
568#endif
569
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]570/* if ((pdev->vendor != PCI_VENDOR_ID_SYSKONNECT) &&
571 ((pdev->device != PCI_DEVICE_ID_SYSKONNECT_GE) ||
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]572 (pdev->device != PCI_DEVICE_ID_SYSKONNECT_YU))){
573 continue;
574 }
575*/
576#if 0
577 /* Configure DMA attributes. */
578 if (pci_set_dma_mask(pdev, (u64) 0xffffffffffffffff) &&
579 pci_set_dma_mask(pdev, (u64) 0xffffffff))
580 continue;
581#endif
582
583
584#if 0
585 if ((dev = init_etherdev(dev, sizeof(DEV_NET))) == NULL) {
586 printk(KERN_ERR "Unable to allocate etherdev "
587 "structure!\n");
588 break;
589 }
590#else
591 dev = malloc (sizeof *dev);
592 memset(dev, 0, sizeof(*dev));
593 dev->priv = malloc(sizeof(DEV_NET));
594#endif
595
596 if (dev->priv == NULL) {
597 printk(KERN_ERR "Unable to allocate adapter "
598 "structure!\n");
599 break;
600 }
601
602 pNet = dev->priv;
603 pNet->pAC = kmalloc(sizeof(SK_AC), GFP_KERNEL);
604 if (pNet->pAC == NULL){
605 kfree(dev->priv);
606 printk(KERN_ERR "Unable to allocate adapter "
607 "structure!\n");
608 break;
609 }
610
611 /* Print message */
612 if (!BootStringCount) {
613 /* set display flag to TRUE so that */
614 /* we only display this string ONCE */
615 BootStringCount = SK_TRUE;
616#ifdef SK98_INFO
617 printk("%s\n", BootString);
618#endif
619 }
620
621 memset(pNet->pAC, 0, sizeof(SK_AC));
622 pAC = pNet->pAC;
623#if 0
624 pAC->PciDev = pdev;
625 pAC->PciDevId = pdev->device;
626 pAC->dev[0] = dev;
627 pAC->dev[1] = dev;
628#else
629 pAC->PciDev = devno;
630 ret_dev[0] = pAC->dev[0] = dev;
631 ret_dev[1] = pAC->dev[1] = dev;
632#endif
633 sprintf(pAC->Name, "SysKonnect SK-98xx");
634 pAC->CheckQueue = SK_FALSE;
635
636 pNet->Mtu = 1500;
637 pNet->Up = 0;
638#if 0
639 dev->irq = pdev->irq;
640
641 dev->open = &SkGeOpen;
642 dev->stop = &SkGeClose;
643 dev->hard_start_xmit = &SkGeXmit;
644 dev->get_stats = &SkGeStats;
645 dev->set_multicast_list = &SkGeSetRxMode;
646 dev->set_mac_address = &SkGeSetMacAddr;
647 dev->do_ioctl = &SkGeIoctl;
648 dev->change_mtu = &SkGeChangeMtu;
649 dev->flags &= ~IFF_RUNNING;
650#endif
651
652#ifdef SK_ZEROCOPY
653 if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
654 /* Use only if yukon hardware */
655 /* SK and ZEROCOPY - fly baby... */
656 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
657 }
658#endif
659
660#if 0
661 /*
662 * Dummy value.
663 */
664 dev->base_addr = 42;
665 pci_set_master(pdev);
666
667 pci_set_master(pdev);
668 base_address = pci_resource_start (pdev, 0);
669#else
670 pci_write_config_dword(devno,
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]671 PCI_COMMAND,
672 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]673 pci_read_config_dword (devno, PCI_BASE_ADDRESS_0,
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]674 &base_address);
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]675#endif
676
677#ifdef SK_BIG_ENDIAN
678 /*
679 * On big endian machines, we use the adapter's aibility of
680 * reading the descriptors as big endian.
681 */
682 {
683 SK_U32 our2;
684 SkPciReadCfgDWord(pAC, PCI_OUR_REG_2, &our2);
685 our2 |= PCI_REV_DESC;
686 SkPciWriteCfgDWord(pAC, PCI_OUR_REG_2, our2);
687 }
688#endif
689
690 /*
691 * Remap the regs into kernel space.
692 */
693#if 0
694 pAC->IoBase = (char*)ioremap(base_address, 0x4000);
695#else
696 pAC->IoBase = (char*)pci_mem_to_phys(devno, base_address);
697#endif
698
699 if (!pAC->IoBase){
700 printk(KERN_ERR "%s: Unable to map I/O register, "
701 "SK 98xx No. %i will be disabled.\n",
702 dev->name, boards_found);
703 kfree(dev);
704 break;
705 }
706
707 pAC->Index = boards_found;
708 if (SkGeBoardInit(dev, pAC)) {
709 FreeResources(dev);
710 kfree(dev);
711 continue;
712 }
713
714#if 0
715 memcpy((caddr_t) &dev->dev_addr,
716 (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
717#else
718 memcpy((caddr_t) &dev->enetaddr,
719 (caddr_t) &pAC->Addr.Net[0].CurrentMacAddress, 6);
720#endif
721
722#if 0
723 /* First adapter... Create proc and print message */
724 if (!DeviceFound) {
725 DeviceFound = SK_TRUE;
726 SK_MEMCPY(&SK_Root_Dir_entry, BootString,
727 sizeof(SK_Root_Dir_entry) - 1);
728
729 /*Create proc (directory)*/
730 if(!proc_root_initialized) {
731 pSkRootDir = create_proc_entry(SK_Root_Dir_entry,
732 S_IFDIR | S_IWUSR | S_IRUGO | S_IXUGO, proc_net);
733 proc_root_initialized = 1;
734 }
735
736 pSkRootDir->owner = THIS_MODULE;
737 }
738
739
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]740 /* Create proc file */
741 pProcFile = create_proc_entry(dev->name,
742 S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
743 pSkRootDir);
744
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]745
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]746 pProcFile->read_proc = proc_read;
747 pProcFile->write_proc = NULL;
748 pProcFile->nlink = 1;
749 pProcFile->size = sizeof(dev->name + 1);
750 pProcFile->data = (void *)pProcFile;
751#endif
752
753 pNet->PortNr = 0;
754 pNet->NetNr = 0;
755
756#ifdef SK_ZEROCOPY
757 if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
758 /* SG and ZEROCOPY - fly baby... */
759 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
760 }
761#endif
762
763 boards_found++;
764
765 /* More then one port found */
766 if ((pAC->GIni.GIMacsFound == 2 ) && (pAC->RlmtNets == 2)) {
767#if 0
768 if ((dev = init_etherdev(NULL, sizeof(DEV_NET))) == 0) {
769 printk(KERN_ERR "Unable to allocate etherdev "
770 "structure!\n");
771 break;
772 }
773#else
774 dev = malloc (sizeof *dev);
775 memset(dev, 0, sizeof(*dev));
776 dev->priv = malloc(sizeof(DEV_NET));
777#endif
778
779 pAC->dev[1] = dev;
780 pNet = dev->priv;
781 pNet->PortNr = 1;
782 pNet->NetNr = 1;
783 pNet->pAC = pAC;
784 pNet->Mtu = 1500;
785 pNet->Up = 0;
786
787#if 0
788 dev->open = &SkGeOpen;
789 dev->stop = &SkGeClose;
790 dev->hard_start_xmit = &SkGeXmit;
791 dev->get_stats = &SkGeStats;
792 dev->set_multicast_list = &SkGeSetRxMode;
793 dev->set_mac_address = &SkGeSetMacAddr;
794 dev->do_ioctl = &SkGeIoctl;
795 dev->change_mtu = &SkGeChangeMtu;
796 dev->flags &= ~IFF_RUNNING;
797#endif
798
799#ifdef SK_ZEROCOPY
800 if (pAC->GIni.GIChipId == CHIP_ID_YUKON) {
801 /* SG and ZEROCOPY - fly baby... */
802 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
803 }
804#endif
805
806#if 0
807 pProcFile = create_proc_entry(dev->name,
808 S_IFREG | S_IXUSR | S_IWGRP | S_IROTH,
809 pSkRootDir);
810
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]811
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]812 pProcFile->read_proc = proc_read;
813 pProcFile->write_proc = NULL;
814 pProcFile->nlink = 1;
815 pProcFile->size = sizeof(dev->name + 1);
816 pProcFile->data = (void *)pProcFile;
817#endif
818
819#if 0
820 memcpy((caddr_t) &dev->dev_addr,
821 (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
822#else
823 memcpy((caddr_t) &dev->enetaddr,
824 (caddr_t) &pAC->Addr.Net[1].CurrentMacAddress, 6);
825#endif
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]826
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]827 printk("%s: %s\n", dev->name, pAC->DeviceStr);
828 printk(" PrefPort:B RlmtMode:Dual Check Link State\n");
829
830 }
831
832
833 /* Save the hardware revision */
834 pAC->HWRevision = (((pAC->GIni.GIPciHwRev >> 4) & 0x0F)*10) +
835 (pAC->GIni.GIPciHwRev & 0x0F);
836
837 /*
838 * This is bollocks, but we need to tell the net-init
839 * code that it shall go for the next device.
840 */
841#if 0
842#ifndef MODULE
843 dev->base_addr = 0;
844#endif
845#endif
846 }
847
848 /*
849 * If we're at this point we're going through skge_probe() for
850 * the first time. Return success (0) if we've initialized 1
851 * or more boards. Otherwise, return failure (-ENODEV).
852 */
853
854 return boards_found;
855} /* skge_probe */
856
857
858/*****************************************************************************
859 *
860 * FreeResources - release resources allocated for adapter
861 *
862 * Description:
863 * This function releases the IRQ, unmaps the IO and
864 * frees the desriptor ring.
865 *
866 * Returns: N/A
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]867 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]868 */
869static void FreeResources(struct SK_NET_DEVICE *dev)
870{
871SK_U32 AllocFlag;
872DEV_NET *pNet;
873SK_AC *pAC;
874
875 if (dev->priv) {
876 pNet = (DEV_NET*) dev->priv;
877 pAC = pNet->pAC;
878 AllocFlag = pAC->AllocFlag;
879#if 0
880 if (AllocFlag & SK_ALLOC_IRQ) {
881 free_irq(dev->irq, dev);
882 }
883 if (pAC->IoBase) {
884 iounmap(pAC->IoBase);
885 }
886#endif
887 if (pAC->pDescrMem) {
888 BoardFreeMem(pAC);
889 }
890 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]891
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]892} /* FreeResources */
893
894#if 0
895MODULE_AUTHOR("Mirko Lindner <mlindner@syskonnect.de>");
896MODULE_DESCRIPTION("SysKonnect SK-NET Gigabit Ethernet SK-98xx driver");
897MODULE_LICENSE("GPL");
898MODULE_PARM(Speed_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
899MODULE_PARM(Speed_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
900MODULE_PARM(AutoNeg_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
901MODULE_PARM(AutoNeg_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
902MODULE_PARM(DupCap_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
903MODULE_PARM(DupCap_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
904MODULE_PARM(FlowCtrl_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
905MODULE_PARM(FlowCtrl_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
906MODULE_PARM(Role_A, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
907MODULE_PARM(Role_B, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
908MODULE_PARM(PrefPort, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
909MODULE_PARM(RlmtMode, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "s");
910/* not used, just there because every driver should have them: */
911MODULE_PARM(options, "1-" __MODULE_STRING(SK_MAX_CARD_PARAM) "i");
912MODULE_PARM(debug, "i");
913#endif
914
915
916#ifdef LINK_SPEED_A
917static char *Speed_A[SK_MAX_CARD_PARAM] = LINK_SPEED_A;
918#else
919static char *Speed_A[SK_MAX_CARD_PARAM] = {"", };
920#endif
921
922#ifdef LINK_SPEED_B
923static char *Speed_B[SK_MAX_CARD_PARAM] = LINK_SPEED_B;
924#else
925static char *Speed_B[SK_MAX_CARD_PARAM] = {"", };
926#endif
927
928#ifdef AUTO_NEG_A
929static char *AutoNeg_A[SK_MAX_CARD_PARAM] = AUTO_NEG_A;
930#else
931static char *AutoNeg_A[SK_MAX_CARD_PARAM] = {"", };
932#endif
933
934#ifdef DUP_CAP_A
935static char *DupCap_A[SK_MAX_CARD_PARAM] = DUP_CAP_A;
936#else
937static char *DupCap_A[SK_MAX_CARD_PARAM] = {"", };
938#endif
939
940#ifdef FLOW_CTRL_A
941static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = FLOW_CTRL_A;
942#else
943static char *FlowCtrl_A[SK_MAX_CARD_PARAM] = {"", };
944#endif
945
946#ifdef ROLE_A
947static char *Role_A[SK_MAX_CARD_PARAM] = ROLE_A;
948#else
949static char *Role_A[SK_MAX_CARD_PARAM] = {"", };
950#endif
951
952#ifdef AUTO_NEG_B
953static char *AutoNeg_B[SK_MAX_CARD_PARAM] = AUTO_NEG_B;
954#else
955static char *AutoNeg_B[SK_MAX_CARD_PARAM] = {"", };
956#endif
957
958#ifdef DUP_CAP_B
959static char *DupCap_B[SK_MAX_CARD_PARAM] = DUP_CAP_B;
960#else
961static char *DupCap_B[SK_MAX_CARD_PARAM] = {"", };
962#endif
963
964#ifdef FLOW_CTRL_B
965static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = FLOW_CTRL_B;
966#else
967static char *FlowCtrl_B[SK_MAX_CARD_PARAM] = {"", };
968#endif
969
970#ifdef ROLE_B
971static char *Role_B[SK_MAX_CARD_PARAM] = ROLE_B;
972#else
973static char *Role_B[SK_MAX_CARD_PARAM] = {"", };
974#endif
975
976#ifdef PREF_PORT
977static char *PrefPort[SK_MAX_CARD_PARAM] = PREF_PORT;
978#else
979static char *PrefPort[SK_MAX_CARD_PARAM] = {"", };
980#endif
981
982#ifdef RLMT_MODE
983static char *RlmtMode[SK_MAX_CARD_PARAM] = RLMT_MODE;
984#else
985static char *RlmtMode[SK_MAX_CARD_PARAM] = {"", };
986#endif
987
988#if 0
989static int debug = 0; /* not used */
990static int options[SK_MAX_CARD_PARAM] = {0, }; /* not used */
991
992
993/*****************************************************************************
994 *
995 * skge_init_module - module initialization function
996 *
997 * Description:
998 * Very simple, only call skge_probe and return approriate result.
999 *
1000 * Returns:
1001 * 0, if everything is ok
1002 * !=0, on error
1003 */
1004static int __init skge_init_module(void)
1005{
1006 int cards;
1007 SkGeRootDev = NULL;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1008
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1009 /* just to avoid warnings ... */
1010 debug = 0;
1011 options[0] = 0;
1012
1013 cards = skge_probe();
1014 if (cards == 0) {
1015 printk("sk98lin: No adapter found.\n");
1016 }
1017 return cards ? 0 : -ENODEV;
1018} /* skge_init_module */
1019
1020
1021/*****************************************************************************
1022 *
1023 * skge_cleanup_module - module unload function
1024 *
1025 * Description:
1026 * Disable adapter if it is still running, free resources,
1027 * free device struct.
1028 *
1029 * Returns: N/A
1030 */
1031static void __exit skge_cleanup_module(void)
1032{
1033DEV_NET *pNet;
1034SK_AC *pAC;
1035struct SK_NET_DEVICE *next;
1036unsigned long Flags;
1037SK_EVPARA EvPara;
1038
1039 while (SkGeRootDev) {
1040 pNet = (DEV_NET*) SkGeRootDev->priv;
1041 pAC = pNet->pAC;
1042 next = pAC->Next;
1043
1044 netif_stop_queue(SkGeRootDev);
1045 SkGeYellowLED(pAC, pAC->IoBase, 0);
1046
1047 if(pAC->BoardLevel == 2) {
1048 /* board is still alive */
1049 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1050 EvPara.Para32[0] = 0;
1051 EvPara.Para32[1] = -1;
1052 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1053 EvPara.Para32[0] = 1;
1054 EvPara.Para32[1] = -1;
1055 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1056 SkEventDispatcher(pAC, pAC->IoBase);
1057 /* disable interrupts */
1058 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1059 SkGeDeInit(pAC, pAC->IoBase);
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1060 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1061 pAC->BoardLevel = 0;
1062 /* We do NOT check here, if IRQ was pending, of course*/
1063 }
1064
1065 if(pAC->BoardLevel == 1) {
1066 /* board is still alive */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1067 SkGeDeInit(pAC, pAC->IoBase);
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1068 pAC->BoardLevel = 0;
1069 }
1070
1071 if ((pAC->GIni.GIMacsFound == 2) && pAC->RlmtNets == 2){
1072 unregister_netdev(pAC->dev[1]);
1073 kfree(pAC->dev[1]);
1074 }
1075
1076 FreeResources(SkGeRootDev);
1077
1078 SkGeRootDev->get_stats = NULL;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1079 /*
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1080 * otherwise unregister_netdev calls get_stats with
1081 * invalid IO ... :-(
1082 */
1083 unregister_netdev(SkGeRootDev);
1084 kfree(SkGeRootDev);
1085 kfree(pAC);
1086 SkGeRootDev = next;
1087 }
1088
1089 /* clear proc-dir */
1090 remove_proc_entry(pSkRootDir->name, proc_net);
1091
1092} /* skge_cleanup_module */
1093
1094module_init(skge_init_module);
1095module_exit(skge_cleanup_module);
1096#endif
1097
1098
1099/*****************************************************************************
1100 *
1101 * SkGeBoardInit - do level 0 and 1 initialization
1102 *
1103 * Description:
1104 * This function prepares the board hardware for running. The desriptor
1105 * ring is set up, the IRQ is allocated and the configuration settings
1106 * are examined.
1107 *
1108 * Returns:
1109 * 0, if everything is ok
1110 * !=0, on error
1111 */
1112static int __init SkGeBoardInit(struct SK_NET_DEVICE *dev, SK_AC *pAC)
1113{
1114short i;
1115unsigned long Flags;
1116char *DescrString = "sk98lin: Driver for Linux"; /* this is given to PNMI */
1117char *VerStr = VER_STRING;
1118#if 0
1119int Ret; /* return code of request_irq */
1120#endif
1121SK_BOOL DualNet;
1122
1123 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1124 ("IoBase: %08lX\n", (unsigned long)pAC->IoBase));
1125 for (i=0; i<SK_MAX_MACS; i++) {
1126 pAC->TxPort[i][0].HwAddr = pAC->IoBase + TxQueueAddr[i][0];
1127 pAC->TxPort[i][0].PortIndex = i;
1128 pAC->RxPort[i].HwAddr = pAC->IoBase + RxQueueAddr[i];
1129 pAC->RxPort[i].PortIndex = i;
1130 }
1131
1132 /* Initialize the mutexes */
1133 for (i=0; i<SK_MAX_MACS; i++) {
1134 spin_lock_init(&pAC->TxPort[i][0].TxDesRingLock);
1135 spin_lock_init(&pAC->RxPort[i].RxDesRingLock);
1136 }
1137 spin_lock_init(&pAC->SlowPathLock);
1138
1139 /* level 0 init common modules here */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1140
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1141 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1142 /* Does a RESET on board ...*/
1143 if (SkGeInit(pAC, pAC->IoBase, 0) != 0) {
1144 printk("HWInit (0) failed.\n");
1145 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1146 return(-EAGAIN);
1147 }
1148 SkI2cInit( pAC, pAC->IoBase, 0);
1149 SkEventInit(pAC, pAC->IoBase, 0);
1150 SkPnmiInit( pAC, pAC->IoBase, 0);
1151 SkAddrInit( pAC, pAC->IoBase, 0);
1152 SkRlmtInit( pAC, pAC->IoBase, 0);
1153 SkTimerInit(pAC, pAC->IoBase, 0);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1154
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1155 pAC->BoardLevel = 0;
1156 pAC->RxBufSize = ETH_BUF_SIZE;
1157
1158 SK_PNMI_SET_DRIVER_DESCR(pAC, DescrString);
1159 SK_PNMI_SET_DRIVER_VER(pAC, VerStr);
1160
1161 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1162
1163 /* level 1 init common modules here (HW init) */
1164 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1165 if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
1166 printk("HWInit (1) failed.\n");
1167 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1168 return(-EAGAIN);
1169 }
1170 SkI2cInit( pAC, pAC->IoBase, 1);
1171 SkEventInit(pAC, pAC->IoBase, 1);
1172 SkPnmiInit( pAC, pAC->IoBase, 1);
1173 SkAddrInit( pAC, pAC->IoBase, 1);
1174 SkRlmtInit( pAC, pAC->IoBase, 1);
1175 SkTimerInit(pAC, pAC->IoBase, 1);
1176
1177 GetConfiguration(pAC);
1178 if (pAC->RlmtNets == 2) {
1179 pAC->GIni.GIPortUsage = SK_MUL_LINK;
1180 }
1181
1182 pAC->BoardLevel = 1;
1183 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1184
1185#if 0
1186 if (pAC->GIni.GIMacsFound == 2) {
1187 Ret = request_irq(dev->irq, SkGeIsr, SA_SHIRQ, pAC->Name, dev);
1188 } else if (pAC->GIni.GIMacsFound == 1) {
1189 Ret = request_irq(dev->irq, SkGeIsrOnePort, SA_SHIRQ,
1190 pAC->Name, dev);
1191 } else {
1192 printk(KERN_WARNING "%s: Illegal number of ports: %d\n",
1193 dev->name, pAC->GIni.GIMacsFound);
1194 return -EAGAIN;
1195 }
1196
1197 if (Ret) {
1198 printk(KERN_WARNING "%s: Requested IRQ %d is busy.\n",
1199 dev->name, dev->irq);
1200 return -EAGAIN;
1201 }
1202#endif
1203 pAC->AllocFlag |= SK_ALLOC_IRQ;
1204
1205 /* Alloc memory for this board (Mem for RxD/TxD) : */
1206 if(!BoardAllocMem(pAC)) {
1207 printk("No memory for descriptor rings.\n");
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1208 return(-EAGAIN);
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1209 }
1210
1211 SkCsSetReceiveFlags(pAC,
1212 SKCS_PROTO_IP | SKCS_PROTO_TCP | SKCS_PROTO_UDP,
1213 &pAC->CsOfs1, &pAC->CsOfs2, 0);
1214 pAC->CsOfs = (pAC->CsOfs2 << 16) | pAC->CsOfs1;
1215
1216 BoardInitMem(pAC);
1217#if 0
1218 SetQueueSizes(pAC);
1219#else
1220 /* tschilling: New common function with minimum size check. */
1221 DualNet = SK_FALSE;
1222 if (pAC->RlmtNets == 2) {
1223 DualNet = SK_TRUE;
1224 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1225
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1226 if (SkGeInitAssignRamToQueues(
1227 pAC,
1228 pAC->ActivePort,
1229 DualNet)) {
1230 BoardFreeMem(pAC);
1231 printk("SkGeInitAssignRamToQueues failed.\n");
1232 return(-EAGAIN);
1233 }
1234#endif
1235
1236 /* Print adapter specific string from vpd */
1237 ProductStr(pAC);
1238#ifdef SK98_INFO
1239 printk("%s: %s\n", dev->name, pAC->DeviceStr);
1240
1241 /* Print configuration settings */
1242 printk(" PrefPort:%c RlmtMode:%s\n",
1243 'A' + pAC->Rlmt.Net[0].Port[pAC->Rlmt.Net[0].PrefPort]->PortNumber,
1244 (pAC->RlmtMode==0) ? "Check Link State" :
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1245 ((pAC->RlmtMode==1) ? "Check Link State" :
1246 ((pAC->RlmtMode==3) ? "Check Local Port" :
1247 ((pAC->RlmtMode==7) ? "Check Segmentation" :
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1248 ((pAC->RlmtMode==17) ? "Dual Check Link State" :"Error")))));
1249#endif
1250
1251 SkGeYellowLED(pAC, pAC->IoBase, 1);
1252
1253 /*
1254 * Register the device here
1255 */
1256 pAC->Next = SkGeRootDev;
1257 SkGeRootDev = dev;
1258
1259 return (0);
1260} /* SkGeBoardInit */
1261
1262
1263/*****************************************************************************
1264 *
1265 * BoardAllocMem - allocate the memory for the descriptor rings
1266 *
1267 * Description:
1268 * This function allocates the memory for all descriptor rings.
1269 * Each ring is aligned for the desriptor alignment and no ring
1270 * has a 4 GByte boundary in it (because the upper 32 bit must
1271 * be constant for all descriptiors in one rings).
1272 *
1273 * Returns:
1274 * SK_TRUE, if all memory could be allocated
1275 * SK_FALSE, if not
1276 */
1277static SK_BOOL BoardAllocMem(
1278SK_AC *pAC)
1279{
1280caddr_t pDescrMem; /* pointer to descriptor memory area */
1281size_t AllocLength; /* length of complete descriptor area */
1282int i; /* loop counter */
1283unsigned long BusAddr;
1284
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1285
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1286 /* rings plus one for alignment (do not cross 4 GB boundary) */
1287 /* RX_RING_SIZE is assumed bigger than TX_RING_SIZE */
1288#if (BITS_PER_LONG == 32)
1289 AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
1290#else
1291 AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
1292 + RX_RING_SIZE + 8;
1293#endif
1294
1295 pDescrMem = pci_alloc_consistent(pAC->PciDev, AllocLength,
1296 &pAC->pDescrMemDMA);
1297
1298 if (pDescrMem == NULL) {
1299 return (SK_FALSE);
1300 }
1301 pAC->pDescrMem = pDescrMem;
1302 BusAddr = (unsigned long) pAC->pDescrMemDMA;
1303
1304 /* Descriptors need 8 byte alignment, and this is ensured
1305 * by pci_alloc_consistent.
1306 */
1307 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1308 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
1309 ("TX%d/A: pDescrMem: %lX, PhysDescrMem: %lX\n",
1310 i, (unsigned long) pDescrMem,
1311 BusAddr));
1312 pAC->TxPort[i][0].pTxDescrRing = pDescrMem;
1313 pAC->TxPort[i][0].VTxDescrRing = BusAddr;
1314 pDescrMem += TX_RING_SIZE;
1315 BusAddr += TX_RING_SIZE;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1316
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1317 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
1318 ("RX%d: pDescrMem: %lX, PhysDescrMem: %lX\n",
1319 i, (unsigned long) pDescrMem,
1320 (unsigned long)BusAddr));
1321 pAC->RxPort[i].pRxDescrRing = pDescrMem;
1322 pAC->RxPort[i].VRxDescrRing = BusAddr;
1323 pDescrMem += RX_RING_SIZE;
1324 BusAddr += RX_RING_SIZE;
1325 } /* for */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1326
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1327 return (SK_TRUE);
1328} /* BoardAllocMem */
1329
1330
1331/****************************************************************************
1332 *
1333 * BoardFreeMem - reverse of BoardAllocMem
1334 *
1335 * Description:
1336 * Free all memory allocated in BoardAllocMem: adapter context,
1337 * descriptor rings, locks.
1338 *
1339 * Returns: N/A
1340 */
1341static void BoardFreeMem(
1342SK_AC *pAC)
1343{
1344size_t AllocLength; /* length of complete descriptor area */
1345
1346 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1347 ("BoardFreeMem\n"));
1348#if (BITS_PER_LONG == 32)
1349 AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound + 8;
1350#else
1351 AllocLength = (RX_RING_SIZE + TX_RING_SIZE) * pAC->GIni.GIMacsFound
1352 + RX_RING_SIZE + 8;
1353#endif
1354
1355 pci_free_consistent(pAC->PciDev, AllocLength,
1356 pAC->pDescrMem, pAC->pDescrMemDMA);
1357 pAC->pDescrMem = NULL;
1358} /* BoardFreeMem */
1359
1360
1361/*****************************************************************************
1362 *
1363 * BoardInitMem - initiate the descriptor rings
1364 *
1365 * Description:
1366 * This function sets the descriptor rings up in memory.
1367 * The adapter is initialized with the descriptor start addresses.
1368 *
1369 * Returns: N/A
1370 */
1371static void BoardInitMem(
1372SK_AC *pAC) /* pointer to adapter context */
1373{
1374int i; /* loop counter */
1375int RxDescrSize; /* the size of a rx descriptor rounded up to alignment*/
1376int TxDescrSize; /* the size of a tx descriptor rounded up to alignment*/
1377
1378 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1379 ("BoardInitMem\n"));
1380
1381 RxDescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
1382 pAC->RxDescrPerRing = RX_RING_SIZE / RxDescrSize;
1383 TxDescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) * DESCR_ALIGN;
1384 pAC->TxDescrPerRing = TX_RING_SIZE / RxDescrSize;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1385
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1386 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1387 SetupRing(
1388 pAC,
1389 pAC->TxPort[i][0].pTxDescrRing,
1390 pAC->TxPort[i][0].VTxDescrRing,
1391 (RXD**)&pAC->TxPort[i][0].pTxdRingHead,
1392 (RXD**)&pAC->TxPort[i][0].pTxdRingTail,
1393 (RXD**)&pAC->TxPort[i][0].pTxdRingPrev,
1394 &pAC->TxPort[i][0].TxdRingFree,
1395 SK_TRUE);
1396 SetupRing(
1397 pAC,
1398 pAC->RxPort[i].pRxDescrRing,
1399 pAC->RxPort[i].VRxDescrRing,
1400 &pAC->RxPort[i].pRxdRingHead,
1401 &pAC->RxPort[i].pRxdRingTail,
1402 &pAC->RxPort[i].pRxdRingPrev,
1403 &pAC->RxPort[i].RxdRingFree,
1404 SK_FALSE);
1405 }
1406} /* BoardInitMem */
1407
1408
1409/*****************************************************************************
1410 *
1411 * SetupRing - create one descriptor ring
1412 *
1413 * Description:
1414 * This function creates one descriptor ring in the given memory area.
1415 * The head, tail and number of free descriptors in the ring are set.
1416 *
1417 * Returns:
1418 * none
1419 */
1420static void SetupRing(
1421SK_AC *pAC,
1422void *pMemArea, /* a pointer to the memory area for the ring */
1423uintptr_t VMemArea, /* the virtual bus address of the memory area */
1424RXD **ppRingHead, /* address where the head should be written */
1425RXD **ppRingTail, /* address where the tail should be written */
1426RXD **ppRingPrev, /* address where the tail should be written */
1427int *pRingFree, /* address where the # of free descr. goes */
1428SK_BOOL IsTx) /* flag: is this a tx ring */
1429{
1430int i; /* loop counter */
1431int DescrSize; /* the size of a descriptor rounded up to alignment*/
1432int DescrNum; /* number of descriptors per ring */
1433RXD *pDescr; /* pointer to a descriptor (receive or transmit) */
1434RXD *pNextDescr; /* pointer to the next descriptor */
1435RXD *pPrevDescr; /* pointer to the previous descriptor */
1436uintptr_t VNextDescr; /* the virtual bus address of the next descriptor */
1437
1438 if (IsTx == SK_TRUE) {
1439 DescrSize = (((sizeof(TXD) - 1) / DESCR_ALIGN) + 1) *
1440 DESCR_ALIGN;
1441 DescrNum = TX_RING_SIZE / DescrSize;
1442 } else {
1443 DescrSize = (((sizeof(RXD) - 1) / DESCR_ALIGN) + 1) *
1444 DESCR_ALIGN;
1445 DescrNum = RX_RING_SIZE / DescrSize;
1446 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1447
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1448 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
1449 ("Descriptor size: %d Descriptor Number: %d\n",
1450 DescrSize,DescrNum));
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1451
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1452 pDescr = (RXD*) pMemArea;
1453 pPrevDescr = NULL;
1454 pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
1455 VNextDescr = VMemArea + DescrSize;
1456 for(i=0; i<DescrNum; i++) {
1457 /* set the pointers right */
1458 pDescr->VNextRxd = VNextDescr & 0xffffffffULL;
1459 pDescr->pNextRxd = pNextDescr;
1460 pDescr->TcpSumStarts = pAC->CsOfs;
1461
1462 /* advance one step */
1463 pPrevDescr = pDescr;
1464 pDescr = pNextDescr;
1465 pNextDescr = (RXD*) (((char*)pDescr) + DescrSize);
1466 VNextDescr += DescrSize;
1467 }
1468 pPrevDescr->pNextRxd = (RXD*) pMemArea;
1469 pPrevDescr->VNextRxd = VMemArea;
1470 pDescr = (RXD*) pMemArea;
1471 *ppRingHead = (RXD*) pMemArea;
1472 *ppRingTail = *ppRingHead;
1473 *ppRingPrev = pPrevDescr;
1474 *pRingFree = DescrNum;
1475} /* SetupRing */
1476
1477
1478/*****************************************************************************
1479 *
1480 * PortReInitBmu - re-initiate the descriptor rings for one port
1481 *
1482 * Description:
1483 * This function reinitializes the descriptor rings of one port
1484 * in memory. The port must be stopped before.
1485 * The HW is initialized with the descriptor start addresses.
1486 *
1487 * Returns:
1488 * none
1489 */
1490static void PortReInitBmu(
1491SK_AC *pAC, /* pointer to adapter context */
1492int PortIndex) /* index of the port for which to re-init */
1493{
1494 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1495 ("PortReInitBmu "));
1496
1497 /* set address of first descriptor of ring in BMU */
1498 SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
1499 TX_Q_CUR_DESCR_LOW,
1500 (uint32_t)(((caddr_t)
1501 (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
1502 pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
1503 pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) &
1504 0xFFFFFFFF));
1505 SK_OUT32(pAC->IoBase, TxQueueAddr[PortIndex][TX_PRIO_LOW]+
1506 TX_Q_DESCR_HIGH,
1507 (uint32_t)(((caddr_t)
1508 (pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxdRingHead) -
1509 pAC->TxPort[PortIndex][TX_PRIO_LOW].pTxDescrRing +
1510 pAC->TxPort[PortIndex][TX_PRIO_LOW].VTxDescrRing) >> 32));
1511 SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CUR_DESCR_LOW,
1512 (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
1513 pAC->RxPort[PortIndex].pRxDescrRing +
1514 pAC->RxPort[PortIndex].VRxDescrRing) & 0xFFFFFFFF));
1515 SK_OUT32(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_DESCR_HIGH,
1516 (uint32_t)(((caddr_t)(pAC->RxPort[PortIndex].pRxdRingHead) -
1517 pAC->RxPort[PortIndex].pRxDescrRing +
1518 pAC->RxPort[PortIndex].VRxDescrRing) >> 32));
1519} /* PortReInitBmu */
1520
1521
1522/****************************************************************************
1523 *
1524 * SkGeIsr - handle adapter interrupts
1525 *
1526 * Description:
1527 * The interrupt routine is called when the network adapter
1528 * generates an interrupt. It may also be called if another device
1529 * shares this interrupt vector with the driver.
1530 *
1531 * Returns: N/A
1532 *
1533 */
1534#if 0
1535static void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
1536#else
1537void SkGeIsr(int irq, void *dev_id, struct pt_regs *ptregs)
1538#endif
1539{
1540struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
1541DEV_NET *pNet;
1542SK_AC *pAC;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1543SK_U32 IntSrc; /* interrupts source register contents */
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1544
1545 pNet = (DEV_NET*) dev->priv;
1546 pAC = pNet->pAC;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1547
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1548 /*
1549 * Check and process if its our interrupt
1550 */
1551 SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
1552 if (IntSrc == 0) {
1553 return;
1554 }
1555
1556 while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
1557#if 0 /* software irq currently not used */
1558 if (IntSrc & IRQ_SW) {
1559 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1560 SK_DBGCAT_DRV_INT_SRC,
1561 ("Software IRQ\n"));
1562 }
1563#endif
1564 if (IntSrc & IRQ_EOF_RX1) {
1565 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1566 SK_DBGCAT_DRV_INT_SRC,
1567 ("EOF RX1 IRQ\n"));
1568 ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1569 SK_PNMI_CNT_RX_INTR(pAC, 0);
1570 }
1571 if (IntSrc & IRQ_EOF_RX2) {
1572 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1573 SK_DBGCAT_DRV_INT_SRC,
1574 ("EOF RX2 IRQ\n"));
1575 ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
1576 SK_PNMI_CNT_RX_INTR(pAC, 1);
1577 }
1578#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
1579 if (IntSrc & IRQ_EOF_AS_TX1) {
1580 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1581 SK_DBGCAT_DRV_INT_SRC,
1582 ("EOF AS TX1 IRQ\n"));
1583 SK_PNMI_CNT_TX_INTR(pAC, 0);
1584 spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1585 FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
1586 spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1587 }
1588 if (IntSrc & IRQ_EOF_AS_TX2) {
1589 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1590 SK_DBGCAT_DRV_INT_SRC,
1591 ("EOF AS TX2 IRQ\n"));
1592 SK_PNMI_CNT_TX_INTR(pAC, 1);
1593 spin_lock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
1594 FreeTxDescriptors(pAC, &pAC->TxPort[1][TX_PRIO_LOW]);
1595 spin_unlock(&pAC->TxPort[1][TX_PRIO_LOW].TxDesRingLock);
1596 }
1597#if 0 /* only if sync. queues used */
1598 if (IntSrc & IRQ_EOF_SY_TX1) {
1599 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1600 SK_DBGCAT_DRV_INT_SRC,
1601 ("EOF SY TX1 IRQ\n"));
1602 SK_PNMI_CNT_TX_INTR(pAC, 1);
1603 spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1604 FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
1605 spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1606 ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
1607 }
1608 if (IntSrc & IRQ_EOF_SY_TX2) {
1609 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1610 SK_DBGCAT_DRV_INT_SRC,
1611 ("EOF SY TX2 IRQ\n"));
1612 SK_PNMI_CNT_TX_INTR(pAC, 1);
1613 spin_lock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
1614 FreeTxDescriptors(pAC, 1, TX_PRIO_HIGH);
1615 spin_unlock(&pAC->TxPort[1][TX_PRIO_HIGH].TxDesRingLock);
1616 ClearTxIrq(pAC, 1, TX_PRIO_HIGH);
1617 }
1618#endif
1619#endif
1620
1621 /* do all IO at once */
1622 if (IntSrc & IRQ_EOF_RX1)
1623 ClearAndStartRx(pAC, 0);
1624 if (IntSrc & IRQ_EOF_RX2)
1625 ClearAndStartRx(pAC, 1);
1626#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
1627 if (IntSrc & IRQ_EOF_AS_TX1)
1628 ClearTxIrq(pAC, 0, TX_PRIO_LOW);
1629 if (IntSrc & IRQ_EOF_AS_TX2)
1630 ClearTxIrq(pAC, 1, TX_PRIO_LOW);
1631#endif
1632 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
1633 } /* while (IntSrc & IRQ_MASK != 0) */
1634
1635 if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
1636 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
1637 ("SPECIAL IRQ DP-Cards => %x\n", IntSrc));
1638 pAC->CheckQueue = SK_FALSE;
1639 spin_lock(&pAC->SlowPathLock);
1640 if (IntSrc & SPECIAL_IRQS)
1641 SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
1642
1643 SkEventDispatcher(pAC, pAC->IoBase);
1644 spin_unlock(&pAC->SlowPathLock);
1645 }
1646 /*
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1647 * do it all again is case we cleared an interrupt that
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1648 * came in after handling the ring (OUTs may be delayed
1649 * in hardware buffers, but are through after IN)
1650 */
1651
1652 ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1653 ReceiveIrq(pAC, &pAC->RxPort[1], SK_TRUE);
1654
1655 if (pAC->CheckQueue) {
1656 pAC->CheckQueue = SK_FALSE;
1657 spin_lock(&pAC->SlowPathLock);
1658 SkEventDispatcher(pAC, pAC->IoBase);
1659 spin_unlock(&pAC->SlowPathLock);
1660 }
1661
1662
1663 /* IRQ is processed - Enable IRQs again*/
1664 SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
1665
1666 return;
1667} /* SkGeIsr */
1668
1669
1670/****************************************************************************
1671 *
1672 * SkGeIsrOnePort - handle adapter interrupts for single port adapter
1673 *
1674 * Description:
1675 * The interrupt routine is called when the network adapter
1676 * generates an interrupt. It may also be called if another device
1677 * shares this interrupt vector with the driver.
1678 * This is the same as above, but handles only one port.
1679 *
1680 * Returns: N/A
1681 *
1682 */
1683#if 0
1684static void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
1685#else
1686void SkGeIsrOnePort(int irq, void *dev_id, struct pt_regs *ptregs)
1687#endif
1688{
1689struct SK_NET_DEVICE *dev = (struct SK_NET_DEVICE *)dev_id;
1690DEV_NET *pNet;
1691SK_AC *pAC;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1692SK_U32 IntSrc; /* interrupts source register contents */
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1693
1694 pNet = (DEV_NET*) dev->priv;
1695 pAC = pNet->pAC;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1696
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1697 /*
1698 * Check and process if its our interrupt
1699 */
1700 SK_IN32(pAC->IoBase, B0_SP_ISRC, &IntSrc);
1701 if (IntSrc == 0) {
1702 return;
1703 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1704
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1705 while (((IntSrc & IRQ_MASK) & ~SPECIAL_IRQS) != 0) {
1706#if 0 /* software irq currently not used */
1707 if (IntSrc & IRQ_SW) {
1708 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1709 SK_DBGCAT_DRV_INT_SRC,
1710 ("Software IRQ\n"));
1711 }
1712#endif
1713 if (IntSrc & IRQ_EOF_RX1) {
1714 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1715 SK_DBGCAT_DRV_INT_SRC,
1716 ("EOF RX1 IRQ\n"));
1717 ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1718 SK_PNMI_CNT_RX_INTR(pAC, 0);
1719 }
1720#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
1721 if (IntSrc & IRQ_EOF_AS_TX1) {
1722 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1723 SK_DBGCAT_DRV_INT_SRC,
1724 ("EOF AS TX1 IRQ\n"));
1725 SK_PNMI_CNT_TX_INTR(pAC, 0);
1726 spin_lock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1727 FreeTxDescriptors(pAC, &pAC->TxPort[0][TX_PRIO_LOW]);
1728 spin_unlock(&pAC->TxPort[0][TX_PRIO_LOW].TxDesRingLock);
1729 }
1730#if 0 /* only if sync. queues used */
1731 if (IntSrc & IRQ_EOF_SY_TX1) {
1732 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
1733 SK_DBGCAT_DRV_INT_SRC,
1734 ("EOF SY TX1 IRQ\n"));
1735 SK_PNMI_CNT_TX_INTR(pAC, 0);
1736 spin_lock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1737 FreeTxDescriptors(pAC, 0, TX_PRIO_HIGH);
1738 spin_unlock(&pAC->TxPort[0][TX_PRIO_HIGH].TxDesRingLock);
1739 ClearTxIrq(pAC, 0, TX_PRIO_HIGH);
1740 }
1741#endif
1742#endif
1743
1744 /* do all IO at once */
1745 if (IntSrc & IRQ_EOF_RX1)
1746 ClearAndStartRx(pAC, 0);
1747#ifdef USE_TX_COMPLETE /* only if tx complete interrupt used */
1748 if (IntSrc & IRQ_EOF_AS_TX1)
1749 ClearTxIrq(pAC, 0, TX_PRIO_LOW);
1750#endif
1751 SK_IN32(pAC->IoBase, B0_ISRC, &IntSrc);
1752 } /* while (IntSrc & IRQ_MASK != 0) */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1753
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1754 if ((IntSrc & SPECIAL_IRQS) || pAC->CheckQueue) {
1755 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_INT_SRC,
1756 ("SPECIAL IRQ SP-Cards => %x\n", IntSrc));
1757 pAC->CheckQueue = SK_FALSE;
1758 spin_lock(&pAC->SlowPathLock);
1759 if (IntSrc & SPECIAL_IRQS)
1760 SkGeSirqIsr(pAC, pAC->IoBase, IntSrc);
1761
1762 SkEventDispatcher(pAC, pAC->IoBase);
1763 spin_unlock(&pAC->SlowPathLock);
1764 }
1765 /*
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1766 * do it all again is case we cleared an interrupt that
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1767 * came in after handling the ring (OUTs may be delayed
1768 * in hardware buffers, but are through after IN)
1769 */
1770 ReceiveIrq(pAC, &pAC->RxPort[0], SK_TRUE);
1771
1772 /* IRQ is processed - Enable IRQs again*/
1773 SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
1774
1775 return;
1776} /* SkGeIsrOnePort */
1777
1778
1779/****************************************************************************
1780 *
1781 * SkGeOpen - handle start of initialized adapter
1782 *
1783 * Description:
1784 * This function starts the initialized adapter.
1785 * The board level variable is set and the adapter is
1786 * brought to full functionality.
1787 * The device flags are set for operation.
1788 * Do all necessary level 2 initialization, enable interrupts and
1789 * give start command to RLMT.
1790 *
1791 * Returns:
1792 * 0 on success
1793 * != 0 on error
1794 */
1795#if 0
1796static int SkGeOpen(
1797#else
1798int SkGeOpen(
1799#endif
1800struct SK_NET_DEVICE *dev)
1801{
1802 DEV_NET *pNet;
1803 SK_AC *pAC;
1804 unsigned long Flags; /* for spin lock */
1805 int i;
1806 SK_EVPARA EvPara; /* an event parameter union */
1807
1808 pNet = (DEV_NET*) dev->priv;
1809 pAC = pNet->pAC;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1810
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1811 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1812 ("SkGeOpen: pAC=0x%lX:\n", (unsigned long)pAC));
1813
1814 if (pAC->BoardLevel == 0) {
1815 /* level 1 init common modules here */
1816 if (SkGeInit(pAC, pAC->IoBase, 1) != 0) {
1817 printk("%s: HWInit (1) failed.\n", pAC->dev[pNet->PortNr]->name);
1818 return (-1);
1819 }
1820 SkI2cInit (pAC, pAC->IoBase, 1);
1821 SkEventInit (pAC, pAC->IoBase, 1);
1822 SkPnmiInit (pAC, pAC->IoBase, 1);
1823 SkAddrInit (pAC, pAC->IoBase, 1);
1824 SkRlmtInit (pAC, pAC->IoBase, 1);
1825 SkTimerInit (pAC, pAC->IoBase, 1);
1826 pAC->BoardLevel = 1;
1827 }
1828
1829 if (pAC->BoardLevel != 2) {
1830 /* tschilling: Level 2 init modules here, check return value. */
1831 if (SkGeInit(pAC, pAC->IoBase, 2) != 0) {
1832 printk("%s: HWInit (2) failed.\n", pAC->dev[pNet->PortNr]->name);
1833 return (-1);
1834 }
1835 SkI2cInit (pAC, pAC->IoBase, 2);
1836 SkEventInit (pAC, pAC->IoBase, 2);
1837 SkPnmiInit (pAC, pAC->IoBase, 2);
1838 SkAddrInit (pAC, pAC->IoBase, 2);
1839 SkRlmtInit (pAC, pAC->IoBase, 2);
1840 SkTimerInit (pAC, pAC->IoBase, 2);
1841 pAC->BoardLevel = 2;
1842 }
1843
1844 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1845 /* Enable transmit descriptor polling. */
1846 SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
1847 FillRxRing(pAC, &pAC->RxPort[i]);
1848 }
1849 SkGeYellowLED(pAC, pAC->IoBase, 1);
1850
1851#ifdef USE_INT_MOD
1852/* moderate only TX complete interrupts (these are not time critical) */
1853#define IRQ_MOD_MASK (IRQ_EOF_AS_TX1 | IRQ_EOF_AS_TX2)
1854 {
1855 unsigned long ModBase;
1856 ModBase = 53125000 / INTS_PER_SEC;
1857 SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
1858 SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
1859 SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
1860 }
1861#endif
1862
1863 /* enable Interrupts */
1864 SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
1865 SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
1866
1867 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1868
1869 if ((pAC->RlmtMode != 0) && (pAC->MaxPorts == 0)) {
1870 EvPara.Para32[0] = pAC->RlmtNets;
1871 EvPara.Para32[1] = -1;
1872 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
1873 EvPara);
1874 EvPara.Para32[0] = pAC->RlmtMode;
1875 EvPara.Para32[1] = 0;
1876 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_MODE_CHANGE,
1877 EvPara);
1878 }
1879
1880 EvPara.Para32[0] = pNet->NetNr;
1881 EvPara.Para32[1] = -1;
1882 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
1883 SkEventDispatcher(pAC, pAC->IoBase);
1884 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1885
1886 pAC->MaxPorts++;
1887 pNet->Up = 1;
1888
1889 MOD_INC_USE_COUNT;
1890
1891 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1892 ("SkGeOpen suceeded\n"));
1893
1894 return (0);
1895} /* SkGeOpen */
1896
1897
1898/****************************************************************************
1899 *
1900 * SkGeClose - Stop initialized adapter
1901 *
1902 * Description:
1903 * Close initialized adapter.
1904 *
1905 * Returns:
1906 * 0 - on success
1907 * error code - on error
1908 */
1909#if 0
1910static int SkGeClose(
1911#else
1912int SkGeClose(
1913#endif
1914struct SK_NET_DEVICE *dev)
1915{
1916 DEV_NET *pNet;
1917 SK_AC *pAC;
1918
1919 unsigned long Flags; /* for spin lock */
1920 int i;
1921 int PortIdx;
1922 SK_EVPARA EvPara;
1923
1924 netif_stop_queue(dev);
1925 pNet = (DEV_NET*) dev->priv;
1926 pAC = pNet->pAC;
1927
1928 if (pAC->RlmtNets == 1)
1929 PortIdx = pAC->ActivePort;
1930 else
1931 PortIdx = pNet->NetNr;
1932
1933 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1934 ("SkGeClose: pAC=0x%lX ", (unsigned long)pAC));
1935
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1936 /*
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1937 * Clear multicast table, promiscuous mode ....
1938 */
1939 SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
1940 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
1941 SK_PROM_MODE_NONE);
1942
1943 if (pAC->MaxPorts == 1) {
1944 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1945 /* disable interrupts */
1946 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
1947 EvPara.Para32[0] = pNet->NetNr;
1948 EvPara.Para32[1] = -1;
1949 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1950 SkEventDispatcher(pAC, pAC->IoBase);
1951 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
1952 /* stop the hardware */
1953 SkGeDeInit(pAC, pAC->IoBase);
1954 pAC->BoardLevel = 0;
1955 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
1956 } else {
1957
1958 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
1959 EvPara.Para32[0] = pNet->NetNr;
1960 EvPara.Para32[1] = -1;
1961 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
1962 SkEventDispatcher(pAC, pAC->IoBase);
1963 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1964
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1965 /* Stop port */
1966 spin_lock_irqsave(&pAC->TxPort[pNet->PortNr]
1967 [TX_PRIO_LOW].TxDesRingLock, Flags);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1968 SkGeStopPort(pAC, pAC->IoBase, pNet->PortNr,
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1969 SK_STOP_ALL, SK_HARD_RST);
1970 spin_unlock_irqrestore(&pAC->TxPort[pNet->PortNr]
1971 [TX_PRIO_LOW].TxDesRingLock, Flags);
1972 }
1973
1974 if (pAC->RlmtNets == 1) {
1975 /* clear all descriptor rings */
1976 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
1977 ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
1978 ClearRxRing(pAC, &pAC->RxPort[i]);
1979 ClearTxRing(pAC, &pAC->TxPort[i][TX_PRIO_LOW]);
1980 }
1981 } else {
1982 /* clear port descriptor rings */
1983 ReceiveIrq(pAC, &pAC->RxPort[pNet->PortNr], SK_TRUE);
1984 ClearRxRing(pAC, &pAC->RxPort[pNet->PortNr]);
1985 ClearTxRing(pAC, &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW]);
1986 }
1987
1988 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
1989 ("SkGeClose: done "));
1990
1991 pAC->MaxPorts--;
1992 pNet->Up = 0;
1993 MOD_DEC_USE_COUNT;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]1994
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]1995 return (0);
1996} /* SkGeClose */
1997
1998
1999/*****************************************************************************
2000 *
2001 * SkGeXmit - Linux frame transmit function
2002 *
2003 * Description:
2004 * The system calls this function to send frames onto the wire.
2005 * It puts the frame in the tx descriptor ring. If the ring is
2006 * full then, the 'tbusy' flag is set.
2007 *
2008 * Returns:
2009 * 0, if everything is ok
2010 * !=0, on error
2011 * WARNING: returning 1 in 'tbusy' case caused system crashes (double
2012 * allocated skb's) !!!
2013 */
2014#if 0
2015static int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
2016#else
2017int SkGeXmit(struct sk_buff *skb, struct SK_NET_DEVICE *dev)
2018#endif
2019{
2020DEV_NET *pNet;
2021SK_AC *pAC;
2022int Rc; /* return code of XmitFrame */
2023
2024 pNet = (DEV_NET*) dev->priv;
2025 pAC = pNet->pAC;
2026
2027#if 0
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2028 if ((!skb_shinfo(skb)->nr_frags) ||
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2029#else
2030 if (1 ||
2031#endif
2032 (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) {
2033 /* Don't activate scatter-gather and hardware checksum */
2034
2035 if (pAC->RlmtNets == 2)
2036 Rc = XmitFrame(
2037 pAC,
2038 &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
2039 skb);
2040 else
2041 Rc = XmitFrame(
2042 pAC,
2043 &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
2044 skb);
2045 } else {
2046#if 0
2047 /* scatter-gather and hardware TCP checksumming anabled*/
2048 if (pAC->RlmtNets == 2)
2049 Rc = XmitFrameSG(
2050 pAC,
2051 &pAC->TxPort[pNet->PortNr][TX_PRIO_LOW],
2052 skb);
2053 else
2054 Rc = XmitFrameSG(
2055 pAC,
2056 &pAC->TxPort[pAC->ActivePort][TX_PRIO_LOW],
2057 skb);
2058#endif
2059 }
2060
2061 /* Transmitter out of resources? */
2062 if (Rc <= 0) {
2063 netif_stop_queue(dev);
2064 }
2065
2066 /* If not taken, give buffer ownership back to the
2067 * queueing layer.
2068 */
2069 if (Rc < 0)
2070 return (1);
2071
2072#if 0
2073 dev->trans_start = jiffies;
2074#endif
2075 return (0);
2076} /* SkGeXmit */
2077
2078
2079/*****************************************************************************
2080 *
2081 * XmitFrame - fill one socket buffer into the transmit ring
2082 *
2083 * Description:
2084 * This function puts a message into the transmit descriptor ring
2085 * if there is a descriptors left.
2086 * Linux skb's consist of only one continuous buffer.
2087 * The first step locks the ring. It is held locked
2088 * all time to avoid problems with SWITCH_../PORT_RESET.
2089 * Then the descriptoris allocated.
2090 * The second part is linking the buffer to the descriptor.
2091 * At the very last, the Control field of the descriptor
2092 * is made valid for the BMU and a start TX command is given
2093 * if necessary.
2094 *
2095 * Returns:
2096 * > 0 - on succes: the number of bytes in the message
2097 * = 0 - on resource shortage: this frame sent or dropped, now
2098 * the ring is full ( -> set tbusy)
2099 * < 0 - on failure: other problems ( -> return failure to upper layers)
2100 */
2101static int XmitFrame(
2102SK_AC *pAC, /* pointer to adapter context */
2103TX_PORT *pTxPort, /* pointer to struct of port to send to */
2104struct sk_buff *pMessage) /* pointer to send-message */
2105{
2106TXD *pTxd; /* the rxd to fill */
2107unsigned long Flags;
2108SK_U64 PhysAddr;
2109int BytesSend;
2110
2111 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
2112 ("X"));
2113
2114 spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
2115#ifndef USE_TX_COMPLETE
2116 FreeTxDescriptors(pAC, pTxPort);
2117#endif
2118 if (pTxPort->TxdRingFree == 0) {
2119 /* no enough free descriptors in ring at the moment */
2120 FreeTxDescriptors(pAC, pTxPort);
2121 if (pTxPort->TxdRingFree == 0) {
2122 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2123 SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
2124 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2125 SK_DBGCAT_DRV_TX_PROGRESS,
2126 ("XmitFrame failed\n"));
2127 /* this message can not be sent now */
2128 /* Because tbusy seems to be set, the message should not be freed here */
2129 /* It will be used by the scheduler of the ethernet handler */
2130 return (-1);
2131 }
2132 }
2133 /* advance head counter behind descriptor needed for this frame */
2134 pTxd = pTxPort->pTxdRingHead;
2135 pTxPort->pTxdRingHead = pTxd->pNextTxd;
2136 pTxPort->TxdRingFree--;
2137 /* the needed descriptor is reserved now */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2138
2139 /*
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2140 * everything allocated ok, so add buffer to descriptor
2141 */
2142
2143#ifdef SK_DUMP_TX
2144 DumpMsg(pMessage, "XmitFrame");
2145#endif
2146
2147 /* set up descriptor and CONTROL dword */
2148#if 0
2149 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
2150 virt_to_page(pMessage->data),
2151 ((unsigned long) pMessage->data &
2152 ~PAGE_MASK),
2153 pMessage->len,
2154 PCI_DMA_TODEVICE);
2155#else
2156 PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32) pMessage->data);
2157#endif
2158 pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
2159 pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
2160 pTxd->pMBuf = pMessage;
2161 pTxd->TBControl = TX_CTRL_OWN_BMU | TX_CTRL_STF |
2162 TX_CTRL_CHECK_DEFAULT | TX_CTRL_SOFTWARE |
2163#ifdef USE_TX_COMPLETE
2164 TX_CTRL_EOF | TX_CTRL_EOF_IRQ | pMessage->len;
2165#else
2166 TX_CTRL_EOF | pMessage->len;
2167#endif
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2168
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2169 if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
2170 /* previous descriptor already done, so give tx start cmd */
2171 /* StartTx(pAC, pTxPort->HwAddr); */
2172 SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
2173 }
2174 pTxPort->pTxdRingPrev = pTxd;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2175
2176
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2177 BytesSend = pMessage->len;
2178 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2179 /* after releasing the lock, the skb may be immidiately freed */
2180 if (pTxPort->TxdRingFree != 0)
2181 return (BytesSend);
2182 else
2183 return (0);
2184
2185} /* XmitFrame */
2186
2187/*****************************************************************************
2188 *
2189 * XmitFrameSG - fill one socket buffer into the transmit ring
2190 * (use SG and TCP/UDP hardware checksumming)
2191 *
2192 * Description:
2193 * This function puts a message into the transmit descriptor ring
2194 * if there is a descriptors left.
2195 *
2196 * Returns:
2197 * > 0 - on succes: the number of bytes in the message
2198 * = 0 - on resource shortage: this frame sent or dropped, now
2199 * the ring is full ( -> set tbusy)
2200 * < 0 - on failure: other problems ( -> return failure to upper layers)
2201 */
2202#if 0
2203static int XmitFrameSG(
2204SK_AC *pAC, /* pointer to adapter context */
2205TX_PORT *pTxPort, /* pointer to struct of port to send to */
2206struct sk_buff *pMessage) /* pointer to send-message */
2207{
2208
2209 int i;
2210 int BytesSend;
2211 int hlength;
2212 int protocol;
2213 skb_frag_t *sk_frag;
2214 TXD *pTxd;
2215 TXD *pTxdFst;
2216 TXD *pTxdLst;
2217 SK_U64 PhysAddr;
2218 unsigned long Flags;
2219
2220 spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
2221#ifndef USE_TX_COMPLETE
2222 FreeTxDescriptors(pAC, pTxPort);
2223#endif
2224 if ((skb_shinfo(pMessage)->nr_frags +1) > pTxPort->TxdRingFree) {
2225 FreeTxDescriptors(pAC, pTxPort);
2226 if ((skb_shinfo(pMessage)->nr_frags + 1) > pTxPort->TxdRingFree) {
2227 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2228 SK_PNMI_CNT_NO_TX_BUF(pAC, pTxPort->PortIndex);
2229 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2230 SK_DBGCAT_DRV_TX_PROGRESS,
2231 ("XmitFrameSG failed - Ring full\n"));
2232 /* this message can not be sent now */
2233 return(-1);
2234 }
2235 }
2236
2237
2238 pTxd = pTxPort->pTxdRingHead;
2239 pTxdFst = pTxd;
2240 pTxdLst = pTxd;
2241 BytesSend = 0;
2242 protocol = 0;
2243
2244 /* map first fragment (header) */
2245 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
2246 virt_to_page(pMessage->data),
2247 ((unsigned long) pMessage->data & ~PAGE_MASK),
2248 skb_headlen(pMessage),
2249 PCI_DMA_TODEVICE);
2250
2251 pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
2252 pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
2253
2254 /* HW checksum? */
2255 if (pMessage->ip_summed == CHECKSUM_HW) {
2256 pTxd->TBControl = TX_CTRL_STF |
2257 TX_CTRL_ST_FWD |
2258 skb_headlen(pMessage);
2259
2260 /* We have to use the opcode for tcp here because the opcode for
2261 udp is not working in the hardware yet (revision 2.0)*/
2262 protocol = ((SK_U8)pMessage->data[23] & 0xf);
2263 if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
2264 pTxd->TBControl |= BMU_UDP_CHECK;
2265 else
2266 pTxd->TBControl |= BMU_TCP_CHECK ;
2267
2268 hlength = ((SK_U8)pMessage->data[14] & 0xf) * 4;
2269 pTxd->TcpSumOfs = 0; /* PH-Checksum already claculated */
2270 pTxd->TcpSumSt = 14+hlength+16;
2271 pTxd->TcpSumWr = 14+hlength;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2272
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2273 } else {
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2274 pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2275 TX_CTRL_SOFTWARE |
2276 TX_CTRL_STF |
2277 skb_headlen(pMessage);
2278 }
2279
2280 pTxd = pTxd->pNextTxd;
2281 pTxPort->TxdRingFree--;
2282 BytesSend += skb_headlen(pMessage);
2283
2284
2285 /* Map SG fragments */
2286 for (i = 0; i < skb_shinfo(pMessage)->nr_frags; i++) {
2287 sk_frag = &skb_shinfo(pMessage)->frags[i];
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2288
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2289 /* we already have the proper value in entry */
2290 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
2291 sk_frag->page,
2292 sk_frag->page_offset,
2293 sk_frag->size,
2294 PCI_DMA_TODEVICE);
2295
2296 pTxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
2297 pTxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
2298 pTxd->pMBuf = pMessage;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2299
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2300 /* HW checksum */
2301 if (pMessage->ip_summed == CHECKSUM_HW) {
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2302 pTxd->TBControl = TX_CTRL_OWN_BMU |
2303 TX_CTRL_SOFTWARE |
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2304 TX_CTRL_ST_FWD;
2305
2306 /* We have to use the opcode for tcp here because the opcode for
2307 udp is not working in the hardware yet (revision 2.0)*/
2308 if ((protocol == 17) && (pAC->GIni.GIChipRev != 0))
2309 pTxd->TBControl |= BMU_UDP_CHECK ;
2310 else
2311 pTxd->TBControl |= BMU_TCP_CHECK ;
2312
2313 } else {
2314 pTxd->TBControl = TX_CTRL_CHECK_DEFAULT |
2315 TX_CTRL_SOFTWARE |
2316 TX_CTRL_OWN_BMU;
2317 }
2318
2319 /* Last fragment */
2320 if( (i+1) == skb_shinfo(pMessage)->nr_frags ) {
2321#ifdef USE_TX_COMPLETE
2322 pTxd->TBControl |= TX_CTRL_EOF |
2323 TX_CTRL_EOF_IRQ |
2324 sk_frag->size;
2325#else
2326 pTxd->TBControl |= TX_CTRL_EOF |
2327 sk_frag->size;
2328#endif
2329 pTxdFst->TBControl |= TX_CTRL_OWN_BMU |
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2330 TX_CTRL_SOFTWARE;
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2331
2332 } else {
2333 pTxd->TBControl |= sk_frag->size;
2334 }
2335 pTxdLst = pTxd;
2336 pTxd = pTxd->pNextTxd;
2337 pTxPort->TxdRingFree--;
2338 BytesSend += sk_frag->size;
2339 }
2340
2341 if ((pTxPort->pTxdRingPrev->TBControl & TX_CTRL_OWN_BMU) == 0) {
2342 /* previous descriptor already done, so give tx start cmd */
2343 /* StartTx(pAC, pTxPort->HwAddr); */
2344 SK_OUT8(pTxPort->HwAddr, TX_Q_CTRL, TX_Q_CTRL_START);
2345 }
2346
2347 pTxPort->pTxdRingPrev = pTxdLst;
2348 pTxPort->pTxdRingHead = pTxd;
2349
2350 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
2351
2352 if (pTxPort->TxdRingFree > 0)
2353 return (BytesSend);
2354 else
2355 return (0);
2356}
2357#endif
2358
2359
2360void dump_frag( SK_U8 *data, int length)
2361{
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2362 int i;
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2363
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2364 printk("Length: %d\n", length);
2365 for( i=0; i < length; i++ ) {
2366 printk(" %02x", (SK_U8)*(data + i) );
2367 if( !((i+1) % 20) )
2368 printk("\n");
2369 }
2370 printk("\n\n");
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2371
2372}
2373
2374
2375/*****************************************************************************
2376 *
2377 * FreeTxDescriptors - release descriptors from the descriptor ring
2378 *
2379 * Description:
2380 * This function releases descriptors from a transmit ring if they
2381 * have been sent by the BMU.
2382 * If a descriptors is sent, it can be freed and the message can
2383 * be freed, too.
2384 * The SOFTWARE controllable bit is used to prevent running around a
2385 * completely free ring for ever. If this bit is no set in the
2386 * frame (by XmitFrame), this frame has never been sent or is
2387 * already freed.
2388 * The Tx descriptor ring lock must be held while calling this function !!!
2389 *
2390 * Returns:
2391 * none
2392 */
2393static void FreeTxDescriptors(
2394SK_AC *pAC, /* pointer to the adapter context */
2395TX_PORT *pTxPort) /* pointer to destination port structure */
2396{
2397TXD *pTxd; /* pointer to the checked descriptor */
2398TXD *pNewTail; /* pointer to 'end' of the ring */
2399SK_U32 Control; /* TBControl field of descriptor */
2400SK_U64 PhysAddr; /* address of DMA mapping */
2401
2402 pNewTail = pTxPort->pTxdRingTail;
2403 pTxd = pNewTail;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2404 /*
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2405 * loop forever; exits if TX_CTRL_SOFTWARE bit not set in start frame
2406 * or TX_CTRL_OWN_BMU bit set in any frame
2407 */
2408 while (1) {
2409 Control = pTxd->TBControl;
2410 if ((Control & TX_CTRL_SOFTWARE) == 0) {
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2411 /*
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2412 * software controllable bit is set in first
2413 * fragment when given to BMU. Not set means that
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2414 * this fragment was never sent or is already
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2415 * freed ( -> ring completely free now).
2416 */
2417 pTxPort->pTxdRingTail = pTxd;
2418 netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
2419 return;
2420 }
2421 if (Control & TX_CTRL_OWN_BMU) {
2422 pTxPort->pTxdRingTail = pTxd;
2423 if (pTxPort->TxdRingFree > 0) {
2424 netif_wake_queue(pAC->dev[pTxPort->PortIndex]);
2425 }
2426 return;
2427 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2428
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2429 /* release the DMA mapping */
2430 PhysAddr = ((SK_U64) pTxd->VDataHigh) << (SK_U64) 32;
2431 PhysAddr |= (SK_U64) pTxd->VDataLow;
2432 pci_unmap_page(pAC->PciDev, PhysAddr,
2433 pTxd->pMBuf->len,
2434 PCI_DMA_TODEVICE);
2435
2436 if (Control & TX_CTRL_EOF)
2437 DEV_KFREE_SKB_ANY(pTxd->pMBuf); /* free message */
2438
2439 pTxPort->TxdRingFree++;
2440 pTxd->TBControl &= ~TX_CTRL_SOFTWARE;
2441 pTxd = pTxd->pNextTxd; /* point behind fragment with EOF */
2442 } /* while(forever) */
2443} /* FreeTxDescriptors */
2444
2445/*****************************************************************************
2446 *
2447 * FillRxRing - fill the receive ring with valid descriptors
2448 *
2449 * Description:
2450 * This function fills the receive ring descriptors with data
2451 * segments and makes them valid for the BMU.
2452 * The active ring is filled completely, if possible.
2453 * The non-active ring is filled only partial to save memory.
2454 *
2455 * Description of rx ring structure:
2456 * head - points to the descriptor which will be used next by the BMU
2457 * tail - points to the next descriptor to give to the BMU
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2458 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2459 * Returns: N/A
2460 */
2461static void FillRxRing(
2462SK_AC *pAC, /* pointer to the adapter context */
2463RX_PORT *pRxPort) /* ptr to port struct for which the ring
2464 should be filled */
2465{
2466unsigned long Flags;
2467
2468 spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
2469 while (pRxPort->RxdRingFree > pRxPort->RxFillLimit) {
2470 if(!FillRxDescriptor(pAC, pRxPort))
2471 break;
2472 }
2473 spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
2474} /* FillRxRing */
2475
2476
2477/*****************************************************************************
2478 *
2479 * FillRxDescriptor - fill one buffer into the receive ring
2480 *
2481 * Description:
2482 * The function allocates a new receive buffer and
2483 * puts it into the next descriptor.
2484 *
2485 * Returns:
2486 * SK_TRUE - a buffer was added to the ring
2487 * SK_FALSE - a buffer could not be added
2488 */
2489static SK_BOOL FillRxDescriptor(
2490SK_AC *pAC, /* pointer to the adapter context struct */
2491RX_PORT *pRxPort) /* ptr to port struct of ring to fill */
2492{
2493struct sk_buff *pMsgBlock; /* pointer to a new message block */
2494RXD *pRxd; /* the rxd to fill */
2495SK_U16 Length; /* data fragment length */
2496SK_U64 PhysAddr; /* physical address of a rx buffer */
2497
2498 pMsgBlock = alloc_skb(pAC->RxBufSize, GFP_ATOMIC);
2499 if (pMsgBlock == NULL) {
2500 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2501 SK_DBGCAT_DRV_ENTRY,
2502 ("%s: Allocation of rx buffer failed !\n",
2503 pAC->dev[pRxPort->PortIndex]->name));
2504 SK_PNMI_CNT_NO_RX_BUF(pAC, pRxPort->PortIndex);
2505 return(SK_FALSE);
2506 }
2507 skb_reserve(pMsgBlock, 2); /* to align IP frames */
2508 /* skb allocated ok, so add buffer */
2509 pRxd = pRxPort->pRxdRingTail;
2510 pRxPort->pRxdRingTail = pRxd->pNextRxd;
2511 pRxPort->RxdRingFree--;
2512 Length = pAC->RxBufSize;
2513#if 0
2514 PhysAddr = (SK_U64) pci_map_page(pAC->PciDev,
2515 virt_to_page(pMsgBlock->data),
2516 ((unsigned long) pMsgBlock->data &
2517 ~PAGE_MASK),
2518 pAC->RxBufSize - 2,
2519 PCI_DMA_FROMDEVICE);
2520#else
2521 PhysAddr = (SK_U64) pci_phys_to_mem(pAC->PciDev, (u32)pMsgBlock->data);
2522#endif
2523 pRxd->VDataLow = (SK_U32) (PhysAddr & 0xffffffff);
2524 pRxd->VDataHigh = (SK_U32) (PhysAddr >> 32);
2525 pRxd->pMBuf = pMsgBlock;
2526 pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
2527 RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
2528 return (SK_TRUE);
2529
2530} /* FillRxDescriptor */
2531
2532
2533/*****************************************************************************
2534 *
2535 * ReQueueRxBuffer - fill one buffer back into the receive ring
2536 *
2537 * Description:
2538 * Fill a given buffer back into the rx ring. The buffer
2539 * has been previously allocated and aligned, and its phys.
2540 * address calculated, so this is no more necessary.
2541 *
2542 * Returns: N/A
2543 */
2544static void ReQueueRxBuffer(
2545SK_AC *pAC, /* pointer to the adapter context struct */
2546RX_PORT *pRxPort, /* ptr to port struct of ring to fill */
2547struct sk_buff *pMsg, /* pointer to the buffer */
2548SK_U32 PhysHigh, /* phys address high dword */
2549SK_U32 PhysLow) /* phys address low dword */
2550{
2551RXD *pRxd; /* the rxd to fill */
2552SK_U16 Length; /* data fragment length */
2553
2554 pRxd = pRxPort->pRxdRingTail;
2555 pRxPort->pRxdRingTail = pRxd->pNextRxd;
2556 pRxPort->RxdRingFree--;
2557 Length = pAC->RxBufSize;
2558 pRxd->VDataLow = PhysLow;
2559 pRxd->VDataHigh = PhysHigh;
2560 pRxd->pMBuf = pMsg;
2561 pRxd->RBControl = RX_CTRL_OWN_BMU | RX_CTRL_STF |
2562 RX_CTRL_EOF_IRQ | RX_CTRL_CHECK_CSUM | Length;
2563 return;
2564} /* ReQueueRxBuffer */
2565
2566
2567/*****************************************************************************
2568 *
2569 * ReceiveIrq - handle a receive IRQ
2570 *
2571 * Description:
2572 * This function is called when a receive IRQ is set.
2573 * It walks the receive descriptor ring and sends up all
2574 * frames that are complete.
2575 *
2576 * Returns: N/A
2577 */
2578#if 0
2579static void ReceiveIrq(
2580#else
2581void ReceiveIrq(
2582#endif
2583 SK_AC *pAC, /* pointer to adapter context */
2584 RX_PORT *pRxPort, /* pointer to receive port struct */
2585 SK_BOOL SlowPathLock) /* indicates if SlowPathLock is needed */
2586{
2587RXD *pRxd; /* pointer to receive descriptors */
2588SK_U32 Control; /* control field of descriptor */
2589struct sk_buff *pMsg; /* pointer to message holding frame */
2590struct sk_buff *pNewMsg; /* pointer to a new message for copying frame */
2591int FrameLength; /* total length of received frame */
2592SK_MBUF *pRlmtMbuf; /* ptr to a buffer for giving a frame to rlmt */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2593SK_EVPARA EvPara; /* an event parameter union */
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2594unsigned long Flags; /* for spin lock */
2595int PortIndex = pRxPort->PortIndex;
2596unsigned int Offset;
2597unsigned int NumBytes;
2598unsigned int ForRlmt;
2599SK_BOOL IsBc;
2600SK_BOOL IsMc;
2601SK_BOOL IsBadFrame; /* Bad frame */
2602
2603SK_U32 FrameStat;
2604unsigned short Csum1;
2605unsigned short Csum2;
2606unsigned short Type;
2607#if 0
2608int Result;
2609#endif
2610SK_U64 PhysAddr;
2611
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2612rx_start:
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2613 /* do forever; exit if RX_CTRL_OWN_BMU found */
2614 for ( pRxd = pRxPort->pRxdRingHead ;
2615 pRxPort->RxdRingFree < pAC->RxDescrPerRing ;
2616 pRxd = pRxd->pNextRxd,
2617 pRxPort->pRxdRingHead = pRxd,
2618 pRxPort->RxdRingFree ++) {
2619
2620 /*
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2621 * For a better understanding of this loop
2622 * Go through every descriptor beginning at the head
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2623 * Please note: the ring might be completely received so the OWN bit
2624 * set is not a good crirteria to leave that loop.
2625 * Therefore the RingFree counter is used.
2626 * On entry of this loop pRxd is a pointer to the Rxd that needs
2627 * to be checked next.
2628 */
2629
2630 Control = pRxd->RBControl;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2631
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2632 /* check if this descriptor is ready */
2633 if ((Control & RX_CTRL_OWN_BMU) != 0) {
2634 /* this descriptor is not yet ready */
2635 /* This is the usual end of the loop */
2636 /* We don't need to start the ring again */
2637 FillRxRing(pAC, pRxPort);
2638 return;
2639 }
2640
2641 /* get length of frame and check it */
2642 FrameLength = Control & RX_CTRL_LEN_MASK;
2643 if (FrameLength > pAC->RxBufSize) {
2644 goto rx_failed;
2645 }
2646
2647 /* check for STF and EOF */
2648 if ((Control & (RX_CTRL_STF | RX_CTRL_EOF)) !=
2649 (RX_CTRL_STF | RX_CTRL_EOF)) {
2650 goto rx_failed;
2651 }
2652
2653 /* here we have a complete frame in the ring */
2654 pMsg = pRxd->pMBuf;
2655
2656 FrameStat = pRxd->FrameStat;
2657
2658 /* check for frame length mismatch */
2659#define XMR_FS_LEN_SHIFT 18
2660#define GMR_FS_LEN_SHIFT 16
2661 if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
2662 if (FrameLength != (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)) {
2663 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2664 SK_DBGCAT_DRV_RX_PROGRESS,
2665 ("skge: Frame length mismatch (%u/%u).\n",
2666 FrameLength,
2667 (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
2668 goto rx_failed;
2669 }
2670 }
2671 else {
2672 if (FrameLength != (SK_U32) (FrameStat >> GMR_FS_LEN_SHIFT)) {
2673 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2674 SK_DBGCAT_DRV_RX_PROGRESS,
2675 ("skge: Frame length mismatch (%u/%u).\n",
2676 FrameLength,
2677 (SK_U32) (FrameStat >> XMR_FS_LEN_SHIFT)));
2678 goto rx_failed;
2679 }
2680 }
2681
2682 /* Set Rx Status */
2683 if (pAC->GIni.GIChipId == CHIP_ID_GENESIS) {
2684 IsBc = (FrameStat & XMR_FS_BC) != 0;
2685 IsMc = (FrameStat & XMR_FS_MC) != 0;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2686 IsBadFrame = (FrameStat &
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2687 (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0;
2688 } else {
2689 IsBc = (FrameStat & GMR_FS_BC) != 0;
2690 IsMc = (FrameStat & GMR_FS_MC) != 0;
2691 IsBadFrame = (((FrameStat & GMR_FS_ANY_ERR) != 0) ||
2692 ((FrameStat & GMR_FS_RX_OK) == 0));
2693 }
2694
2695 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
2696 ("Received frame of length %d on port %d\n",
2697 FrameLength, PortIndex));
2698 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 0,
2699 ("Number of free rx descriptors: %d\n",
2700 pRxPort->RxdRingFree));
2701/* DumpMsg(pMsg, "Rx"); */
2702
2703 if ((Control & RX_CTRL_STAT_VALID) != RX_CTRL_STAT_VALID ||
2704 (IsBadFrame)) {
2705#if 0
2706 (FrameStat & (XMR_FS_ANY_ERR | XMR_FS_2L_VLAN)) != 0) {
2707#endif
2708 /* there is a receive error in this frame */
2709 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2710 SK_DBGCAT_DRV_RX_PROGRESS,
2711 ("skge: Error in received frame, dropped!\n"
2712 "Control: %x\nRxStat: %x\n",
2713 Control, FrameStat));
2714
2715 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2716 PhysAddr |= (SK_U64) pRxd->VDataLow;
2717 pci_dma_sync_single(pAC->PciDev,
2718 (dma_addr_t) PhysAddr,
2719 FrameLength,
2720 PCI_DMA_FROMDEVICE);
2721 ReQueueRxBuffer(pAC, pRxPort, pMsg,
2722 pRxd->VDataHigh, pRxd->VDataLow);
2723
2724 continue;
2725 }
2726
2727 /*
2728 * if short frame then copy data to reduce memory waste
2729 */
2730 if ((FrameLength < SK_COPY_THRESHOLD) &&
2731 ((pNewMsg = alloc_skb(FrameLength+2, GFP_ATOMIC)) != NULL)) {
2732 /*
2733 * Short frame detected and allocation successfull
2734 */
2735 /* use new skb and copy data */
2736 skb_reserve(pNewMsg, 2);
2737 skb_put(pNewMsg, FrameLength);
2738 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2739 PhysAddr |= (SK_U64) pRxd->VDataLow;
2740
2741 pci_dma_sync_single(pAC->PciDev,
2742 (dma_addr_t) PhysAddr,
2743 FrameLength,
2744 PCI_DMA_FROMDEVICE);
2745 eth_copy_and_sum(pNewMsg, pMsg->data,
2746 FrameLength, 0);
2747 ReQueueRxBuffer(pAC, pRxPort, pMsg,
2748 pRxd->VDataHigh, pRxd->VDataLow);
2749 pMsg = pNewMsg;
2750
2751 }
2752 else {
2753 /*
2754 * if large frame, or SKB allocation failed, pass
2755 * the SKB directly to the networking
2756 */
2757
2758 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2759 PhysAddr |= (SK_U64) pRxd->VDataLow;
2760
2761 /* release the DMA mapping */
2762 pci_unmap_single(pAC->PciDev,
2763 PhysAddr,
2764 pAC->RxBufSize - 2,
2765 PCI_DMA_FROMDEVICE);
2766
2767 /* set length in message */
2768 skb_put(pMsg, FrameLength);
2769 /* hardware checksum */
2770 Type = ntohs(*((short*)&pMsg->data[12]));
2771 if (Type == 0x800) {
2772 Csum1=le16_to_cpu(pRxd->TcpSums & 0xffff);
2773 Csum2=le16_to_cpu((pRxd->TcpSums >> 16) & 0xffff);
2774#if 0
2775 if ((((Csum1 & 0xfffe) && (Csum2 & 0xfffe)) &&
2776 (pAC->GIni.GIChipId == CHIP_ID_GENESIS)) ||
2777 (pAC->GIni.GIChipId == CHIP_ID_YUKON)) {
2778 Result = SkCsGetReceiveInfo(pAC,
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2779 &pMsg->data[14],
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2780 Csum1, Csum2, pRxPort->PortIndex);
2781 if (Result ==
2782 SKCS_STATUS_IP_FRAGMENT ||
2783 Result ==
2784 SKCS_STATUS_IP_CSUM_OK ||
2785 Result ==
2786 SKCS_STATUS_TCP_CSUM_OK ||
2787 Result ==
2788 SKCS_STATUS_UDP_CSUM_OK) {
2789 pMsg->ip_summed =
2790 CHECKSUM_UNNECESSARY;
2791 } else {
2792 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
2793 SK_DBGCAT_DRV_RX_PROGRESS,
2794 ("skge: CRC error. Frame dropped!\n"));
2795 goto rx_failed;
2796 }
2797 }/* checksumControl calculation valid */
2798#endif
2799 } /* IP frame */
2800 } /* frame > SK_COPY_TRESHOLD */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2801
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2802 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("V"));
2803 ForRlmt = SK_RLMT_RX_PROTOCOL;
2804#if 0
2805 IsBc = (FrameStat & XMR_FS_BC)==XMR_FS_BC;
2806#endif
2807 SK_RLMT_PRE_LOOKAHEAD(pAC, PortIndex, FrameLength,
2808 IsBc, &Offset, &NumBytes);
2809 if (NumBytes != 0) {
2810#if 0
2811 IsMc = (FrameStat & XMR_FS_MC)==XMR_FS_MC;
2812#endif
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2813 SK_RLMT_LOOKAHEAD(pAC, PortIndex,
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2814 &pMsg->data[Offset],
2815 IsBc, IsMc, &ForRlmt);
2816 }
2817 if (ForRlmt == SK_RLMT_RX_PROTOCOL) {
2818 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("W"));
2819 /* send up only frames from active port */
2820 if ((PortIndex == pAC->ActivePort) ||
2821 (pAC->RlmtNets == 2)) {
2822 /* frame for upper layer */
2823 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, 1,("U"));
2824#ifdef xDEBUG
2825 DumpMsg(pMsg, "Rx");
2826#endif
2827 SK_PNMI_CNT_RX_OCTETS_DELIVERED(pAC,
2828 FrameLength, pRxPort->PortIndex);
2829
2830#if 0
2831 pMsg->dev = pAC->dev[pRxPort->PortIndex];
2832 pMsg->protocol = eth_type_trans(pMsg,
2833 pAC->dev[pRxPort->PortIndex]);
2834 netif_rx(pMsg);
2835 pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
2836#else
2837 NetReceive(pMsg->data, pMsg->len);
2838 dev_kfree_skb_any(pMsg);
2839#endif
2840 }
2841 else {
2842 /* drop frame */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2843 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2844 SK_DBGCAT_DRV_RX_PROGRESS,
2845 ("D"));
2846 DEV_KFREE_SKB(pMsg);
2847 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2848
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2849 } /* if not for rlmt */
2850 else {
2851 /* packet for rlmt */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2852 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2853 SK_DBGCAT_DRV_RX_PROGRESS, ("R"));
2854 pRlmtMbuf = SkDrvAllocRlmtMbuf(pAC,
2855 pAC->IoBase, FrameLength);
2856 if (pRlmtMbuf != NULL) {
2857 pRlmtMbuf->pNext = NULL;
2858 pRlmtMbuf->Length = FrameLength;
2859 pRlmtMbuf->PortIdx = PortIndex;
2860 EvPara.pParaPtr = pRlmtMbuf;
2861 memcpy((char*)(pRlmtMbuf->pData),
2862 (char*)(pMsg->data),
2863 FrameLength);
2864
2865 /* SlowPathLock needed? */
2866 if (SlowPathLock == SK_TRUE) {
2867 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
2868 SkEventQueue(pAC, SKGE_RLMT,
2869 SK_RLMT_PACKET_RECEIVED,
2870 EvPara);
2871 pAC->CheckQueue = SK_TRUE;
2872 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
2873 } else {
2874 SkEventQueue(pAC, SKGE_RLMT,
2875 SK_RLMT_PACKET_RECEIVED,
2876 EvPara);
2877 pAC->CheckQueue = SK_TRUE;
2878 }
2879
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2880 SK_DBG_MSG(NULL, SK_DBGMOD_DRV,
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2881 SK_DBGCAT_DRV_RX_PROGRESS,
2882 ("Q"));
2883 }
2884#if 0
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2885 if ((pAC->dev[pRxPort->PortIndex]->flags &
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2886 (IFF_PROMISC | IFF_ALLMULTI)) != 0 ||
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]2887 (ForRlmt & SK_RLMT_RX_PROTOCOL) ==
2888 SK_RLMT_RX_PROTOCOL) {
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]2889 pMsg->dev = pAC->dev[pRxPort->PortIndex];
2890 pMsg->protocol = eth_type_trans(pMsg,
2891 pAC->dev[pRxPort->PortIndex]);
2892 netif_rx(pMsg);
2893 pAC->dev[pRxPort->PortIndex]->last_rx = jiffies;
2894 }
2895#else
2896 if (0) {
2897 }
2898#endif
2899 else {
2900 DEV_KFREE_SKB(pMsg);
2901 }
2902
2903 } /* if packet for rlmt */
2904 } /* for ... scanning the RXD ring */
2905
2906 /* RXD ring is empty -> fill and restart */
2907 FillRxRing(pAC, pRxPort);
2908 /* do not start if called from Close */
2909 if (pAC->BoardLevel > 0) {
2910 ClearAndStartRx(pAC, PortIndex);
2911 }
2912 return;
2913
2914rx_failed:
2915 /* remove error frame */
2916 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
2917 ("Schrottdescriptor, length: 0x%x\n", FrameLength));
2918
2919 /* release the DMA mapping */
2920
2921 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
2922 PhysAddr |= (SK_U64) pRxd->VDataLow;
2923 pci_unmap_page(pAC->PciDev,
2924 PhysAddr,
2925 pAC->RxBufSize - 2,
2926 PCI_DMA_FROMDEVICE);
2927 DEV_KFREE_SKB_IRQ(pRxd->pMBuf);
2928 pRxd->pMBuf = NULL;
2929 pRxPort->RxdRingFree++;
2930 pRxPort->pRxdRingHead = pRxd->pNextRxd;
2931 goto rx_start;
2932
2933} /* ReceiveIrq */
2934
2935
2936/*****************************************************************************
2937 *
2938 * ClearAndStartRx - give a start receive command to BMU, clear IRQ
2939 *
2940 * Description:
2941 * This function sends a start command and a clear interrupt
2942 * command for one receive queue to the BMU.
2943 *
2944 * Returns: N/A
2945 * none
2946 */
2947static void ClearAndStartRx(
2948SK_AC *pAC, /* pointer to the adapter context */
2949int PortIndex) /* index of the receive port (XMAC) */
2950{
2951 SK_OUT8(pAC->IoBase, RxQueueAddr[PortIndex]+RX_Q_CTRL,
2952 RX_Q_CTRL_START | RX_Q_CTRL_CLR_I_EOF);
2953} /* ClearAndStartRx */
2954
2955
2956/*****************************************************************************
2957 *
2958 * ClearTxIrq - give a clear transmit IRQ command to BMU
2959 *
2960 * Description:
2961 * This function sends a clear tx IRQ command for one
2962 * transmit queue to the BMU.
2963 *
2964 * Returns: N/A
2965 */
2966static void ClearTxIrq(
2967SK_AC *pAC, /* pointer to the adapter context */
2968int PortIndex, /* index of the transmit port (XMAC) */
2969int Prio) /* priority or normal queue */
2970{
2971 SK_OUT8(pAC->IoBase, TxQueueAddr[PortIndex][Prio]+TX_Q_CTRL,
2972 TX_Q_CTRL_CLR_I_EOF);
2973} /* ClearTxIrq */
2974
2975
2976/*****************************************************************************
2977 *
2978 * ClearRxRing - remove all buffers from the receive ring
2979 *
2980 * Description:
2981 * This function removes all receive buffers from the ring.
2982 * The receive BMU must be stopped before calling this function.
2983 *
2984 * Returns: N/A
2985 */
2986static void ClearRxRing(
2987SK_AC *pAC, /* pointer to adapter context */
2988RX_PORT *pRxPort) /* pointer to rx port struct */
2989{
2990RXD *pRxd; /* pointer to the current descriptor */
2991unsigned long Flags;
2992SK_U64 PhysAddr;
2993
2994 if (pRxPort->RxdRingFree == pAC->RxDescrPerRing) {
2995 return;
2996 }
2997 spin_lock_irqsave(&pRxPort->RxDesRingLock, Flags);
2998 pRxd = pRxPort->pRxdRingHead;
2999 do {
3000 if (pRxd->pMBuf != NULL) {
3001
3002 PhysAddr = ((SK_U64) pRxd->VDataHigh) << (SK_U64)32;
3003 PhysAddr |= (SK_U64) pRxd->VDataLow;
3004 pci_unmap_page(pAC->PciDev,
3005 PhysAddr,
3006 pAC->RxBufSize - 2,
3007 PCI_DMA_FROMDEVICE);
3008 DEV_KFREE_SKB(pRxd->pMBuf);
3009 pRxd->pMBuf = NULL;
3010 }
3011 pRxd->RBControl &= RX_CTRL_OWN_BMU;
3012 pRxd = pRxd->pNextRxd;
3013 pRxPort->RxdRingFree++;
3014 } while (pRxd != pRxPort->pRxdRingTail);
3015 pRxPort->pRxdRingTail = pRxPort->pRxdRingHead;
3016 spin_unlock_irqrestore(&pRxPort->RxDesRingLock, Flags);
3017} /* ClearRxRing */
3018
3019
3020/*****************************************************************************
3021 *
3022 * ClearTxRing - remove all buffers from the transmit ring
3023 *
3024 * Description:
3025 * This function removes all transmit buffers from the ring.
3026 * The transmit BMU must be stopped before calling this function
3027 * and transmitting at the upper level must be disabled.
3028 * The BMU own bit of all descriptors is cleared, the rest is
3029 * done by calling FreeTxDescriptors.
3030 *
3031 * Returns: N/A
3032 */
3033static void ClearTxRing(
3034SK_AC *pAC, /* pointer to adapter context */
3035TX_PORT *pTxPort) /* pointer to tx prt struct */
3036{
3037TXD *pTxd; /* pointer to the current descriptor */
3038int i;
3039unsigned long Flags;
3040
3041 spin_lock_irqsave(&pTxPort->TxDesRingLock, Flags);
3042 pTxd = pTxPort->pTxdRingHead;
3043 for (i=0; i<pAC->TxDescrPerRing; i++) {
3044 pTxd->TBControl &= ~TX_CTRL_OWN_BMU;
3045 pTxd = pTxd->pNextTxd;
3046 }
3047 FreeTxDescriptors(pAC, pTxPort);
3048 spin_unlock_irqrestore(&pTxPort->TxDesRingLock, Flags);
3049} /* ClearTxRing */
3050
3051
3052#if 0
3053/*****************************************************************************
3054 *
3055 * SetQueueSizes - configure the sizes of rx and tx queues
3056 *
3057 * Description:
3058 * This function assigns the sizes for active and passive port
3059 * to the appropriate HWinit structure variables.
3060 * The passive port(s) get standard values, all remaining RAM
3061 * is given to the active port.
3062 * The queue sizes are in kbyte and must be multiple of 8.
3063 * The limits for the number of buffers filled into the rx rings
3064 * is also set in this routine.
3065 *
3066 * Returns:
3067 * none
3068 */
3069static void SetQueueSizes(
3070SK_AC *pAC) /* pointer to the adapter context */
3071{
3072int StandbyRam; /* adapter RAM used for a standby port */
3073int RemainingRam; /* adapter RAM available for the active port */
3074int RxRam; /* RAM used for the active port receive queue */
3075int i; /* loop counter */
3076
3077if (pAC->RlmtNets == 1) {
3078 StandbyRam = SK_RLMT_STANDBY_QRXSIZE + SK_RLMT_STANDBY_QXASIZE +
3079 SK_RLMT_STANDBY_QXSSIZE;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3080 RemainingRam = pAC->GIni.GIRamSize -
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3081 (pAC->GIni.GIMacsFound-1) * StandbyRam;
3082 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3083 pAC->GIni.GP[i].PRxQSize = SK_RLMT_STANDBY_QRXSIZE;
3084 pAC->GIni.GP[i].PXSQSize = SK_RLMT_STANDBY_QXSSIZE;
3085 pAC->GIni.GP[i].PXAQSize = SK_RLMT_STANDBY_QXASIZE;
3086 }
3087 RxRam = (RemainingRam * 8 / 10) & ~7;
3088 pAC->GIni.GP[pAC->ActivePort].PRxQSize = RxRam;
3089 pAC->GIni.GP[pAC->ActivePort].PXSQSize = 0;
3090 pAC->GIni.GP[pAC->ActivePort].PXAQSize =
3091 (RemainingRam - RxRam) & ~7;
3092 pAC->RxQueueSize = RxRam;
3093 pAC->TxSQueueSize = 0;
3094 pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
3095 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3096 ("queue sizes settings - rx:%d txA:%d txS:%d\n",
3097 pAC->RxQueueSize,pAC->TxAQueueSize, pAC->TxSQueueSize));
3098} else {
3099 RemainingRam = pAC->GIni.GIRamSize/pAC->GIni.GIMacsFound;
3100 RxRam = (RemainingRam * 8 / 10) & ~7;
3101 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3102 pAC->GIni.GP[i].PRxQSize = RxRam;
3103 pAC->GIni.GP[i].PXSQSize = 0;
3104 pAC->GIni.GP[i].PXAQSize = (RemainingRam - RxRam) & ~7;
3105 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3106
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3107 pAC->RxQueueSize = RxRam;
3108 pAC->TxSQueueSize = 0;
3109 pAC->TxAQueueSize = (RemainingRam - RxRam) & ~7;
3110}
3111 for (i=0; i<SK_MAX_MACS; i++) {
3112 pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing;
3113 }
3114
3115 if (pAC->RlmtNets == 2) {
3116 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3117 pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
3118 }
3119 } else {
3120 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3121 pAC->RxPort[i].RxFillLimit = pAC->RxDescrPerRing - 100;
3122 }
3123 /*
3124 * Do not set the Limit to 0, because this could cause
3125 * wrap around with ReQueue'ed buffers (a buffer could
3126 * be requeued in the same position, made accessable to
3127 * the hardware, and the hardware could change its
3128 * contents!
3129 */
3130 pAC->RxPort[pAC->ActivePort].RxFillLimit = 1;
3131 }
3132
3133#ifdef DEBUG
3134 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3135 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_TX_PROGRESS,
3136 ("i: %d, RxQSize: %d, PXSQsize: %d, PXAQSize: %d\n",
3137 i,
3138 pAC->GIni.GP[i].PRxQSize,
3139 pAC->GIni.GP[i].PXSQSize,
3140 pAC->GIni.GP[i].PXAQSize));
3141 }
3142#endif
3143} /* SetQueueSizes */
3144
3145
3146/*****************************************************************************
3147 *
3148 * SkGeSetMacAddr - Set the hardware MAC address
3149 *
3150 * Description:
3151 * This function sets the MAC address used by the adapter.
3152 *
3153 * Returns:
3154 * 0, if everything is ok
3155 * !=0, on error
3156 */
3157static int SkGeSetMacAddr(struct SK_NET_DEVICE *dev, void *p)
3158{
3159
3160DEV_NET *pNet = (DEV_NET*) dev->priv;
3161SK_AC *pAC = pNet->pAC;
3162
3163struct sockaddr *addr = p;
3164unsigned long Flags;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3165
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3166 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3167 ("SkGeSetMacAddr starts now...\n"));
3168 if(netif_running(dev))
3169 return -EBUSY;
3170
3171 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3172
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3173 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3174
3175 if (pAC->RlmtNets == 2)
3176 SkAddrOverride(pAC, pAC->IoBase, pNet->NetNr,
3177 (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
3178 else
3179 SkAddrOverride(pAC, pAC->IoBase, pAC->ActivePort,
3180 (SK_MAC_ADDR*)dev->dev_addr, SK_ADDR_VIRTUAL_ADDRESS);
3181
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3182
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3183 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3184 return 0;
3185} /* SkGeSetMacAddr */
3186#endif
3187
3188
3189/*****************************************************************************
3190 *
3191 * SkGeSetRxMode - set receive mode
3192 *
3193 * Description:
3194 * This function sets the receive mode of an adapter. The adapter
3195 * supports promiscuous mode, allmulticast mode and a number of
3196 * multicast addresses. If more multicast addresses the available
3197 * are selected, a hash function in the hardware is used.
3198 *
3199 * Returns:
3200 * 0, if everything is ok
3201 * !=0, on error
3202 */
3203#if 0
3204static void SkGeSetRxMode(struct SK_NET_DEVICE *dev)
3205{
3206
3207DEV_NET *pNet;
3208SK_AC *pAC;
3209
3210struct dev_mc_list *pMcList;
3211int i;
3212int PortIdx;
3213unsigned long Flags;
3214
3215 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3216 ("SkGeSetRxMode starts now... "));
3217
3218 pNet = (DEV_NET*) dev->priv;
3219 pAC = pNet->pAC;
3220 if (pAC->RlmtNets == 1)
3221 PortIdx = pAC->ActivePort;
3222 else
3223 PortIdx = pNet->NetNr;
3224
3225 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3226 if (dev->flags & IFF_PROMISC) {
3227 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3228 ("PROMISCUOUS mode\n"));
3229 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
3230 SK_PROM_MODE_LLC);
3231 } else if (dev->flags & IFF_ALLMULTI) {
3232 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3233 ("ALLMULTI mode\n"));
3234 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
3235 SK_PROM_MODE_ALL_MC);
3236 } else {
3237 SkAddrPromiscuousChange(pAC, pAC->IoBase, PortIdx,
3238 SK_PROM_MODE_NONE);
3239 SkAddrMcClear(pAC, pAC->IoBase, PortIdx, 0);
3240
3241 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3242 ("Number of MC entries: %d ", dev->mc_count));
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3243
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3244 pMcList = dev->mc_list;
3245 for (i=0; i<dev->mc_count; i++, pMcList = pMcList->next) {
3246 SkAddrMcAdd(pAC, pAC->IoBase, PortIdx,
3247 (SK_MAC_ADDR*)pMcList->dmi_addr, 0);
3248 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_MCA,
3249 ("%02x:%02x:%02x:%02x:%02x:%02x\n",
3250 pMcList->dmi_addr[0],
3251 pMcList->dmi_addr[1],
3252 pMcList->dmi_addr[2],
3253 pMcList->dmi_addr[3],
3254 pMcList->dmi_addr[4],
3255 pMcList->dmi_addr[5]));
3256 }
3257 SkAddrMcUpdate(pAC, pAC->IoBase, PortIdx);
3258 }
3259 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3260
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3261 return;
3262} /* SkGeSetRxMode */
3263
3264
3265/*****************************************************************************
3266 *
3267 * SkGeChangeMtu - set the MTU to another value
3268 *
3269 * Description:
3270 * This function sets is called whenever the MTU size is changed
3271 * (ifconfig mtu xxx dev ethX). If the MTU is bigger than standard
3272 * ethernet MTU size, long frame support is activated.
3273 *
3274 * Returns:
3275 * 0, if everything is ok
3276 * !=0, on error
3277 */
3278static int SkGeChangeMtu(struct SK_NET_DEVICE *dev, int NewMtu)
3279{
3280DEV_NET *pNet;
3281DEV_NET *pOtherNet;
3282SK_AC *pAC;
3283unsigned long Flags;
3284int i;
3285SK_EVPARA EvPara;
3286
3287 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3288 ("SkGeChangeMtu starts now...\n"));
3289
3290 pNet = (DEV_NET*) dev->priv;
3291 pAC = pNet->pAC;
3292
3293 if ((NewMtu < 68) || (NewMtu > SK_JUMBO_MTU)) {
3294 return -EINVAL;
3295 }
3296
3297 if(pAC->BoardLevel != 2) {
3298 return -EINVAL;
3299 }
3300
3301 pNet->Mtu = NewMtu;
3302 pOtherNet = (DEV_NET*)pAC->dev[1 - pNet->NetNr]->priv;
3303 if ((pOtherNet->Mtu > 1500) && (NewMtu <= 1500) && (pOtherNet->Up==1)) {
3304 return(0);
3305 }
3306
3307 EvPara.Para32[0] = pNet->NetNr;
3308 EvPara.Para32[1] = -1;
3309
3310 pAC->RxBufSize = NewMtu + 32;
3311 dev->mtu = NewMtu;
3312
3313 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3314 ("New MTU: %d\n", NewMtu));
3315
3316 /* prevent reconfiguration while changing the MTU */
3317
3318 /* disable interrupts */
3319 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
3320 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3321
3322 /* Found more than one port */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3323 if ((pAC->GIni.GIMacsFound == 2 ) &&
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3324 (pAC->RlmtNets == 2)) {
3325 /* Stop both ports */
3326 EvPara.Para32[0] = 0;
3327 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
3328 EvPara.Para32[0] = 1;
3329 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
3330 } else {
3331 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_STOP, EvPara);
3332 }
3333
3334 SkEventDispatcher(pAC, pAC->IoBase);
3335
3336 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3337 spin_lock_irqsave(
3338 &pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock, Flags);
3339 netif_stop_queue(pAC->dev[i]);
3340
3341 }
3342
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3343 /*
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3344 * adjust number of rx buffers allocated
3345 */
3346 if (NewMtu > 1500) {
3347 /* use less rx buffers */
3348 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3349 /* Found more than one port */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3350 if ((pAC->GIni.GIMacsFound == 2 ) &&
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3351 (pAC->RlmtNets == 2)) {
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3352 pAC->RxPort[i].RxFillLimit =
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3353 pAC->RxDescrPerRing - 100;
3354 } else {
3355 if (i == pAC->ActivePort)
3356 pAC->RxPort[i].RxFillLimit =
3357 pAC->RxDescrPerRing - 100;
3358 else
3359 pAC->RxPort[i].RxFillLimit =
3360 pAC->RxDescrPerRing - 10;
3361 }
3362 }
3363 }
3364 else {
3365 /* use normal amount of rx buffers */
3366 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3367 /* Found more than one port */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3368 if ((pAC->GIni.GIMacsFound == 2 ) &&
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3369 (pAC->RlmtNets == 2)) {
3370 pAC->RxPort[i].RxFillLimit = 1;
3371 } else {
3372 if (i == pAC->ActivePort)
3373 pAC->RxPort[i].RxFillLimit = 1;
3374 else
3375 pAC->RxPort[i].RxFillLimit =
3376 pAC->RxDescrPerRing - 100;
3377 }
3378 }
3379 }
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3380
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3381 SkGeDeInit(pAC, pAC->IoBase);
3382
3383 /*
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3384 * enable/disable hardware support for long frames
3385 */
3386 if (NewMtu > 1500) {
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3387/* pAC->JumboActivated = SK_TRUE; /#* is never set back !!! */
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3388 pAC->GIni.GIPortUsage = SK_JUMBO_LINK;
3389 }
3390 else {
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3391 if ((pAC->GIni.GIMacsFound == 2 ) &&
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3392 (pAC->RlmtNets == 2)) {
3393 pAC->GIni.GIPortUsage = SK_MUL_LINK;
3394 } else {
3395 pAC->GIni.GIPortUsage = SK_RED_LINK;
3396 }
3397 }
3398
3399 SkGeInit( pAC, pAC->IoBase, 1);
3400 SkI2cInit( pAC, pAC->IoBase, 1);
3401 SkEventInit(pAC, pAC->IoBase, 1);
3402 SkPnmiInit( pAC, pAC->IoBase, 1);
3403 SkAddrInit( pAC, pAC->IoBase, 1);
3404 SkRlmtInit( pAC, pAC->IoBase, 1);
3405 SkTimerInit(pAC, pAC->IoBase, 1);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3406
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3407 /*
3408 * tschilling:
3409 * Speed and others are set back to default in level 1 init!
3410 */
3411 GetConfiguration(pAC);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3412
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3413 SkGeInit( pAC, pAC->IoBase, 2);
3414 SkI2cInit( pAC, pAC->IoBase, 2);
3415 SkEventInit(pAC, pAC->IoBase, 2);
3416 SkPnmiInit( pAC, pAC->IoBase, 2);
3417 SkAddrInit( pAC, pAC->IoBase, 2);
3418 SkRlmtInit( pAC, pAC->IoBase, 2);
3419 SkTimerInit(pAC, pAC->IoBase, 2);
3420
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3421 /*
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3422 * clear and reinit the rx rings here
3423 */
3424 for (i=0; i<pAC->GIni.GIMacsFound; i++) {
3425 ReceiveIrq(pAC, &pAC->RxPort[i], SK_TRUE);
3426 ClearRxRing(pAC, &pAC->RxPort[i]);
3427 FillRxRing(pAC, &pAC->RxPort[i]);
3428
3429 /* Enable transmit descriptor polling. */
3430 SkGePollTxD(pAC, pAC->IoBase, i, SK_TRUE);
3431 FillRxRing(pAC, &pAC->RxPort[i]);
3432 };
3433
3434 SkGeYellowLED(pAC, pAC->IoBase, 1);
3435
3436#ifdef USE_INT_MOD
3437 {
3438 unsigned long ModBase;
3439 ModBase = 53125000 / INTS_PER_SEC;
3440 SK_OUT32(pAC->IoBase, B2_IRQM_INI, ModBase);
3441 SK_OUT32(pAC->IoBase, B2_IRQM_MSK, IRQ_MOD_MASK);
3442 SK_OUT32(pAC->IoBase, B2_IRQM_CTRL, TIM_START);
3443 }
3444#endif
3445
3446 netif_start_queue(pAC->dev[pNet->PortNr]);
3447 for (i=pAC->GIni.GIMacsFound-1; i>=0; i--) {
3448 spin_unlock(&pAC->TxPort[i][TX_PRIO_LOW].TxDesRingLock);
3449 }
3450
3451 /* enable Interrupts */
3452 SK_OUT32(pAC->IoBase, B0_IMSK, IRQ_MASK);
3453 SK_OUT32(pAC->IoBase, B0_HWE_IMSK, IRQ_HWE_MASK);
3454
3455 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
3456 SkEventDispatcher(pAC, pAC->IoBase);
3457
3458 /* Found more than one port */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3459 if ((pAC->GIni.GIMacsFound == 2 ) &&
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3460 (pAC->RlmtNets == 2)) {
3461 /* Start both ports */
3462 EvPara.Para32[0] = pAC->RlmtNets;
3463 EvPara.Para32[1] = -1;
3464 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_SET_NETS,
3465 EvPara);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3466
3467
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3468 EvPara.Para32[1] = -1;
3469 EvPara.Para32[0] = pNet->PortNr;
3470 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3471
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3472 if (pOtherNet->Up) {
3473 EvPara.Para32[0] = pOtherNet->PortNr;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3474 SkEventQueue(pAC, SKGE_RLMT,
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3475 SK_RLMT_START, EvPara);
3476 }
3477 } else {
3478 SkEventQueue(pAC, SKGE_RLMT, SK_RLMT_START, EvPara);
3479 }
3480
3481 SkEventDispatcher(pAC, pAC->IoBase);
3482 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3483
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3484 return 0;
3485} /* SkGeChangeMtu */
3486
3487
3488/*****************************************************************************
3489 *
3490 * SkGeStats - return ethernet device statistics
3491 *
3492 * Description:
3493 * This function return statistic data about the ethernet device
3494 * to the operating system.
3495 *
3496 * Returns:
3497 * pointer to the statistic structure.
3498 */
3499static struct net_device_stats *SkGeStats(struct SK_NET_DEVICE *dev)
3500{
3501DEV_NET *pNet = (DEV_NET*) dev->priv;
3502SK_AC *pAC = pNet->pAC;
3503SK_PNMI_STRUCT_DATA *pPnmiStruct; /* structure for all Pnmi-Data */
3504SK_PNMI_STAT *pPnmiStat; /* pointer to virtual XMAC stat. data */
3505SK_PNMI_CONF *pPnmiConf; /* pointer to virtual link config. */
3506unsigned int Size; /* size of pnmi struct */
3507unsigned long Flags; /* for spin lock */
3508
3509 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3510 ("SkGeStats starts now...\n"));
3511 pPnmiStruct = &pAC->PnmiStruct;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3512 memset(pPnmiStruct, 0, sizeof(SK_PNMI_STRUCT_DATA));
3513 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3514 Size = SK_PNMI_STRUCT_SIZE;
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3515 SkPnmiGetStruct(pAC, pAC->IoBase, pPnmiStruct, &Size, pNet->NetNr);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3516 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3517 pPnmiStat = &pPnmiStruct->Stat[0];
3518 pPnmiConf = &pPnmiStruct->Conf[0];
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3519
3520 pAC->stats.rx_packets = (SK_U32) pPnmiStruct->RxDeliveredCts & 0xFFFFFFFF;
3521 pAC->stats.tx_packets = (SK_U32) pPnmiStat->StatTxOkCts & 0xFFFFFFFF;
3522 pAC->stats.rx_bytes = (SK_U32) pPnmiStruct->RxOctetsDeliveredCts;
3523 pAC->stats.tx_bytes = (SK_U32) pPnmiStat->StatTxOctetsOkCts;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3524
3525 if (pNet->Mtu <= 1500) {
3526 pAC->stats.rx_errors = (SK_U32) pPnmiStruct->InErrorsCts & 0xFFFFFFFF;
3527 } else {
3528 pAC->stats.rx_errors = (SK_U32) ((pPnmiStruct->InErrorsCts -
3529 pPnmiStat->StatRxTooLongCts) & 0xFFFFFFFF);
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3530 }
3531
3532
3533 if (pAC->GIni.GP[0].PhyType == SK_PHY_XMAC && pAC->HWRevision < 12)
3534 pAC->stats.rx_errors = pAC->stats.rx_errors - pPnmiStat->StatRxShortsCts;
3535
3536 pAC->stats.tx_errors = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
3537 pAC->stats.rx_dropped = (SK_U32) pPnmiStruct->RxNoBufCts & 0xFFFFFFFF;
3538 pAC->stats.tx_dropped = (SK_U32) pPnmiStruct->TxNoBufCts & 0xFFFFFFFF;
3539 pAC->stats.multicast = (SK_U32) pPnmiStat->StatRxMulticastOkCts & 0xFFFFFFFF;
3540 pAC->stats.collisions = (SK_U32) pPnmiStat->StatTxSingleCollisionCts & 0xFFFFFFFF;
3541
3542 /* detailed rx_errors: */
3543 pAC->stats.rx_length_errors = (SK_U32) pPnmiStat->StatRxRuntCts & 0xFFFFFFFF;
3544 pAC->stats.rx_over_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
3545 pAC->stats.rx_crc_errors = (SK_U32) pPnmiStat->StatRxFcsCts & 0xFFFFFFFF;
3546 pAC->stats.rx_frame_errors = (SK_U32) pPnmiStat->StatRxFramingCts & 0xFFFFFFFF;
3547 pAC->stats.rx_fifo_errors = (SK_U32) pPnmiStat->StatRxFifoOverflowCts & 0xFFFFFFFF;
3548 pAC->stats.rx_missed_errors = (SK_U32) pPnmiStat->StatRxMissedCts & 0xFFFFFFFF;
3549
3550 /* detailed tx_errors */
3551 pAC->stats.tx_aborted_errors = (SK_U32) 0;
3552 pAC->stats.tx_carrier_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
3553 pAC->stats.tx_fifo_errors = (SK_U32) pPnmiStat->StatTxFifoUnderrunCts & 0xFFFFFFFF;
3554 pAC->stats.tx_heartbeat_errors = (SK_U32) pPnmiStat->StatTxCarrierCts & 0xFFFFFFFF;
3555 pAC->stats.tx_window_errors = (SK_U32) 0;
3556
3557 return(&pAC->stats);
3558} /* SkGeStats */
3559
3560
3561/*****************************************************************************
3562 *
3563 * SkGeIoctl - IO-control function
3564 *
3565 * Description:
3566 * This function is called if an ioctl is issued on the device.
3567 * There are three subfunction for reading, writing and test-writing
3568 * the private MIB data structure (usefull for SysKonnect-internal tools).
3569 *
3570 * Returns:
3571 * 0, if everything is ok
3572 * !=0, on error
3573 */
3574static int SkGeIoctl(struct SK_NET_DEVICE *dev, struct ifreq *rq, int cmd)
3575{
3576DEV_NET *pNet;
3577SK_AC *pAC;
3578
3579SK_GE_IOCTL Ioctl;
3580unsigned int Err = 0;
3581int Size;
3582
3583 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3584 ("SkGeIoctl starts now...\n"));
3585
3586 pNet = (DEV_NET*) dev->priv;
3587 pAC = pNet->pAC;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3588
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3589 if(copy_from_user(&Ioctl, rq->ifr_data, sizeof(SK_GE_IOCTL))) {
3590 return -EFAULT;
3591 }
3592
3593 switch(cmd) {
3594 case SK_IOCTL_SETMIB:
3595 case SK_IOCTL_PRESETMIB:
3596 if (!capable(CAP_NET_ADMIN)) return -EPERM;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3597 case SK_IOCTL_GETMIB:
3598 if(copy_from_user(&pAC->PnmiStruct, Ioctl.pData,
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3599 Ioctl.Len<sizeof(pAC->PnmiStruct)?
3600 Ioctl.Len : sizeof(pAC->PnmiStruct))) {
3601 return -EFAULT;
3602 }
3603 Size = SkGeIocMib(pNet, Ioctl.Len, cmd);
3604 if(copy_to_user(Ioctl.pData, &pAC->PnmiStruct,
3605 Ioctl.Len<Size? Ioctl.Len : Size)) {
3606 return -EFAULT;
3607 }
3608 Ioctl.Len = Size;
3609 if(copy_to_user(rq->ifr_data, &Ioctl, sizeof(SK_GE_IOCTL))) {
3610 return -EFAULT;
3611 }
3612 break;
3613 default:
3614 Err = -EOPNOTSUPP;
3615 }
3616 return(Err);
3617} /* SkGeIoctl */
3618
3619
3620/*****************************************************************************
3621 *
3622 * SkGeIocMib - handle a GetMib, SetMib- or PresetMib-ioctl message
3623 *
3624 * Description:
3625 * This function reads/writes the MIB data using PNMI (Private Network
3626 * Management Interface).
3627 * The destination for the data must be provided with the
3628 * ioctl call and is given to the driver in the form of
3629 * a user space address.
3630 * Copying from the user-provided data area into kernel messages
3631 * and back is done by copy_from_user and copy_to_user calls in
3632 * SkGeIoctl.
3633 *
3634 * Returns:
3635 * returned size from PNMI call
3636 */
3637static int SkGeIocMib(
3638DEV_NET *pNet, /* pointer to the adapter context */
3639unsigned int Size, /* length of ioctl data */
3640int mode) /* flag for set/preset */
3641{
3642unsigned long Flags; /* for spin lock */
3643SK_AC *pAC;
3644
3645 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3646 ("SkGeIocMib starts now...\n"));
3647 pAC = pNet->pAC;
3648 /* access MIB */
3649 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
3650 switch(mode) {
3651 case SK_IOCTL_GETMIB:
3652 SkPnmiGetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3653 pNet->NetNr);
3654 break;
3655 case SK_IOCTL_PRESETMIB:
3656 SkPnmiPreSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3657 pNet->NetNr);
3658 break;
3659 case SK_IOCTL_SETMIB:
3660 SkPnmiSetStruct(pAC, pAC->IoBase, &pAC->PnmiStruct, &Size,
3661 pNet->NetNr);
3662 break;
3663 default:
3664 break;
3665 }
3666 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
3667 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ENTRY,
3668 ("MIB data access succeeded\n"));
3669 return (Size);
3670} /* SkGeIocMib */
3671#endif
3672
3673
3674/*****************************************************************************
3675 *
3676 * GetConfiguration - read configuration information
3677 *
3678 * Description:
3679 * This function reads per-adapter configuration information from
3680 * the options provided on the command line.
3681 *
3682 * Returns:
3683 * none
3684 */
3685static void GetConfiguration(
3686SK_AC *pAC) /* pointer to the adapter context structure */
3687{
3688SK_I32 Port; /* preferred port */
3689int LinkSpeed; /* Link speed */
3690int AutoNeg; /* auto negotiation off (0) or on (1) */
3691int DuplexCap; /* duplex capabilities (0=both, 1=full, 2=half */
3692int MSMode; /* master / slave mode selection */
3693SK_BOOL AutoSet;
3694SK_BOOL DupSet;
3695/*
3696 * The two parameters AutoNeg. and DuplexCap. map to one configuration
3697 * parameter. The mapping is described by this table:
3698 * DuplexCap -> | both | full | half |
3699 * AutoNeg | | | |
3700 * -----------------------------------------------------------------
3701 * Off | illegal | Full | Half |
3702 * -----------------------------------------------------------------
3703 * On | AutoBoth | AutoFull | AutoHalf |
3704 * -----------------------------------------------------------------
3705 * Sense | AutoSense | AutoSense | AutoSense |
3706 */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3707int Capabilities[3][3] =
3708 { { -1, SK_LMODE_FULL, SK_LMODE_HALF},
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3709 {SK_LMODE_AUTOBOTH, SK_LMODE_AUTOFULL, SK_LMODE_AUTOHALF},
3710 {SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE, SK_LMODE_AUTOSENSE} };
3711#define DC_BOTH 0
3712#define DC_FULL 1
3713#define DC_HALF 2
3714#define AN_OFF 0
3715#define AN_ON 1
3716#define AN_SENS 2
3717
3718 /* settings for port A */
3719 /* settings link speed */
3720 LinkSpeed = SK_LSPEED_AUTO; /* default: do auto select */
3721 if (Speed_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3722 Speed_A[pAC->Index] != NULL) {
3723 if (strcmp(Speed_A[pAC->Index],"")==0) {
3724 LinkSpeed = SK_LSPEED_AUTO;
3725 }
3726 else if (strcmp(Speed_A[pAC->Index],"Auto")==0) {
3727 LinkSpeed = SK_LSPEED_AUTO;
3728 }
3729 else if (strcmp(Speed_A[pAC->Index],"10")==0) {
3730 LinkSpeed = SK_LSPEED_10MBPS;
3731 }
3732 else if (strcmp(Speed_A[pAC->Index],"100")==0) {
3733 LinkSpeed = SK_LSPEED_100MBPS;
3734 }
3735 else if (strcmp(Speed_A[pAC->Index],"1000")==0) {
3736 LinkSpeed = SK_LSPEED_1000MBPS;
3737 }
3738 else printk("%s: Illegal value for Speed_A\n",
3739 pAC->dev[0]->name);
3740 }
3741
3742 /* Check speed parameter */
3743 /* Only copper type adapter and GE V2 cards */
3744 if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
3745 (pAC->GIni.GICopperType != SK_TRUE)) &&
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3746 ((LinkSpeed != SK_LSPEED_AUTO) &&
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3747 (LinkSpeed != SK_LSPEED_1000MBPS))) {
3748 printk("%s: Illegal value for Speed_A. "
3749 "Not a copper card or GE V2 card\n Using "
3750 "speed 1000\n", pAC->dev[0]->name);
3751 LinkSpeed = SK_LSPEED_1000MBPS;
3752 }
3753 pAC->GIni.GP[0].PLinkSpeed = LinkSpeed;
3754
3755 /* Autonegotiation */
3756 AutoNeg = AN_ON; /* tschilling: Default: Autonegotiation on! */
3757 AutoSet = SK_FALSE;
3758 if (AutoNeg_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3759 AutoNeg_A[pAC->Index] != NULL) {
3760 AutoSet = SK_TRUE;
3761 if (strcmp(AutoNeg_A[pAC->Index],"")==0) {
3762 AutoSet = SK_FALSE;
3763 }
3764 else if (strcmp(AutoNeg_A[pAC->Index],"On")==0) {
3765 AutoNeg = AN_ON;
3766 }
3767 else if (strcmp(AutoNeg_A[pAC->Index],"Off")==0) {
3768 AutoNeg = AN_OFF;
3769 }
3770 else if (strcmp(AutoNeg_A[pAC->Index],"Sense")==0) {
3771 AutoNeg = AN_SENS;
3772 }
3773 else printk("%s: Illegal value for AutoNeg_A\n",
3774 pAC->dev[0]->name);
3775 }
3776
3777 DuplexCap = DC_BOTH;
3778 DupSet = SK_FALSE;
3779 if (DupCap_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3780 DupCap_A[pAC->Index] != NULL) {
3781 DupSet = SK_TRUE;
3782 if (strcmp(DupCap_A[pAC->Index],"")==0) {
3783 DupSet = SK_FALSE;
3784 }
3785 else if (strcmp(DupCap_A[pAC->Index],"Both")==0) {
3786 DuplexCap = DC_BOTH;
3787 }
3788 else if (strcmp(DupCap_A[pAC->Index],"Full")==0) {
3789 DuplexCap = DC_FULL;
3790 }
3791 else if (strcmp(DupCap_A[pAC->Index],"Half")==0) {
3792 DuplexCap = DC_HALF;
3793 }
3794 else printk("%s: Illegal value for DupCap_A\n",
3795 pAC->dev[0]->name);
3796 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3797
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3798 /* check for illegal combinations */
3799 if (AutoSet && AutoNeg==AN_SENS && DupSet) {
3800 printk("%s, Port A: DuplexCapabilities"
3801 " ignored using Sense mode\n", pAC->dev[0]->name);
3802 }
3803 if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
3804 printk("%s, Port A: Illegal combination"
3805 " of values AutoNeg. and DuplexCap.\n Using "
3806 "Full Duplex\n", pAC->dev[0]->name);
3807
3808 DuplexCap = DC_FULL;
3809 }
3810 if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
3811 DuplexCap = DC_FULL;
3812 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3813
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3814 if (!AutoSet && DupSet) {
3815 printk("%s, Port A: Duplex setting not"
3816 " possible in\n default AutoNegotiation mode"
3817 " (Sense).\n Using AutoNegotiation On\n",
3818 pAC->dev[0]->name);
3819 AutoNeg = AN_ON;
3820 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3821
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3822 /* set the desired mode */
3823 pAC->GIni.GP[0].PLinkModeConf =
3824 Capabilities[AutoNeg][DuplexCap];
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3825
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3826 pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
3827 if (FlowCtrl_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3828 FlowCtrl_A[pAC->Index] != NULL) {
3829 if (strcmp(FlowCtrl_A[pAC->Index],"") == 0) {
3830 }
3831 else if (strcmp(FlowCtrl_A[pAC->Index],"SymOrRem") == 0) {
3832 pAC->GIni.GP[0].PFlowCtrlMode =
3833 SK_FLOW_MODE_SYM_OR_REM;
3834 }
3835 else if (strcmp(FlowCtrl_A[pAC->Index],"Sym")==0) {
3836 pAC->GIni.GP[0].PFlowCtrlMode =
3837 SK_FLOW_MODE_SYMMETRIC;
3838 }
3839 else if (strcmp(FlowCtrl_A[pAC->Index],"LocSend")==0) {
3840 pAC->GIni.GP[0].PFlowCtrlMode =
3841 SK_FLOW_MODE_LOC_SEND;
3842 }
3843 else if (strcmp(FlowCtrl_A[pAC->Index],"None")==0) {
3844 pAC->GIni.GP[0].PFlowCtrlMode =
3845 SK_FLOW_MODE_NONE;
3846 }
3847 else printk("Illegal value for FlowCtrl_A\n");
3848 }
3849 if (AutoNeg==AN_OFF && pAC->GIni.GP[0].PFlowCtrlMode!=
3850 SK_FLOW_MODE_NONE) {
3851 printk("%s, Port A: FlowControl"
3852 " impossible without AutoNegotiation,"
3853 " disabled\n", pAC->dev[0]->name);
3854 pAC->GIni.GP[0].PFlowCtrlMode = SK_FLOW_MODE_NONE;
3855 }
3856
3857 MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
3858 if (Role_A != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3859 Role_A[pAC->Index] != NULL) {
3860 if (strcmp(Role_A[pAC->Index],"")==0) {
3861 }
3862 else if (strcmp(Role_A[pAC->Index],"Auto")==0) {
3863 MSMode = SK_MS_MODE_AUTO;
3864 }
3865 else if (strcmp(Role_A[pAC->Index],"Master")==0) {
3866 MSMode = SK_MS_MODE_MASTER;
3867 }
3868 else if (strcmp(Role_A[pAC->Index],"Slave")==0) {
3869 MSMode = SK_MS_MODE_SLAVE;
3870 }
3871 else printk("%s: Illegal value for Role_A\n",
3872 pAC->dev[0]->name);
3873 }
3874 pAC->GIni.GP[0].PMSMode = MSMode;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3875
3876
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3877 /* settings for port B */
3878 /* settings link speed */
3879 LinkSpeed = SK_LSPEED_AUTO; /* default: do auto select */
3880 if (Speed_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3881 Speed_B[pAC->Index] != NULL) {
3882 if (strcmp(Speed_B[pAC->Index],"")==0) {
3883 LinkSpeed = SK_LSPEED_AUTO;
3884 }
3885 else if (strcmp(Speed_B[pAC->Index],"Auto")==0) {
3886 LinkSpeed = SK_LSPEED_AUTO;
3887 }
3888 else if (strcmp(Speed_B[pAC->Index],"10")==0) {
3889 LinkSpeed = SK_LSPEED_10MBPS;
3890 }
3891 else if (strcmp(Speed_B[pAC->Index],"100")==0) {
3892 LinkSpeed = SK_LSPEED_100MBPS;
3893 }
3894 else if (strcmp(Speed_B[pAC->Index],"1000")==0) {
3895 LinkSpeed = SK_LSPEED_1000MBPS;
3896 }
3897 else printk("%s: Illegal value for Speed_B\n",
3898 pAC->dev[1]->name);
3899 }
3900
3901 /* Check speed parameter */
3902 /* Only copper type adapter and GE V2 cards */
3903 if (((pAC->GIni.GIChipId != CHIP_ID_YUKON) ||
3904 (pAC->GIni.GICopperType != SK_TRUE)) &&
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3905 ((LinkSpeed != SK_LSPEED_AUTO) &&
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3906 (LinkSpeed != SK_LSPEED_1000MBPS))) {
3907 printk("%s: Illegal value for Speed_B. "
3908 "Not a copper card or GE V2 card\n Using "
3909 "speed 1000\n", pAC->dev[1]->name);
3910 LinkSpeed = SK_LSPEED_1000MBPS;
3911 }
3912 pAC->GIni.GP[1].PLinkSpeed = LinkSpeed;
3913
3914 /* Auto negotiation */
3915 AutoNeg = AN_SENS; /* default: do auto Sense */
3916 AutoSet = SK_FALSE;
3917 if (AutoNeg_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3918 AutoNeg_B[pAC->Index] != NULL) {
3919 AutoSet = SK_TRUE;
3920 if (strcmp(AutoNeg_B[pAC->Index],"")==0) {
3921 AutoSet = SK_FALSE;
3922 }
3923 else if (strcmp(AutoNeg_B[pAC->Index],"On")==0) {
3924 AutoNeg = AN_ON;
3925 }
3926 else if (strcmp(AutoNeg_B[pAC->Index],"Off")==0) {
3927 AutoNeg = AN_OFF;
3928 }
3929 else if (strcmp(AutoNeg_B[pAC->Index],"Sense")==0) {
3930 AutoNeg = AN_SENS;
3931 }
3932 else printk("Illegal value for AutoNeg_B\n");
3933 }
3934
3935 DuplexCap = DC_BOTH;
3936 DupSet = SK_FALSE;
3937 if (DupCap_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3938 DupCap_B[pAC->Index] != NULL) {
3939 DupSet = SK_TRUE;
3940 if (strcmp(DupCap_B[pAC->Index],"")==0) {
3941 DupSet = SK_FALSE;
3942 }
3943 else if (strcmp(DupCap_B[pAC->Index],"Both")==0) {
3944 DuplexCap = DC_BOTH;
3945 }
3946 else if (strcmp(DupCap_B[pAC->Index],"Full")==0) {
3947 DuplexCap = DC_FULL;
3948 }
3949 else if (strcmp(DupCap_B[pAC->Index],"Half")==0) {
3950 DuplexCap = DC_HALF;
3951 }
3952 else printk("Illegal value for DupCap_B\n");
3953 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3954
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3955 /* check for illegal combinations */
3956 if (AutoSet && AutoNeg==AN_SENS && DupSet) {
3957 printk("%s, Port B: DuplexCapabilities"
3958 " ignored using Sense mode\n", pAC->dev[1]->name);
3959 }
3960 if (AutoSet && AutoNeg==AN_OFF && DupSet && DuplexCap==DC_BOTH){
3961 printk("%s, Port B: Illegal combination"
3962 " of values AutoNeg. and DuplexCap.\n Using "
3963 "Full Duplex\n", pAC->dev[1]->name);
3964
3965 DuplexCap = DC_FULL;
3966 }
3967 if (AutoSet && AutoNeg==AN_OFF && !DupSet) {
3968 DuplexCap = DC_FULL;
3969 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]3970
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]3971 if (!AutoSet && DupSet) {
3972 printk("%s, Port B: Duplex setting not"
3973 " possible in\n default AutoNegotiation mode"
3974 " (Sense).\n Using AutoNegotiation On\n",
3975 pAC->dev[1]->name);
3976 AutoNeg = AN_ON;
3977 }
3978
3979 /* set the desired mode */
3980 pAC->GIni.GP[1].PLinkModeConf =
3981 Capabilities[AutoNeg][DuplexCap];
3982
3983 pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_SYM_OR_REM;
3984 if (FlowCtrl_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
3985 FlowCtrl_B[pAC->Index] != NULL) {
3986 if (strcmp(FlowCtrl_B[pAC->Index],"") == 0) {
3987 }
3988 else if (strcmp(FlowCtrl_B[pAC->Index],"SymOrRem") == 0) {
3989 pAC->GIni.GP[1].PFlowCtrlMode =
3990 SK_FLOW_MODE_SYM_OR_REM;
3991 }
3992 else if (strcmp(FlowCtrl_B[pAC->Index],"Sym")==0) {
3993 pAC->GIni.GP[1].PFlowCtrlMode =
3994 SK_FLOW_MODE_SYMMETRIC;
3995 }
3996 else if (strcmp(FlowCtrl_B[pAC->Index],"LocSend")==0) {
3997 pAC->GIni.GP[1].PFlowCtrlMode =
3998 SK_FLOW_MODE_LOC_SEND;
3999 }
4000 else if (strcmp(FlowCtrl_B[pAC->Index],"None")==0) {
4001 pAC->GIni.GP[1].PFlowCtrlMode =
4002 SK_FLOW_MODE_NONE;
4003 }
4004 else printk("Illegal value for FlowCtrl_B\n");
4005 }
4006 if (AutoNeg==AN_OFF && pAC->GIni.GP[1].PFlowCtrlMode!=
4007 SK_FLOW_MODE_NONE) {
4008 printk("%s, Port B: FlowControl"
4009 " impossible without AutoNegotiation,"
4010 " disabled\n", pAC->dev[1]->name);
4011 pAC->GIni.GP[1].PFlowCtrlMode = SK_FLOW_MODE_NONE;
4012 }
4013
4014 MSMode = SK_MS_MODE_AUTO; /* default: do auto select */
4015 if (Role_B != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
4016 Role_B[pAC->Index] != NULL) {
4017 if (strcmp(Role_B[pAC->Index],"")==0) {
4018 }
4019 else if (strcmp(Role_B[pAC->Index],"Auto")==0) {
4020 MSMode = SK_MS_MODE_AUTO;
4021 }
4022 else if (strcmp(Role_B[pAC->Index],"Master")==0) {
4023 MSMode = SK_MS_MODE_MASTER;
4024 }
4025 else if (strcmp(Role_B[pAC->Index],"Slave")==0) {
4026 MSMode = SK_MS_MODE_SLAVE;
4027 }
4028 else printk("%s: Illegal value for Role_B\n",
4029 pAC->dev[1]->name);
4030 }
4031 pAC->GIni.GP[1].PMSMode = MSMode;
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4032
4033
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4034 /* settings for both ports */
4035 pAC->ActivePort = 0;
4036 if (PrefPort != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
4037 PrefPort[pAC->Index] != NULL) {
4038 if (strcmp(PrefPort[pAC->Index],"") == 0) { /* Auto */
4039 pAC->ActivePort = 0;
4040 pAC->Rlmt.Net[0].Preference = -1; /* auto */
4041 pAC->Rlmt.Net[0].PrefPort = 0;
4042 }
4043 else if (strcmp(PrefPort[pAC->Index],"A") == 0) {
4044 /*
4045 * do not set ActivePort here, thus a port
4046 * switch is issued after net up.
4047 */
4048 Port = 0;
4049 pAC->Rlmt.Net[0].Preference = Port;
4050 pAC->Rlmt.Net[0].PrefPort = Port;
4051 }
4052 else if (strcmp(PrefPort[pAC->Index],"B") == 0) {
4053 /*
4054 * do not set ActivePort here, thus a port
4055 * switch is issued after net up.
4056 */
4057 Port = 1;
4058 pAC->Rlmt.Net[0].Preference = Port;
4059 pAC->Rlmt.Net[0].PrefPort = Port;
4060 }
4061 else printk("%s: Illegal value for PrefPort\n",
4062 pAC->dev[0]->name);
4063 }
4064
4065 pAC->RlmtNets = 1;
4066
4067 if (RlmtMode != NULL && pAC->Index<SK_MAX_CARD_PARAM &&
4068 RlmtMode[pAC->Index] != NULL) {
4069 if (strcmp(RlmtMode[pAC->Index], "") == 0) {
4070 pAC->RlmtMode = 0;
4071 }
4072 else if (strcmp(RlmtMode[pAC->Index], "CheckLinkState") == 0) {
4073 pAC->RlmtMode = SK_RLMT_CHECK_LINK;
4074 }
4075 else if (strcmp(RlmtMode[pAC->Index], "CheckLocalPort") == 0) {
4076 pAC->RlmtMode = SK_RLMT_CHECK_LINK |
4077 SK_RLMT_CHECK_LOC_LINK;
4078 }
4079 else if (strcmp(RlmtMode[pAC->Index], "CheckSeg") == 0) {
4080 pAC->RlmtMode = SK_RLMT_CHECK_LINK |
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4081 SK_RLMT_CHECK_LOC_LINK |
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4082 SK_RLMT_CHECK_SEG;
4083 }
4084 else if ((strcmp(RlmtMode[pAC->Index], "DualNet") == 0) &&
4085 (pAC->GIni.GIMacsFound == 2)) {
4086 pAC->RlmtMode = SK_RLMT_CHECK_LINK;
4087 pAC->RlmtNets = 2;
4088 }
4089 else {
4090 printk("%s: Illegal value for"
4091 " RlmtMode, using default\n", pAC->dev[0]->name);
4092 pAC->RlmtMode = 0;
4093 }
4094 }
4095 else {
4096 pAC->RlmtMode = 0;
4097 }
4098} /* GetConfiguration */
4099
4100
4101/*****************************************************************************
4102 *
4103 * ProductStr - return a adapter identification string from vpd
4104 *
4105 * Description:
4106 * This function reads the product name string from the vpd area
4107 * and puts it the field pAC->DeviceString.
4108 *
4109 * Returns: N/A
4110 */
4111static void ProductStr(
4112SK_AC *pAC /* pointer to adapter context */
4113)
4114{
4115int StrLen = 80; /* length of the string, defined in SK_AC */
4116char Keyword[] = VPD_NAME; /* vpd productname identifier */
4117int ReturnCode; /* return code from vpd_read */
4118unsigned long Flags;
4119
4120 spin_lock_irqsave(&pAC->SlowPathLock, Flags);
4121 ReturnCode = VpdRead(pAC, pAC->IoBase, Keyword, pAC->DeviceStr,
4122 &StrLen);
4123 spin_unlock_irqrestore(&pAC->SlowPathLock, Flags);
4124 if (ReturnCode != 0) {
4125 /* there was an error reading the vpd data */
4126 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_ERROR,
4127 ("Error reading VPD data: %d\n", ReturnCode));
4128 pAC->DeviceStr[0] = '\0';
4129 }
4130} /* ProductStr */
4131
4132
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4133/****************************************************************************/
4134/* functions for common modules *********************************************/
4135/****************************************************************************/
4136
4137
4138/*****************************************************************************
4139 *
4140 * SkDrvAllocRlmtMbuf - allocate an RLMT mbuf
4141 *
4142 * Description:
4143 * This routine returns an RLMT mbuf or NULL. The RLMT Mbuf structure
4144 * is embedded into a socket buff data area.
4145 *
4146 * Context:
4147 * runtime
4148 *
4149 * Returns:
4150 * NULL or pointer to Mbuf.
4151 */
4152SK_MBUF *SkDrvAllocRlmtMbuf(
4153SK_AC *pAC, /* pointer to adapter context */
4154SK_IOC IoC, /* the IO-context */
4155unsigned BufferSize) /* size of the requested buffer */
4156{
4157SK_MBUF *pRlmtMbuf; /* pointer to a new rlmt-mbuf structure */
4158struct sk_buff *pMsgBlock; /* pointer to a new message block */
4159
4160 pMsgBlock = alloc_skb(BufferSize + sizeof(SK_MBUF), GFP_ATOMIC);
4161 if (pMsgBlock == NULL) {
4162 return (NULL);
4163 }
4164 pRlmtMbuf = (SK_MBUF*) pMsgBlock->data;
4165 skb_reserve(pMsgBlock, sizeof(SK_MBUF));
4166 pRlmtMbuf->pNext = NULL;
4167 pRlmtMbuf->pOs = pMsgBlock;
4168 pRlmtMbuf->pData = pMsgBlock->data; /* Data buffer. */
4169 pRlmtMbuf->Size = BufferSize; /* Data buffer size. */
4170 pRlmtMbuf->Length = 0; /* Length of packet (<= Size). */
4171 return (pRlmtMbuf);
4172
4173} /* SkDrvAllocRlmtMbuf */
4174
4175
4176/*****************************************************************************
4177 *
4178 * SkDrvFreeRlmtMbuf - free an RLMT mbuf
4179 *
4180 * Description:
4181 * This routine frees one or more RLMT mbuf(s).
4182 *
4183 * Context:
4184 * runtime
4185 *
4186 * Returns:
4187 * Nothing
4188 */
4189void SkDrvFreeRlmtMbuf(
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4190SK_AC *pAC, /* pointer to adapter context */
4191SK_IOC IoC, /* the IO-context */
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4192SK_MBUF *pMbuf) /* size of the requested buffer */
4193{
4194SK_MBUF *pFreeMbuf;
4195SK_MBUF *pNextMbuf;
4196
4197 pFreeMbuf = pMbuf;
4198 do {
4199 pNextMbuf = pFreeMbuf->pNext;
4200 DEV_KFREE_SKB_ANY(pFreeMbuf->pOs);
4201 pFreeMbuf = pNextMbuf;
4202 } while ( pFreeMbuf != NULL );
4203} /* SkDrvFreeRlmtMbuf */
4204
4205
4206/*****************************************************************************
4207 *
4208 * SkOsGetTime - provide a time value
4209 *
4210 * Description:
4211 * This routine provides a time value. The unit is 1/HZ (defined by Linux).
4212 * It is not used for absolute time, but only for time differences.
4213 *
4214 *
4215 * Returns:
4216 * Time value
4217 */
4218SK_U64 SkOsGetTime(SK_AC *pAC)
4219{
4220#if 0
4221 return jiffies;
4222#else
4223 return get_timer(0);
4224#endif
4225} /* SkOsGetTime */
4226
4227
4228/*****************************************************************************
4229 *
4230 * SkPciReadCfgDWord - read a 32 bit value from pci config space
4231 *
4232 * Description:
4233 * This routine reads a 32 bit value from the pci configuration
4234 * space.
4235 *
4236 * Returns:
4237 * 0 - indicate everything worked ok.
4238 * != 0 - error indication
4239 */
4240int SkPciReadCfgDWord(
4241SK_AC *pAC, /* Adapter Control structure pointer */
4242int PciAddr, /* PCI register address */
4243SK_U32 *pVal) /* pointer to store the read value */
4244{
4245 pci_read_config_dword(pAC->PciDev, PciAddr, pVal);
4246 return(0);
4247} /* SkPciReadCfgDWord */
4248
4249
4250/*****************************************************************************
4251 *
4252 * SkPciReadCfgWord - read a 16 bit value from pci config space
4253 *
4254 * Description:
4255 * This routine reads a 16 bit value from the pci configuration
4256 * space.
4257 *
4258 * Returns:
4259 * 0 - indicate everything worked ok.
4260 * != 0 - error indication
4261 */
4262int SkPciReadCfgWord(
4263SK_AC *pAC, /* Adapter Control structure pointer */
4264int PciAddr, /* PCI register address */
4265SK_U16 *pVal) /* pointer to store the read value */
4266{
4267 pci_read_config_word(pAC->PciDev, PciAddr, pVal);
4268 return(0);
4269} /* SkPciReadCfgWord */
4270
4271
4272/*****************************************************************************
4273 *
4274 * SkPciReadCfgByte - read a 8 bit value from pci config space
4275 *
4276 * Description:
4277 * This routine reads a 8 bit value from the pci configuration
4278 * space.
4279 *
4280 * Returns:
4281 * 0 - indicate everything worked ok.
4282 * != 0 - error indication
4283 */
4284int SkPciReadCfgByte(
4285SK_AC *pAC, /* Adapter Control structure pointer */
4286int PciAddr, /* PCI register address */
4287SK_U8 *pVal) /* pointer to store the read value */
4288{
4289 pci_read_config_byte(pAC->PciDev, PciAddr, pVal);
4290 return(0);
4291} /* SkPciReadCfgByte */
4292
4293
4294/*****************************************************************************
4295 *
4296 * SkPciWriteCfgDWord - write a 32 bit value to pci config space
4297 *
4298 * Description:
4299 * This routine writes a 32 bit value to the pci configuration
4300 * space.
4301 *
4302 * Returns:
4303 * 0 - indicate everything worked ok.
4304 * != 0 - error indication
4305 */
4306int SkPciWriteCfgDWord(
4307SK_AC *pAC, /* Adapter Control structure pointer */
4308int PciAddr, /* PCI register address */
4309SK_U32 Val) /* pointer to store the read value */
4310{
4311 pci_write_config_dword(pAC->PciDev, PciAddr, Val);
4312 return(0);
4313} /* SkPciWriteCfgDWord */
4314
4315
4316/*****************************************************************************
4317 *
4318 * SkPciWriteCfgWord - write a 16 bit value to pci config space
4319 *
4320 * Description:
4321 * This routine writes a 16 bit value to the pci configuration
4322 * space. The flag PciConfigUp indicates whether the config space
4323 * is accesible or must be set up first.
4324 *
4325 * Returns:
4326 * 0 - indicate everything worked ok.
4327 * != 0 - error indication
4328 */
4329int SkPciWriteCfgWord(
4330SK_AC *pAC, /* Adapter Control structure pointer */
4331int PciAddr, /* PCI register address */
4332SK_U16 Val) /* pointer to store the read value */
4333{
4334 pci_write_config_word(pAC->PciDev, PciAddr, Val);
4335 return(0);
4336} /* SkPciWriteCfgWord */
4337
4338
4339/*****************************************************************************
4340 *
4341 * SkPciWriteCfgWord - write a 8 bit value to pci config space
4342 *
4343 * Description:
4344 * This routine writes a 8 bit value to the pci configuration
4345 * space. The flag PciConfigUp indicates whether the config space
4346 * is accesible or must be set up first.
4347 *
4348 * Returns:
4349 * 0 - indicate everything worked ok.
4350 * != 0 - error indication
4351 */
4352int SkPciWriteCfgByte(
4353SK_AC *pAC, /* Adapter Control structure pointer */
4354int PciAddr, /* PCI register address */
4355SK_U8 Val) /* pointer to store the read value */
4356{
4357 pci_write_config_byte(pAC->PciDev, PciAddr, Val);
4358 return(0);
4359} /* SkPciWriteCfgByte */
4360
4361
4362/*****************************************************************************
4363 *
4364 * SkDrvEvent - handle driver events
4365 *
4366 * Description:
4367 * This function handles events from all modules directed to the driver
4368 *
4369 * Context:
4370 * Is called under protection of slow path lock.
4371 *
4372 * Returns:
4373 * 0 if everything ok
4374 * < 0 on error
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4375 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4376 */
4377int SkDrvEvent(
4378SK_AC *pAC, /* pointer to adapter context */
4379SK_IOC IoC, /* io-context */
4380SK_U32 Event, /* event-id */
4381SK_EVPARA Param) /* event-parameter */
4382{
4383SK_MBUF *pRlmtMbuf; /* pointer to a rlmt-mbuf structure */
4384struct sk_buff *pMsg; /* pointer to a message block */
4385int FromPort; /* the port from which we switch away */
4386int ToPort; /* the port we switch to */
4387SK_EVPARA NewPara; /* parameter for further events */
4388#if 0
4389int Stat;
4390#endif
4391unsigned long Flags;
4392SK_BOOL DualNet;
4393
4394 switch (Event) {
4395 case SK_DRV_ADAP_FAIL:
4396 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4397 ("ADAPTER FAIL EVENT\n"));
4398 printk("%s: Adapter failed.\n", pAC->dev[0]->name);
4399 /* disable interrupts */
4400 SK_OUT32(pAC->IoBase, B0_IMSK, 0);
4401 /* cgoos */
4402 break;
4403 case SK_DRV_PORT_FAIL:
4404 FromPort = Param.Para32[0];
4405 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4406 ("PORT FAIL EVENT, Port: %d\n", FromPort));
4407 if (FromPort == 0) {
4408 printk("%s: Port A failed.\n", pAC->dev[0]->name);
4409 } else {
4410 printk("%s: Port B failed.\n", pAC->dev[1]->name);
4411 }
4412 /* cgoos */
4413 break;
4414 case SK_DRV_PORT_RESET: /* SK_U32 PortIdx */
4415 /* action list 4 */
4416 FromPort = Param.Para32[0];
4417 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4418 ("PORT RESET EVENT, Port: %d ", FromPort));
4419 NewPara.Para64 = FromPort;
4420 SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
4421 spin_lock_irqsave(
4422 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4423 Flags);
4424 SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST);
4425#if 0
4426 pAC->dev[Param.Para32[0]]->flags &= ~IFF_RUNNING;
4427#endif
4428 spin_unlock_irqrestore(
4429 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4430 Flags);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4431
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4432 /* clear rx ring from received frames */
4433 ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4434
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4435 ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
4436 spin_lock_irqsave(
4437 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4438 Flags);
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4439
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4440 /* tschilling: Handling of return value inserted. */
4441 if (SkGeInitPort(pAC, IoC, FromPort)) {
4442 if (FromPort == 0) {
4443 printk("%s: SkGeInitPort A failed.\n", pAC->dev[0]->name);
4444 } else {
4445 printk("%s: SkGeInitPort B failed.\n", pAC->dev[1]->name);
4446 }
4447 }
4448 SkAddrMcUpdate(pAC,IoC, FromPort);
4449 PortReInitBmu(pAC, FromPort);
4450 SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
4451 ClearAndStartRx(pAC, FromPort);
4452 spin_unlock_irqrestore(
4453 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4454 Flags);
4455 break;
4456 case SK_DRV_NET_UP: /* SK_U32 PortIdx */
4457 /* action list 5 */
4458 FromPort = Param.Para32[0];
4459 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4460 ("NET UP EVENT, Port: %d ", Param.Para32[0]));
4461#ifdef SK98_INFO
4462 printk("%s: network connection up using"
4463 " port %c\n", pAC->dev[Param.Para32[0]]->name, 'A'+Param.Para32[0]);
4464
4465 /* tschilling: Values changed according to LinkSpeedUsed. */
4466 Stat = pAC->GIni.GP[FromPort].PLinkSpeedUsed;
4467 if (Stat == SK_LSPEED_STAT_10MBPS) {
4468 printk(" speed: 10\n");
4469 } else if (Stat == SK_LSPEED_STAT_100MBPS) {
4470 printk(" speed: 100\n");
4471 } else if (Stat == SK_LSPEED_STAT_1000MBPS) {
4472 printk(" speed: 1000\n");
4473 } else {
4474 printk(" speed: unknown\n");
4475 }
4476
4477 Stat = pAC->GIni.GP[FromPort].PLinkModeStatus;
4478 if (Stat == SK_LMODE_STAT_AUTOHALF ||
4479 Stat == SK_LMODE_STAT_AUTOFULL) {
4480 printk(" autonegotiation: yes\n");
4481 }
4482 else {
4483 printk(" autonegotiation: no\n");
4484 }
4485 if (Stat == SK_LMODE_STAT_AUTOHALF ||
4486 Stat == SK_LMODE_STAT_HALF) {
4487 printk(" duplex mode: half\n");
4488 }
4489 else {
4490 printk(" duplex mode: full\n");
4491 }
4492 Stat = pAC->GIni.GP[FromPort].PFlowCtrlStatus;
4493 if (Stat == SK_FLOW_STAT_REM_SEND ) {
4494 printk(" flowctrl: remote send\n");
4495 }
4496 else if (Stat == SK_FLOW_STAT_LOC_SEND ){
4497 printk(" flowctrl: local send\n");
4498 }
4499 else if (Stat == SK_FLOW_STAT_SYMMETRIC ){
4500 printk(" flowctrl: symmetric\n");
4501 }
4502 else {
4503 printk(" flowctrl: none\n");
4504 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4505
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4506 /* tschilling: Check against CopperType now. */
4507 if ((pAC->GIni.GICopperType == SK_TRUE) &&
4508 (pAC->GIni.GP[FromPort].PLinkSpeedUsed ==
4509 SK_LSPEED_STAT_1000MBPS)) {
4510 Stat = pAC->GIni.GP[FromPort].PMSStatus;
4511 if (Stat == SK_MS_STAT_MASTER ) {
4512 printk(" role: master\n");
4513 }
4514 else if (Stat == SK_MS_STAT_SLAVE ) {
4515 printk(" role: slave\n");
4516 }
4517 else {
4518 printk(" role: ???\n");
4519 }
4520 }
4521
4522#ifdef SK_ZEROCOPY
4523 if (pAC->GIni.GIChipId == CHIP_ID_YUKON)
4524 printk(" scatter-gather: enabled\n");
4525 else
4526 printk(" scatter-gather: disabled\n");
4527
4528#else
4529 printk(" scatter-gather: disabled\n");
4530#endif
4531#endif /* SK98_INFO */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4532
4533 if ((Param.Para32[0] != pAC->ActivePort) &&
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4534 (pAC->RlmtNets == 1)) {
4535 NewPara.Para32[0] = pAC->ActivePort;
4536 NewPara.Para32[1] = Param.Para32[0];
4537 SkEventQueue(pAC, SKGE_DRV, SK_DRV_SWITCH_INTERN,
4538 NewPara);
4539 }
4540
4541 /* Inform the world that link protocol is up. */
4542#if 0
4543 pAC->dev[Param.Para32[0]]->flags |= IFF_RUNNING;
4544#endif
4545
4546 break;
4547 case SK_DRV_NET_DOWN: /* SK_U32 Reason */
4548 /* action list 7 */
4549 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4550 ("NET DOWN EVENT "));
4551#ifdef SK98_INFO
4552 printk("%s: network connection down\n", pAC->dev[Param.Para32[1]]->name);
4553#endif
4554#if 0
4555 pAC->dev[Param.Para32[1]]->flags &= ~IFF_RUNNING;
4556#endif
4557 break;
4558 case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
4559 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4560 ("PORT SWITCH HARD "));
4561 case SK_DRV_SWITCH_SOFT: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
4562 /* action list 6 */
4563 printk("%s: switching to port %c\n", pAC->dev[0]->name,
4564 'A'+Param.Para32[1]);
4565 case SK_DRV_SWITCH_INTERN: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */
4566 FromPort = Param.Para32[0];
4567 ToPort = Param.Para32[1];
4568 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4569 ("PORT SWITCH EVENT, From: %d To: %d (Pref %d) ",
4570 FromPort, ToPort, pAC->Rlmt.Net[0].PrefPort));
4571 NewPara.Para64 = FromPort;
4572 SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
4573 NewPara.Para64 = ToPort;
4574 SkPnmiEvent(pAC, IoC, SK_PNMI_EVT_XMAC_RESET, NewPara);
4575 spin_lock_irqsave(
4576 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4577 Flags);
4578 spin_lock_irqsave(
4579 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4580 SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_SOFT_RST);
4581 SkGeStopPort(pAC, IoC, ToPort, SK_STOP_ALL, SK_SOFT_RST);
4582 spin_unlock_irqrestore(
4583 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4584 spin_unlock_irqrestore(
4585 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4586 Flags);
4587
4588 ReceiveIrq(pAC, &pAC->RxPort[FromPort], SK_FALSE); /* clears rx ring */
4589 ReceiveIrq(pAC, &pAC->RxPort[ToPort], SK_FALSE); /* clears rx ring */
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4590
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4591 ClearTxRing(pAC, &pAC->TxPort[FromPort][TX_PRIO_LOW]);
4592 ClearTxRing(pAC, &pAC->TxPort[ToPort][TX_PRIO_LOW]);
4593 spin_lock_irqsave(
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4594 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4595 Flags);
4596 spin_lock_irqsave(
4597 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4598 pAC->ActivePort = ToPort;
4599#if 0
4600 SetQueueSizes(pAC);
4601#else
4602 /* tschilling: New common function with minimum size check. */
4603 DualNet = SK_FALSE;
4604 if (pAC->RlmtNets == 2) {
4605 DualNet = SK_TRUE;
4606 }
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4607
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4608 if (SkGeInitAssignRamToQueues(
4609 pAC,
4610 pAC->ActivePort,
4611 DualNet)) {
4612 spin_unlock_irqrestore(
4613 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4614 spin_unlock_irqrestore(
4615 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4616 Flags);
4617 printk("SkGeInitAssignRamToQueues failed.\n");
4618 break;
4619 }
4620#endif
4621 /* tschilling: Handling of return values inserted. */
4622 if (SkGeInitPort(pAC, IoC, FromPort) ||
4623 SkGeInitPort(pAC, IoC, ToPort)) {
4624 printk("%s: SkGeInitPort failed.\n", pAC->dev[0]->name);
4625 }
4626 if (Event == SK_DRV_SWITCH_SOFT) {
4627 SkMacRxTxEnable(pAC, IoC, FromPort);
4628 }
4629 SkMacRxTxEnable(pAC, IoC, ToPort);
4630 SkAddrSwap(pAC, IoC, FromPort, ToPort);
4631 SkAddrMcUpdate(pAC, IoC, FromPort);
4632 SkAddrMcUpdate(pAC, IoC, ToPort);
4633 PortReInitBmu(pAC, FromPort);
4634 PortReInitBmu(pAC, ToPort);
4635 SkGePollTxD(pAC, IoC, FromPort, SK_TRUE);
4636 SkGePollTxD(pAC, IoC, ToPort, SK_TRUE);
4637 ClearAndStartRx(pAC, FromPort);
4638 ClearAndStartRx(pAC, ToPort);
4639 spin_unlock_irqrestore(
4640 &pAC->TxPort[ToPort][TX_PRIO_LOW].TxDesRingLock, Flags);
4641 spin_unlock_irqrestore(
4642 &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock,
4643 Flags);
4644 break;
4645 case SK_DRV_RLMT_SEND: /* SK_MBUF *pMb */
4646 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4647 ("RLS "));
4648 pRlmtMbuf = (SK_MBUF*) Param.pParaPtr;
4649 pMsg = (struct sk_buff*) pRlmtMbuf->pOs;
4650 skb_put(pMsg, pRlmtMbuf->Length);
4651 if (XmitFrame(pAC, &pAC->TxPort[pRlmtMbuf->PortIdx][TX_PRIO_LOW],
4652 pMsg) < 0)
4653
4654 DEV_KFREE_SKB_ANY(pMsg);
4655 break;
4656 default:
4657 break;
4658 }
4659 SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT,
4660 ("END EVENT "));
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4661
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4662 return (0);
4663} /* SkDrvEvent */
4664
4665
4666/*****************************************************************************
4667 *
4668 * SkErrorLog - log errors
4669 *
4670 * Description:
4671 * This function logs errors to the system buffer and to the console
4672 *
4673 * Returns:
4674 * 0 if everything ok
4675 * < 0 on error
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4676 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4677 */
4678void SkErrorLog(
4679SK_AC *pAC,
4680int ErrClass,
4681int ErrNum,
4682char *pErrorMsg)
4683{
4684char ClassStr[80];
4685
4686 switch (ErrClass) {
4687 case SK_ERRCL_OTHER:
4688 strcpy(ClassStr, "Other error");
4689 break;
4690 case SK_ERRCL_CONFIG:
4691 strcpy(ClassStr, "Configuration error");
4692 break;
4693 case SK_ERRCL_INIT:
4694 strcpy(ClassStr, "Initialization error");
4695 break;
4696 case SK_ERRCL_NORES:
4697 strcpy(ClassStr, "Out of resources error");
4698 break;
4699 case SK_ERRCL_SW:
4700 strcpy(ClassStr, "internal Software error");
4701 break;
4702 case SK_ERRCL_HW:
4703 strcpy(ClassStr, "Hardware failure");
4704 break;
4705 case SK_ERRCL_COMM:
4706 strcpy(ClassStr, "Communication error");
4707 break;
4708 }
4709 printk(KERN_INFO "%s: -- ERROR --\n Class: %s\n"
4710 " Nr: 0x%x\n Msg: %s\n", pAC->dev[0]->name,
4711 ClassStr, ErrNum, pErrorMsg);
4712
4713} /* SkErrorLog */
4714
4715#ifdef DEBUG
4716/****************************************************************************/
4717/* "debug only" section *****************************************************/
4718/****************************************************************************/
4719
4720
4721/*****************************************************************************
4722 *
4723 * DumpMsg - print a frame
4724 *
4725 * Description:
4726 * This function prints frames to the system logfile/to the console.
4727 *
4728 * Returns: N/A
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4729 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4730 */
4731static void DumpMsg(struct sk_buff *skb, char *str)
4732{
4733 int msglen;
4734
4735 if (skb == NULL) {
4736 printk("DumpMsg(): NULL-Message\n");
4737 return;
4738 }
4739
4740 if (skb->data == NULL) {
4741 printk("DumpMsg(): Message empty\n");
4742 return;
4743 }
4744
4745 msglen = skb->len;
4746 if (msglen > 64)
4747 msglen = 64;
4748
4749 printk("--- Begin of message from %s , len %d (from %d) ----\n", str, msglen, skb->len);
4750
4751 DumpData((char *)skb->data, msglen);
4752
4753 printk("------- End of message ---------\n");
4754} /* DumpMsg */
4755
4756
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4757/*****************************************************************************
4758 *
4759 * DumpData - print a data area
4760 *
4761 * Description:
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4762 * This function prints a area of data to the system logfile/to the
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4763 * console.
4764 *
4765 * Returns: N/A
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4766 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4767 */
4768static void DumpData(char *p, int size)
4769{
4770register int i;
4771int haddr, addr;
4772char hex_buffer[180];
4773char asc_buffer[180];
4774char HEXCHAR[] = "0123456789ABCDEF";
4775
4776 addr = 0;
4777 haddr = 0;
4778 hex_buffer[0] = 0;
4779 asc_buffer[0] = 0;
4780 for (i=0; i < size; ) {
4781 if (*p >= '0' && *p <='z')
4782 asc_buffer[addr] = *p;
4783 else
4784 asc_buffer[addr] = '.';
4785 addr++;
4786 asc_buffer[addr] = 0;
4787 hex_buffer[haddr] = HEXCHAR[(*p & 0xf0) >> 4];
4788 haddr++;
4789 hex_buffer[haddr] = HEXCHAR[*p & 0x0f];
4790 haddr++;
4791 hex_buffer[haddr] = ' ';
4792 haddr++;
4793 hex_buffer[haddr] = 0;
4794 p++;
4795 i++;
4796 if (i%16 == 0) {
4797 printk("%s %s\n", hex_buffer, asc_buffer);
4798 addr = 0;
4799 haddr = 0;
4800 }
4801 }
4802} /* DumpData */
4803
4804
4805/*****************************************************************************
4806 *
4807 * DumpLong - print a data area as long values
4808 *
4809 * Description:
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4810 * This function prints a area of data to the system logfile/to the
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4811 * console.
4812 *
4813 * Returns: N/A
wdenk42d1f032003-10-15 23:53:47 +0000[diff] [blame]4814 *
wdenk7152b1d2003-09-05 23:19:14 +0000[diff] [blame]4815 */
4816static void DumpLong(char *pc, int size)
4817{
4818register int i;
4819int haddr, addr;
4820char hex_buffer[180];
4821char asc_buffer[180];
4822char HEXCHAR[] = "0123456789ABCDEF";
4823long *p;
4824int l;
4825
4826 addr = 0;
4827 haddr = 0;
4828 hex_buffer[0] = 0;
4829 asc_buffer[0] = 0;
4830 p = (long*) pc;
4831 for (i=0; i < size; ) {
4832 l = (long) *p;
4833 hex_buffer[haddr] = HEXCHAR[(l >> 28) & 0xf];
4834 haddr++;
4835 hex_buffer[haddr] = HEXCHAR[(l >> 24) & 0xf];
4836 haddr++;
4837 hex_buffer[haddr] = HEXCHAR[(l >> 20) & 0xf];
4838 haddr++;
4839 hex_buffer[haddr] = HEXCHAR[(l >> 16) & 0xf];
4840 haddr++;
4841 hex_buffer[haddr] = HEXCHAR[(l >> 12) & 0xf];
4842 haddr++;
4843 hex_buffer[haddr] = HEXCHAR[(l >> 8) & 0xf];
4844 haddr++;
4845 hex_buffer[haddr] = HEXCHAR[(l >> 4) & 0xf];
4846 haddr++;
4847 hex_buffer[haddr] = HEXCHAR[l & 0x0f];
4848 haddr++;
4849 hex_buffer[haddr] = ' ';
4850 haddr++;
4851 hex_buffer[haddr] = 0;
4852 p++;
4853 i++;
4854 if (i%8 == 0) {
4855 printk("%4x %s\n", (i-8)*4, hex_buffer);
4856 haddr = 0;
4857 }
4858 }
4859 printk("------------------------\n");
4860} /* DumpLong */
4861
4862#endif
4863
wdenk149dded2003-09-10 18:20:28 +0000[diff] [blame]4864#endif /* CONFIG_SK98 */