Chris Brandt | ba932bc | 2017-08-23 14:53:59 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2017 Renesas Electronics |
| 4 | * Copyright (C) Chris Brandt |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Simon Glass | 9a3b4ce | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 8 | #include <cpu_func.h> |
Simon Glass | 691d719 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 9 | #include <init.h> |
Chris Brandt | ba932bc | 2017-08-23 14:53:59 -0500 | [diff] [blame] | 10 | #include <asm/io.h> |
| 11 | #include <asm/arch/sys_proto.h> |
| 12 | |
| 13 | #define RZA1_WDT_BASE 0xfcfe0000 |
| 14 | #define WTCSR 0x00 |
| 15 | #define WTCNT 0x02 |
| 16 | #define WRCSR 0x04 |
| 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
| 20 | int board_init(void) |
| 21 | { |
| 22 | gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100); |
| 23 | |
| 24 | return 0; |
| 25 | } |
| 26 | |
| 27 | int dram_init(void) |
| 28 | { |
| 29 | if (fdtdec_setup_mem_size_base() != 0) |
| 30 | return -EINVAL; |
| 31 | |
| 32 | return 0; |
| 33 | } |
| 34 | |
| 35 | int dram_init_banksize(void) |
| 36 | { |
| 37 | fdtdec_setup_memory_banksize(); |
| 38 | |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | void reset_cpu(ulong addr) |
| 43 | { |
| 44 | /* Dummy read (must read WRCSR:WOVF at least once before clearing) */ |
| 45 | readb(RZA1_WDT_BASE + WRCSR); |
| 46 | |
| 47 | writew(0xa500, RZA1_WDT_BASE + WRCSR); |
| 48 | writew(0x5a5f, RZA1_WDT_BASE + WRCSR); |
| 49 | writew(0x5a00, RZA1_WDT_BASE + WTCNT); |
| 50 | writew(0xa578, RZA1_WDT_BASE + WTCSR); |
| 51 | |
| 52 | for (;;) |
| 53 | asm volatile("wfi"); |
| 54 | } |