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Simon Glass6caa1952013-05-08 08:06:03 +00001/*
2 * Copyright (c) 2013, Google Inc.
3 *
4 * Copyright (C) 2011
5 * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
6 * - Added prep subcommand support
7 * - Reorganized source - modeled after powerpc version
8 *
9 * (C) Copyright 2002
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Marius Groeger <mgroeger@sysgo.de>
12 *
13 * Copyright (C) 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
14 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020015 * SPDX-License-Identifier: GPL-2.0+
Simon Glass6caa1952013-05-08 08:06:03 +000016 */
17
18#include <common.h>
19#include <fdt_support.h>
Tom Rini4588d612015-05-14 11:07:03 -040020#ifdef CONFIG_ARMV7_NONSEC
Jan Kiszkad6b72da2015-04-21 07:18:32 +020021#include <asm/armv7.h>
Tom Rini4588d612015-05-14 11:07:03 -040022#endif
Tom Rinidd09f7e2015-03-05 20:19:36 -050023#include <asm/psci.h>
Masahiro Yamada6b6024e2016-06-27 19:31:05 +090024#include <asm/spin_table.h>
Simon Glass6caa1952013-05-08 08:06:03 +000025
26DECLARE_GLOBAL_DATA_PTR;
27
Ma Haijune29607e2014-07-12 14:24:06 +010028int arch_fixup_fdt(void *blob)
Simon Glass6caa1952013-05-08 08:06:03 +000029{
B, Ravi984a3c82017-04-18 17:27:26 +053030 int ret = 0;
31#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT)
Simon Glass6caa1952013-05-08 08:06:03 +000032 bd_t *bd = gd->bd;
B, Ravi984a3c82017-04-18 17:27:26 +053033 int bank;
Simon Glass6caa1952013-05-08 08:06:03 +000034 u64 start[CONFIG_NR_DRAM_BANKS];
35 u64 size[CONFIG_NR_DRAM_BANKS];
36
37 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
38 start[bank] = bd->bi_dram[bank].start;
39 size[bank] = bd->bi_dram[bank].size;
Jan Kiszkad6b72da2015-04-21 07:18:32 +020040#ifdef CONFIG_ARMV7_NONSEC
41 ret = armv7_apply_memory_carveout(&start[bank], &size[bank]);
42 if (ret)
43 return ret;
44#endif
Simon Glass6caa1952013-05-08 08:06:03 +000045 }
46
B, Ravi984a3c82017-04-18 17:27:26 +053047#ifdef CONFIG_OF_LIBFDT
Marc Zyngiere771a3d2014-07-12 14:24:07 +010048 ret = fdt_fixup_memory_banks(blob, start, size, CONFIG_NR_DRAM_BANKS);
Marc Zyngiere771a3d2014-07-12 14:24:07 +010049 if (ret)
50 return ret;
B, Ravi984a3c82017-04-18 17:27:26 +053051#endif
Marc Zyngiere771a3d2014-07-12 14:24:07 +010052
Masahiro Yamada6b6024e2016-06-27 19:31:05 +090053#ifdef CONFIG_ARMV8_SPIN_TABLE
54 ret = spin_table_update_dt(blob);
55 if (ret)
56 return ret;
57#endif
58
macro.wave.z@gmail.com9a561752016-12-08 11:58:25 +080059#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV8_PSCI) || \
Hou Zhiqiangdaa92642017-01-16 17:31:48 +080060 defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
Tom Rinidd09f7e2015-03-05 20:19:36 -050061 ret = psci_update_dt(blob);
Masahiro Yamada6441e3d2016-06-17 21:51:48 +090062 if (ret)
63 return ret;
Marc Zyngiere771a3d2014-07-12 14:24:07 +010064#endif
B, Ravi984a3c82017-04-18 17:27:26 +053065#endif
Masahiro Yamada6441e3d2016-06-17 21:51:48 +090066
67 return 0;
Simon Glass6caa1952013-05-08 08:06:03 +000068}