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Oliver Schinagl5c7f10f2013-07-26 12:56:58 +02001/*
Hans de Goedebdcdf842014-11-29 23:54:25 +01002 * AXP221 and AXP223 driver
3 *
4 * IMPORTANT when making changes to this file check that the registers
5 * used are the same for the axp221 and axp223.
6 *
7 * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com>
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +02008 * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl>
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#include <common.h>
14#include <errno.h>
Paul Kocialkowskif7c7ab62015-03-22 18:07:09 +010015#include <asm/arch/gpio.h>
Hans de Goede1d624a42015-04-25 14:07:37 +020016#include <asm/arch/pmic_bus.h>
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +020017#include <axp221.h>
18
19static u8 axp221_mvolt_to_cfg(int mvolt, int min, int max, int div)
20{
21 if (mvolt < min)
22 mvolt = min;
23 else if (mvolt > max)
24 mvolt = max;
25
26 return (mvolt - min) / div;
27}
28
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +020029int axp221_set_dcdc1(unsigned int mvolt)
30{
31 int ret;
32 u8 cfg = axp221_mvolt_to_cfg(mvolt, 1600, 3400, 100);
33
Hans de Goede50e0d5e2014-12-13 14:02:38 +010034 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +020035 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1,
36 AXP221_OUTPUT_CTRL1_DCDC1_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +010037
Hans de Goedebdcdf842014-11-29 23:54:25 +010038 ret = pmic_bus_write(AXP221_DCDC1_CTRL, cfg);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +020039 if (ret)
40 return ret;
41
Hans de Goede1d624a42015-04-25 14:07:37 +020042 ret = pmic_bus_setbits(AXP221_OUTPUT_CTRL2,
43 AXP221_OUTPUT_CTRL2_DCDC1SW_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +010044 if (ret)
45 return ret;
46
Hans de Goede1d624a42015-04-25 14:07:37 +020047 return pmic_bus_setbits(AXP221_OUTPUT_CTRL1,
48 AXP221_OUTPUT_CTRL1_DCDC1_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +020049}
50
51int axp221_set_dcdc2(unsigned int mvolt)
52{
Hans de Goede50e0d5e2014-12-13 14:02:38 +010053 int ret;
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +020054 u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20);
55
Hans de Goede50e0d5e2014-12-13 14:02:38 +010056 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +020057 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1,
58 AXP221_OUTPUT_CTRL1_DCDC2_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +010059
60 ret = pmic_bus_write(AXP221_DCDC2_CTRL, cfg);
61 if (ret)
62 return ret;
63
Hans de Goede1d624a42015-04-25 14:07:37 +020064 return pmic_bus_setbits(AXP221_OUTPUT_CTRL1,
65 AXP221_OUTPUT_CTRL1_DCDC2_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +020066}
67
68int axp221_set_dcdc3(unsigned int mvolt)
69{
Hans de Goede50e0d5e2014-12-13 14:02:38 +010070 int ret;
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +020071 u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1860, 20);
72
Hans de Goede50e0d5e2014-12-13 14:02:38 +010073 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +020074 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1,
75 AXP221_OUTPUT_CTRL1_DCDC3_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +010076
77 ret = pmic_bus_write(AXP221_DCDC3_CTRL, cfg);
78 if (ret)
79 return ret;
80
Hans de Goede1d624a42015-04-25 14:07:37 +020081 return pmic_bus_setbits(AXP221_OUTPUT_CTRL1,
82 AXP221_OUTPUT_CTRL1_DCDC3_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +020083}
84
85int axp221_set_dcdc4(unsigned int mvolt)
86{
Hans de Goede50e0d5e2014-12-13 14:02:38 +010087 int ret;
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +020088 u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20);
89
Hans de Goede50e0d5e2014-12-13 14:02:38 +010090 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +020091 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1,
92 AXP221_OUTPUT_CTRL1_DCDC4_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +010093
94 ret = pmic_bus_write(AXP221_DCDC4_CTRL, cfg);
95 if (ret)
96 return ret;
97
Hans de Goede1d624a42015-04-25 14:07:37 +020098 return pmic_bus_setbits(AXP221_OUTPUT_CTRL1,
99 AXP221_OUTPUT_CTRL1_DCDC4_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200100}
101
102int axp221_set_dcdc5(unsigned int mvolt)
103{
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100104 int ret;
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200105 u8 cfg = axp221_mvolt_to_cfg(mvolt, 1000, 2550, 50);
106
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100107 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +0200108 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1,
109 AXP221_OUTPUT_CTRL1_DCDC5_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100110
111 ret = pmic_bus_write(AXP221_DCDC5_CTRL, cfg);
112 if (ret)
113 return ret;
114
Hans de Goede1d624a42015-04-25 14:07:37 +0200115 return pmic_bus_setbits(AXP221_OUTPUT_CTRL1,
116 AXP221_OUTPUT_CTRL1_DCDC5_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200117}
118
119int axp221_set_dldo1(unsigned int mvolt)
120{
121 int ret;
122 u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
123
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100124 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +0200125 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2,
126 AXP221_OUTPUT_CTRL2_DLDO1_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100127
Hans de Goedebdcdf842014-11-29 23:54:25 +0100128 ret = pmic_bus_write(AXP221_DLDO1_CTRL, cfg);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200129 if (ret)
130 return ret;
131
Hans de Goede1d624a42015-04-25 14:07:37 +0200132 return pmic_bus_setbits(AXP221_OUTPUT_CTRL2,
133 AXP221_OUTPUT_CTRL2_DLDO1_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200134}
135
136int axp221_set_dldo2(unsigned int mvolt)
137{
138 int ret;
139 u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
140
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100141 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +0200142 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2,
143 AXP221_OUTPUT_CTRL2_DLDO2_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100144
Hans de Goedebdcdf842014-11-29 23:54:25 +0100145 ret = pmic_bus_write(AXP221_DLDO2_CTRL, cfg);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200146 if (ret)
147 return ret;
148
Hans de Goede1d624a42015-04-25 14:07:37 +0200149 return pmic_bus_setbits(AXP221_OUTPUT_CTRL2,
150 AXP221_OUTPUT_CTRL2_DLDO2_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200151}
152
153int axp221_set_dldo3(unsigned int mvolt)
154{
155 int ret;
156 u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
157
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100158 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +0200159 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2,
160 AXP221_OUTPUT_CTRL2_DLDO3_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100161
Hans de Goedebdcdf842014-11-29 23:54:25 +0100162 ret = pmic_bus_write(AXP221_DLDO3_CTRL, cfg);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200163 if (ret)
164 return ret;
165
Hans de Goede1d624a42015-04-25 14:07:37 +0200166 return pmic_bus_setbits(AXP221_OUTPUT_CTRL2,
167 AXP221_OUTPUT_CTRL2_DLDO3_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200168}
169
170int axp221_set_dldo4(unsigned int mvolt)
171{
172 int ret;
173 u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
174
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100175 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +0200176 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2,
177 AXP221_OUTPUT_CTRL2_DLDO4_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100178
Hans de Goedebdcdf842014-11-29 23:54:25 +0100179 ret = pmic_bus_write(AXP221_DLDO4_CTRL, cfg);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200180 if (ret)
181 return ret;
182
Hans de Goede1d624a42015-04-25 14:07:37 +0200183 return pmic_bus_setbits(AXP221_OUTPUT_CTRL2,
184 AXP221_OUTPUT_CTRL2_DLDO4_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200185}
186
187int axp221_set_aldo1(unsigned int mvolt)
188{
189 int ret;
190 u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
191
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100192 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +0200193 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1,
194 AXP221_OUTPUT_CTRL1_ALDO1_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100195
Hans de Goedebdcdf842014-11-29 23:54:25 +0100196 ret = pmic_bus_write(AXP221_ALDO1_CTRL, cfg);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200197 if (ret)
198 return ret;
199
Hans de Goede1d624a42015-04-25 14:07:37 +0200200 return pmic_bus_setbits(AXP221_OUTPUT_CTRL1,
201 AXP221_OUTPUT_CTRL1_ALDO1_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200202}
203
204int axp221_set_aldo2(unsigned int mvolt)
205{
206 int ret;
207 u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
208
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100209 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +0200210 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1,
211 AXP221_OUTPUT_CTRL1_ALDO2_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100212
Hans de Goedebdcdf842014-11-29 23:54:25 +0100213 ret = pmic_bus_write(AXP221_ALDO2_CTRL, cfg);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200214 if (ret)
215 return ret;
216
Hans de Goede1d624a42015-04-25 14:07:37 +0200217 return pmic_bus_setbits(AXP221_OUTPUT_CTRL1,
218 AXP221_OUTPUT_CTRL1_ALDO2_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200219}
220
221int axp221_set_aldo3(unsigned int mvolt)
222{
223 int ret;
224 u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
225
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100226 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +0200227 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL3,
228 AXP221_OUTPUT_CTRL3_ALDO3_EN);
Hans de Goede50e0d5e2014-12-13 14:02:38 +0100229
Hans de Goedebdcdf842014-11-29 23:54:25 +0100230 ret = pmic_bus_write(AXP221_ALDO3_CTRL, cfg);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200231 if (ret)
232 return ret;
233
Hans de Goede1d624a42015-04-25 14:07:37 +0200234 return pmic_bus_setbits(AXP221_OUTPUT_CTRL3,
235 AXP221_OUTPUT_CTRL3_ALDO3_EN);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200236}
237
Siarhei Siamashka6906df12015-01-19 05:23:30 +0200238int axp221_set_eldo(int eldo_num, unsigned int mvolt)
239{
240 int ret;
241 u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
242 u8 addr, bits;
243
244 switch (eldo_num) {
245 case 3:
246 addr = AXP221_ELDO3_CTRL;
247 bits = AXP221_OUTPUT_CTRL2_ELDO3_EN;
248 break;
249 case 2:
250 addr = AXP221_ELDO2_CTRL;
251 bits = AXP221_OUTPUT_CTRL2_ELDO2_EN;
252 break;
253 case 1:
254 addr = AXP221_ELDO1_CTRL;
255 bits = AXP221_OUTPUT_CTRL2_ELDO1_EN;
256 break;
257 default:
258 return -EINVAL;
259 }
260
261 if (mvolt == 0)
Hans de Goede1d624a42015-04-25 14:07:37 +0200262 return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, bits);
Siarhei Siamashka6906df12015-01-19 05:23:30 +0200263
264 ret = pmic_bus_write(addr, cfg);
265 if (ret)
266 return ret;
267
Hans de Goede1d624a42015-04-25 14:07:37 +0200268 return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, bits);
Siarhei Siamashka6906df12015-01-19 05:23:30 +0200269}
270
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200271int axp221_init(void)
272{
Hans de Goede3c781192015-01-11 19:43:56 +0100273 /* This cannot be 0 because it is used in SPL before BSS is ready */
274 static int needs_init = 1;
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200275 u8 axp_chip_id;
276 int ret;
277
Hans de Goede3c781192015-01-11 19:43:56 +0100278 if (!needs_init)
279 return 0;
280
Hans de Goedebdcdf842014-11-29 23:54:25 +0100281 ret = pmic_bus_init();
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200282 if (ret)
283 return ret;
284
Hans de Goedebdcdf842014-11-29 23:54:25 +0100285 ret = pmic_bus_read(AXP221_CHIP_ID, &axp_chip_id);
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200286 if (ret)
287 return ret;
288
289 if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17))
290 return -ENODEV;
291
Hans de Goede3c781192015-01-11 19:43:56 +0100292 needs_init = 0;
Oliver Schinagl5c7f10f2013-07-26 12:56:58 +0200293 return 0;
294}
Hans de Goedef3fba562014-11-25 16:37:52 +0100295
296int axp221_get_sid(unsigned int *sid)
297{
298 u8 *dest = (u8 *)sid;
299 int i, ret;
300
301 ret = axp221_init();
302 if (ret)
303 return ret;
304
Hans de Goedebdcdf842014-11-29 23:54:25 +0100305 ret = pmic_bus_write(AXP221_PAGE, 1);
Hans de Goedef3fba562014-11-25 16:37:52 +0100306 if (ret)
307 return ret;
308
309 for (i = 0; i < 16; i++) {
Hans de Goedebdcdf842014-11-29 23:54:25 +0100310 ret = pmic_bus_read(AXP221_SID + i, &dest[i]);
Hans de Goedef3fba562014-11-25 16:37:52 +0100311 if (ret)
312 return ret;
313 }
314
Hans de Goedebdcdf842014-11-29 23:54:25 +0100315 pmic_bus_write(AXP221_PAGE, 0);
Hans de Goedef3fba562014-11-25 16:37:52 +0100316
317 for (i = 0; i < 4; i++)
318 sid[i] = be32_to_cpu(sid[i]);
319
320 return 0;
321}