Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> |
| 3 | * |
Tom Rini | 0b17998 | 2013-07-24 09:34:30 -0400 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0 |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Gabor Juhos | f195749 | 2013-05-22 03:57:44 +0000 | [diff] [blame] | 8 | #include <netdev.h> |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 9 | |
Gabor Juhos | feaa606 | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 10 | #include <asm/addrspace.h> |
Gabor Juhos | 0156431 | 2013-05-22 03:57:38 +0000 | [diff] [blame] | 11 | #include <asm/io.h> |
| 12 | #include <asm/malta.h> |
Gabor Juhos | feaa606 | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 13 | #include <pci_gt64120.h> |
Gabor Juhos | 0156431 | 2013-05-22 03:57:38 +0000 | [diff] [blame] | 14 | |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 15 | phys_size_t initdram(int board_type) |
| 16 | { |
| 17 | return CONFIG_SYS_MEM_SIZE; |
| 18 | } |
| 19 | |
| 20 | int checkboard(void) |
| 21 | { |
| 22 | puts("Board: MIPS Malta CoreLV (Qemu)\n"); |
| 23 | return 0; |
| 24 | } |
Gabor Juhos | 0156431 | 2013-05-22 03:57:38 +0000 | [diff] [blame] | 25 | |
Gabor Juhos | f195749 | 2013-05-22 03:57:44 +0000 | [diff] [blame] | 26 | int board_eth_init(bd_t *bis) |
| 27 | { |
| 28 | return pci_eth_init(bis); |
| 29 | } |
| 30 | |
Gabor Juhos | 0156431 | 2013-05-22 03:57:38 +0000 | [diff] [blame] | 31 | void _machine_restart(void) |
| 32 | { |
| 33 | void __iomem *reset_base; |
| 34 | |
| 35 | reset_base = (void __iomem *)CKSEG1ADDR(MALTA_RESET_BASE); |
| 36 | __raw_writel(GORESET, reset_base); |
| 37 | } |
Gabor Juhos | feaa606 | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 38 | |
| 39 | void pci_init_board(void) |
| 40 | { |
| 41 | set_io_port_base(CKSEG1ADDR(MALTA_IO_PORT_BASE)); |
| 42 | |
| 43 | gt64120_pci_init((void *)CKSEG1ADDR(MALTA_GT_BASE), |
| 44 | 0x00000000, 0x00000000, CONFIG_SYS_MEM_SIZE, |
| 45 | 0x10000000, 0x10000000, 128 * 1024 * 1024, |
| 46 | 0x00000000, 0x00000000, 0x20000); |
| 47 | } |