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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Eric Nelsond67b0d92013-03-11 08:44:53 +00002/*
3 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
4 *
5 * Configuration settings for the Boundary Devices Nitrogen6X
6 * and Freescale i.MX6Q Sabre Lite boards.
Eric Nelsond67b0d92013-03-11 08:44:53 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Eric Nelson02824dc2013-11-26 17:40:30 -070012#include "mx6_common.h"
Eric Nelsond67b0d92013-03-11 08:44:53 +000013
14#define CONFIG_MACH_TYPE 3769
15
Eric Nelsond67b0d92013-03-11 08:44:53 +000016/* Size of malloc() pool */
17#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
18
Troy Kiskyf3d7cff2013-09-25 18:41:18 -070019#define CONFIG_USBD_HS
Eric Nelsond67b0d92013-03-11 08:44:53 +000020
Eric Nelsond67b0d92013-03-11 08:44:53 +000021#define CONFIG_MXC_UART_BASE UART2_BASE
22
Eric Nelsond67b0d92013-03-11 08:44:53 +000023/* I2C Configs */
tremb089d032013-09-21 18:13:36 +020024#define CONFIG_SYS_I2C
25#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020026#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
27#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070028#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Eric Nelsond67b0d92013-03-11 08:44:53 +000029#define CONFIG_SYS_I2C_SPEED 100000
Eric Nelson5dbdc3c2014-10-02 12:16:47 -070030#define CONFIG_I2C_EDID
Eric Nelsond67b0d92013-03-11 08:44:53 +000031
Eric Nelsond67b0d92013-03-11 08:44:53 +000032/* MMC Configs */
Eric Nelsond67b0d92013-03-11 08:44:53 +000033#define CONFIG_SYS_FSL_ESDHC_ADDR 0
34#define CONFIG_SYS_FSL_USDHC_NUM 2
35
Eric Nelsond67b0d92013-03-11 08:44:53 +000036/*
37 * SATA Configs
38 */
39#ifdef CONFIG_CMD_SATA
Eric Nelsond67b0d92013-03-11 08:44:53 +000040#define CONFIG_SYS_SATA_MAX_DEVICE 1
41#define CONFIG_DWC_AHSATA_PORT_ID 0
42#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
43#define CONFIG_LBA48
Eric Nelsond67b0d92013-03-11 08:44:53 +000044#endif
45
Eric Nelsond67b0d92013-03-11 08:44:53 +000046#define CONFIG_FEC_MXC
Eric Nelsond67b0d92013-03-11 08:44:53 +000047#define IMX_FEC_BASE ENET_BASE_ADDR
48#define CONFIG_FEC_XCV_TYPE RGMII
49#define CONFIG_ETHPRIME "FEC"
50#define CONFIG_FEC_MXC_PHYADDR 6
Eric Nelsond67b0d92013-03-11 08:44:53 +000051
52/* USB Configs */
Troy Kiskyd1a52862013-10-10 15:27:59 -070053#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
54#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
Eric Nelsond67b0d92013-03-11 08:44:53 +000055#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
56#define CONFIG_MXC_USB_FLAGS 0
57
Eric Nelsond67b0d92013-03-11 08:44:53 +000058/* Framebuffer and LCD */
Eric Nelson761bc192015-04-16 11:31:33 -070059#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024)
Pardeep Kumar Singla5ea7f0e2013-07-25 12:12:13 -050060#define CONFIG_IMX_HDMI
Eric Benarda47e4492014-04-04 19:05:53 +020061#define CONFIG_IMX_VIDEO_SKIP
Eric Nelsond67b0d92013-03-11 08:44:53 +000062
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +020063#ifdef CONFIG_CMD_MMC
64#define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
Eric Nelsond67b0d92013-03-11 08:44:53 +000065#else
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +020066#define DISTRO_BOOT_DEV_MMC(func)
Eric Nelsond67b0d92013-03-11 08:44:53 +000067#endif
68
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +020069#ifdef CONFIG_CMD_SATA
70#define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0)
Eric Nelsond67b0d92013-03-11 08:44:53 +000071#else
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +020072#define DISTRO_BOOT_DEV_SATA(func)
Eric Nelsond67b0d92013-03-11 08:44:53 +000073#endif
74
Diego Rondini5b7103e2014-10-02 12:16:41 -070075#ifdef CONFIG_USB_STORAGE
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +020076#define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0)
Diego Rondini5b7103e2014-10-02 12:16:41 -070077#else
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +020078#define DISTRO_BOOT_DEV_USB(func)
Diego Rondini5b7103e2014-10-02 12:16:41 -070079#endif
80
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +020081#ifdef CONFIG_CMD_PXE
82#define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na)
83#else
84#define DISTRO_BOOT_DEV_PXE(func)
85#endif
86
87#ifdef CONFIG_CMD_DHCP
88#define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na)
89#else
90#define DISTRO_BOOT_DEV_DHCP(func)
91#endif
92
Eric Nelsond67b0d92013-03-11 08:44:53 +000093
Fabio Estevamf8b1e862013-07-26 11:37:17 -030094#if defined(CONFIG_SABRELITE)
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +020095#define FDTFILE "fdtfile=imx6q-sabrelite.dtb\0"
96#else
97/* FIXME: nitrogen6x covers multiple configs. Define fdtfile for each supported config. */
98#define FDTFILE
99#endif
100
101#define BOOT_TARGET_DEVICES(func) \
102 DISTRO_BOOT_DEV_MMC(func) \
103 DISTRO_BOOT_DEV_SATA(func) \
104 DISTRO_BOOT_DEV_USB(func) \
105 DISTRO_BOOT_DEV_PXE(func) \
106 DISTRO_BOOT_DEV_DHCP(func)
107
108#include <config_distro_bootcmd.h>
Simon Glass1af3c7f2020-05-10 11:40:09 -0600109#include <linux/stringify.h>
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +0200110
Fabio Estevamf8b1e862013-07-26 11:37:17 -0300111#define CONFIG_EXTRA_ENV_SETTINGS \
Fabio Estevamf8b1e862013-07-26 11:37:17 -0300112 "console=ttymxc1\0" \
113 "fdt_high=0xffffffff\0" \
114 "initrd_high=0xffffffff\0" \
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +0200115 "fdt_addr_r=0x18000000\0" \
116 FDTFILE \
117 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
118 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
119 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
120 "ramdisk_addr_r=0x13000000\0" \
121 "ramdiskaddr=0x13000000\0" \
Fabio Estevamf8b1e862013-07-26 11:37:17 -0300122 "ip_dyn=yes\0" \
Gary Bisson1c3e62d2017-01-12 12:18:44 +0100123 "usb_pgood_delay=2000\0" \
Guillaume GARDETcc5d7dc2018-04-18 17:04:58 +0200124 BOOTENV
Fabio Estevamf8b1e862013-07-26 11:37:17 -0300125
Eric Nelsond67b0d92013-03-11 08:44:53 +0000126/* Miscellaneous configurable options */
Eric Nelsond67b0d92013-03-11 08:44:53 +0000127
Eric Nelsond67b0d92013-03-11 08:44:53 +0000128/* Physical Memory Map */
Eric Nelsond67b0d92013-03-11 08:44:53 +0000129#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
130
131#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
132#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
133#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
134
135#define CONFIG_SYS_INIT_SP_OFFSET \
136 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
137#define CONFIG_SYS_INIT_SP_ADDR \
138 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
139
Peter Robinson056845c2015-05-22 17:30:45 +0100140/* Environment organization */
Eric Nelsond67b0d92013-03-11 08:44:53 +0000141
Marek Vasut147f8fa2013-12-14 05:55:29 +0100142/*
143 * PCI express
144 */
Marek Vasut147f8fa2013-12-14 05:55:29 +0100145#ifdef CONFIG_CMD_PCI
Marek Vasut147f8fa2013-12-14 05:55:29 +0100146#define CONFIG_PCI_SCAN_SHOW
147#define CONFIG_PCIE_IMX
148#endif
149
Eric Nelsond67b0d92013-03-11 08:44:53 +0000150#endif /* __CONFIG_H */