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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Heiko Schocher4ce5a722009-07-20 09:59:37 +02002/*
Albert Aribaud306563a2010-08-27 18:26:05 +02003 * Driver for the TWSI (i2c) controller found on the Marvell
4 * orion5x and kirkwood SoC families.
Heiko Schocher4ce5a722009-07-20 09:59:37 +02005 *
Albert ARIBAUD57b4bce2011-04-22 19:41:02 +02006 * Author: Albert Aribaud <albert.u.boot@aribaud.net>
Albert Aribaud306563a2010-08-27 18:26:05 +02007 * Copyright (c) 2010 Albert Aribaud.
Heiko Schocher4ce5a722009-07-20 09:59:37 +02008 */
Albert Aribaud306563a2010-08-27 18:26:05 +02009
Heiko Schocher4ce5a722009-07-20 09:59:37 +020010#include <common.h>
11#include <i2c.h>
Masahiro Yamada1221ce42016-09-21 11:28:55 +090012#include <linux/errno.h>
Heiko Schocher4ce5a722009-07-20 09:59:37 +020013#include <asm/io.h>
Baruch Siach173ec352018-06-07 12:38:10 +030014#include <linux/bitops.h>
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +020015#include <linux/compat.h>
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +020016#ifdef CONFIG_DM_I2C
17#include <dm.h>
18#endif
19
20DECLARE_GLOBAL_DATA_PTR;
Heiko Schocher4ce5a722009-07-20 09:59:37 +020021
Heiko Schocher4ce5a722009-07-20 09:59:37 +020022/*
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +020023 * Include a file that will provide CONFIG_I2C_MVTWSI_BASE*, and possibly other
24 * settings
Heiko Schocher4ce5a722009-07-20 09:59:37 +020025 */
26
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +020027#ifndef CONFIG_DM_I2C
Trevor Woernerb16a3312020-05-06 08:02:38 -040028#if defined(CONFIG_ARCH_ORION5X)
Albert Aribaud306563a2010-08-27 18:26:05 +020029#include <asm/arch/orion5x.h>
Trevor Woernerbb0fb4c2020-05-06 08:02:40 -040030#elif (defined(CONFIG_ARCH_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
Stefan Roese3dc23f72014-10-22 12:13:06 +020031#include <asm/arch/soc.h>
Jagan Tekiaec9a0f2016-10-13 14:19:35 +053032#elif defined(CONFIG_ARCH_SUNXI)
Hans de Goede66203772014-06-13 22:55:49 +020033#include <asm/arch/i2c.h>
Albert Aribaud306563a2010-08-27 18:26:05 +020034#else
35#error Driver mvtwsi not supported by SoC or board
36#endif
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +020037#endif /* CONFIG_DM_I2C */
Albert Aribaud306563a2010-08-27 18:26:05 +020038
39/*
Jernej Skrabeca8f01cc2017-04-27 00:03:36 +020040 * On SUNXI, we get CONFIG_SYS_TCLK from this include, so we want to
41 * always have it.
42 */
43#if defined(CONFIG_DM_I2C) && defined(CONFIG_ARCH_SUNXI)
44#include <asm/arch/i2c.h>
45#endif
46
47/*
Albert Aribaud306563a2010-08-27 18:26:05 +020048 * TWSI register structure
49 */
50
Jagan Tekiaec9a0f2016-10-13 14:19:35 +053051#ifdef CONFIG_ARCH_SUNXI
Hans de Goede66203772014-06-13 22:55:49 +020052
53struct mvtwsi_registers {
54 u32 slave_address;
55 u32 xtnd_slave_addr;
56 u32 data;
57 u32 control;
58 u32 status;
59 u32 baudrate;
60 u32 soft_reset;
Baruch Siach173ec352018-06-07 12:38:10 +030061 u32 debug; /* Dummy field for build compatibility with mvebu */
Hans de Goede66203772014-06-13 22:55:49 +020062};
63
64#else
65
Albert Aribaud306563a2010-08-27 18:26:05 +020066struct mvtwsi_registers {
67 u32 slave_address;
68 u32 data;
69 u32 control;
70 union {
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +020071 u32 status; /* When reading */
72 u32 baudrate; /* When writing */
Albert Aribaud306563a2010-08-27 18:26:05 +020073 };
74 u32 xtnd_slave_addr;
Baruch Siach173ec352018-06-07 12:38:10 +030075 u32 reserved0[2];
Albert Aribaud306563a2010-08-27 18:26:05 +020076 u32 soft_reset;
Baruch Siach173ec352018-06-07 12:38:10 +030077 u32 reserved1[27];
78 u32 debug;
Albert Aribaud306563a2010-08-27 18:26:05 +020079};
80
Hans de Goede66203772014-06-13 22:55:49 +020081#endif
82
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +020083#ifdef CONFIG_DM_I2C
84struct mvtwsi_i2c_dev {
85 /* TWSI Register base for the device */
86 struct mvtwsi_registers *base;
87 /* Number of the device (determined from cell-index property) */
88 int index;
89 /* The I2C slave address for the device */
90 u8 slaveadd;
91 /* The configured I2C speed in Hz */
92 uint speed;
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +020093 /* The current length of a clock period (depending on speed) */
94 uint tick;
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +020095};
96#endif /* CONFIG_DM_I2C */
97
Albert Aribaud306563a2010-08-27 18:26:05 +020098/*
mario.six@gdsys.ccdfc39582016-07-21 11:57:02 +020099 * enum mvtwsi_ctrl_register_fields - Bit masks for flags in the control
100 * register
Albert Aribaud306563a2010-08-27 18:26:05 +0200101 */
mario.six@gdsys.ccdfc39582016-07-21 11:57:02 +0200102enum mvtwsi_ctrl_register_fields {
103 /* Acknowledge bit */
104 MVTWSI_CONTROL_ACK = 0x00000004,
105 /* Interrupt flag */
106 MVTWSI_CONTROL_IFLG = 0x00000008,
107 /* Stop bit */
108 MVTWSI_CONTROL_STOP = 0x00000010,
109 /* Start bit */
110 MVTWSI_CONTROL_START = 0x00000020,
111 /* I2C enable */
112 MVTWSI_CONTROL_TWSIEN = 0x00000040,
113 /* Interrupt enable */
114 MVTWSI_CONTROL_INTEN = 0x00000080,
115};
Albert Aribaud306563a2010-08-27 18:26:05 +0200116
117/*
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200118 * On sun6i and newer, IFLG is a write-clear bit, which is cleared by writing 1;
119 * on other platforms, it is a normal r/w bit, which is cleared by writing 0.
Hans de Goede904dfbf2016-01-14 14:06:25 +0100120 */
121
122#ifdef CONFIG_SUNXI_GEN_SUN6I
123#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000008
124#else
125#define MVTWSI_CONTROL_CLEAR_IFLG 0x00000000
126#endif
127
128/*
mario.six@gdsys.ccdfc39582016-07-21 11:57:02 +0200129 * enum mvstwsi_status_values - Possible values of I2C controller's status
130 * register
131 *
132 * Only those statuses expected in normal master operation on
133 * non-10-bit-address devices are specified.
134 *
135 * Every status that's unexpected during normal operation (bus errors,
136 * arbitration losses, missing ACKs...) is passed back to the caller as an error
Albert Aribaud306563a2010-08-27 18:26:05 +0200137 * code.
138 */
mario.six@gdsys.ccdfc39582016-07-21 11:57:02 +0200139enum mvstwsi_status_values {
140 /* START condition transmitted */
141 MVTWSI_STATUS_START = 0x08,
142 /* Repeated START condition transmitted */
143 MVTWSI_STATUS_REPEATED_START = 0x10,
144 /* Address + write bit transmitted, ACK received */
145 MVTWSI_STATUS_ADDR_W_ACK = 0x18,
146 /* Data transmitted, ACK received */
147 MVTWSI_STATUS_DATA_W_ACK = 0x28,
148 /* Address + read bit transmitted, ACK received */
149 MVTWSI_STATUS_ADDR_R_ACK = 0x40,
150 /* Address + read bit transmitted, ACK not received */
151 MVTWSI_STATUS_ADDR_R_NAK = 0x48,
152 /* Data received, ACK transmitted */
153 MVTWSI_STATUS_DATA_R_ACK = 0x50,
154 /* Data received, ACK not transmitted */
155 MVTWSI_STATUS_DATA_R_NAK = 0x58,
156 /* No relevant status */
157 MVTWSI_STATUS_IDLE = 0xF8,
158};
Albert Aribaud306563a2010-08-27 18:26:05 +0200159
160/*
mario.six@gdsys.cc670514f2016-07-21 11:57:04 +0200161 * enum mvstwsi_ack_flags - Determine whether a read byte should be
162 * acknowledged or not.
163 */
164enum mvtwsi_ack_flags {
165 /* Send NAK after received byte */
166 MVTWSI_READ_NAK = 0,
167 /* Send ACK after received byte */
168 MVTWSI_READ_ACK = 1,
169};
170
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200171/*
172 * calc_tick() - Calculate the duration of a clock cycle from the I2C speed
173 *
174 * @speed: The speed in Hz to calculate the clock cycle duration for.
175 * @return The duration of a clock cycle in ns.
176 */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200177inline uint calc_tick(uint speed)
178{
179 /* One tick = the duration of a period at the specified speed in ns (we
180 * add 100 ns to be on the safe side) */
181 return (1000000000u / speed) + 100;
182}
183
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200184#ifndef CONFIG_DM_I2C
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200185
mario.six@gdsys.cc670514f2016-07-21 11:57:04 +0200186/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200187 * twsi_get_base() - Get controller register base for specified adapter
188 *
189 * @adap: Adapter to get the register base for.
190 * @return Register base for the specified adapter.
Albert Aribaud306563a2010-08-27 18:26:05 +0200191 */
Paul Kocialkowskidd822422015-04-10 23:09:51 +0200192static struct mvtwsi_registers *twsi_get_base(struct i2c_adapter *adap)
193{
194 switch (adap->hwadapnr) {
195#ifdef CONFIG_I2C_MVTWSI_BASE0
196 case 0:
mario.six@gdsys.cc9ec43b02016-07-21 11:57:01 +0200197 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE0;
Paul Kocialkowskidd822422015-04-10 23:09:51 +0200198#endif
199#ifdef CONFIG_I2C_MVTWSI_BASE1
200 case 1:
mario.six@gdsys.cc9ec43b02016-07-21 11:57:01 +0200201 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE1;
Paul Kocialkowskidd822422015-04-10 23:09:51 +0200202#endif
203#ifdef CONFIG_I2C_MVTWSI_BASE2
204 case 2:
mario.six@gdsys.cc9ec43b02016-07-21 11:57:01 +0200205 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE2;
Paul Kocialkowskidd822422015-04-10 23:09:51 +0200206#endif
207#ifdef CONFIG_I2C_MVTWSI_BASE3
208 case 3:
mario.six@gdsys.cc9ec43b02016-07-21 11:57:01 +0200209 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE3;
Paul Kocialkowskidd822422015-04-10 23:09:51 +0200210#endif
211#ifdef CONFIG_I2C_MVTWSI_BASE4
212 case 4:
mario.six@gdsys.cc9ec43b02016-07-21 11:57:01 +0200213 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE4;
Paul Kocialkowskidd822422015-04-10 23:09:51 +0200214#endif
Jelle van der Waa9d082682016-01-14 14:06:26 +0100215#ifdef CONFIG_I2C_MVTWSI_BASE5
216 case 5:
mario.six@gdsys.cc9ec43b02016-07-21 11:57:01 +0200217 return (struct mvtwsi_registers *)CONFIG_I2C_MVTWSI_BASE5;
Jelle van der Waa9d082682016-01-14 14:06:26 +0100218#endif
Paul Kocialkowskidd822422015-04-10 23:09:51 +0200219 default:
220 printf("Missing mvtwsi controller %d base\n", adap->hwadapnr);
221 break;
222 }
223
224 return NULL;
225}
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200226#endif
Albert Aribaud306563a2010-08-27 18:26:05 +0200227
228/*
mario.six@gdsys.ccdfc39582016-07-21 11:57:02 +0200229 * enum mvtwsi_error_class - types of I2C errors
Albert Aribaud306563a2010-08-27 18:26:05 +0200230 */
mario.six@gdsys.ccdfc39582016-07-21 11:57:02 +0200231enum mvtwsi_error_class {
232 /* The controller returned a different status than expected */
233 MVTWSI_ERROR_WRONG_STATUS = 0x01,
234 /* The controller timed out */
235 MVTWSI_ERROR_TIMEOUT = 0x02,
236};
Albert Aribaud306563a2010-08-27 18:26:05 +0200237
mario.six@gdsys.ccdfc39582016-07-21 11:57:02 +0200238/*
239 * mvtwsi_error() - Build I2C return code from error information
240 *
241 * For debugging purposes, this function packs some information of an occurred
242 * error into a return code. These error codes are returned from I2C API
243 * functions (i2c_{read,write}, dm_i2c_{read,write}, etc.).
244 *
245 * @ec: The error class of the error (enum mvtwsi_error_class).
246 * @lc: The last value of the control register.
247 * @ls: The last value of the status register.
248 * @es: The expected value of the status register.
249 * @return The generated error code.
250 */
251inline uint mvtwsi_error(uint ec, uint lc, uint ls, uint es)
252{
253 return ((ec << 24) & 0xFF000000)
254 | ((lc << 16) & 0x00FF0000)
255 | ((ls << 8) & 0x0000FF00)
256 | (es & 0xFF);
257}
Albert Aribaud306563a2010-08-27 18:26:05 +0200258
259/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200260 * twsi_wait() - Wait for I2C bus interrupt flag and check status, or time out.
261 *
262 * @return Zero if status is as expected, or a non-zero code if either a time
263 * out occurred, or the status was not the expected one.
Albert Aribaud306563a2010-08-27 18:26:05 +0200264 */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200265static int twsi_wait(struct mvtwsi_registers *twsi, int expected_status,
266 uint tick)
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200267{
Albert Aribaud306563a2010-08-27 18:26:05 +0200268 int control, status;
269 int timeout = 1000;
270
271 do {
272 control = readl(&twsi->control);
273 if (control & MVTWSI_CONTROL_IFLG) {
Marek Behúnd50e2962019-05-02 16:53:38 +0200274 /*
275 * On Armada 38x it seems that the controller works as
276 * if it first set the MVTWSI_CONTROL_IFLAG in the
277 * control register and only after that it changed the
278 * status register.
279 * This sometimes caused weird bugs which only appeared
280 * on selected I2C speeds and even then only sometimes.
281 * We therefore add here a simple ndealy(100), which
282 * seems to fix this weird bug.
283 */
284 ndelay(100);
Albert Aribaud306563a2010-08-27 18:26:05 +0200285 status = readl(&twsi->status);
286 if (status == expected_status)
287 return 0;
288 else
mario.six@gdsys.ccdfc39582016-07-21 11:57:02 +0200289 return mvtwsi_error(
Albert Aribaud306563a2010-08-27 18:26:05 +0200290 MVTWSI_ERROR_WRONG_STATUS,
291 control, status, expected_status);
292 }
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200293 ndelay(tick); /* One clock cycle */
Albert Aribaud306563a2010-08-27 18:26:05 +0200294 } while (timeout--);
295 status = readl(&twsi->status);
mario.six@gdsys.ccdfc39582016-07-21 11:57:02 +0200296 return mvtwsi_error(MVTWSI_ERROR_TIMEOUT, control, status,
297 expected_status);
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200298}
299
Albert Aribaud306563a2010-08-27 18:26:05 +0200300/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200301 * twsi_start() - Assert a START condition on the bus.
302 *
303 * This function is used in both single I2C transactions and inside
304 * back-to-back transactions (repeated starts).
305 *
306 * @twsi: The MVTWSI register structure to use.
307 * @expected_status: The I2C bus status expected to be asserted after the
308 * operation completion.
309 * @tick: The duration of a clock cycle at the current I2C speed.
310 * @return Zero if status is as expected, or a non-zero code if either a time
311 * out occurred or the status was not the expected one.
Albert Aribaud306563a2010-08-27 18:26:05 +0200312 */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200313static int twsi_start(struct mvtwsi_registers *twsi, int expected_status,
314 uint tick)
Albert Aribaud306563a2010-08-27 18:26:05 +0200315{
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200316 /* Assert START */
mario.six@gdsys.cc670514f2016-07-21 11:57:04 +0200317 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_START |
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200318 MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
319 /* Wait for controller to process START */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200320 return twsi_wait(twsi, expected_status, tick);
Albert Aribaud306563a2010-08-27 18:26:05 +0200321}
322
323/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200324 * twsi_send() - Send a byte on the I2C bus.
325 *
326 * The byte may be part of an address byte or data.
327 *
328 * @twsi: The MVTWSI register structure to use.
329 * @byte: The byte to send.
330 * @expected_status: The I2C bus status expected to be asserted after the
331 * operation completion.
332 * @tick: The duration of a clock cycle at the current I2C speed.
333 * @return Zero if status is as expected, or a non-zero code if either a time
334 * out occurred or the status was not the expected one.
Albert Aribaud306563a2010-08-27 18:26:05 +0200335 */
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200336static int twsi_send(struct mvtwsi_registers *twsi, u8 byte,
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200337 int expected_status, uint tick)
Albert Aribaud306563a2010-08-27 18:26:05 +0200338{
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200339 /* Write byte to data register for sending */
Albert Aribaud306563a2010-08-27 18:26:05 +0200340 writel(byte, &twsi->data);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200341 /* Clear any pending interrupt -- that will cause sending */
mario.six@gdsys.cc670514f2016-07-21 11:57:04 +0200342 writel(MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_CLEAR_IFLG,
343 &twsi->control);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200344 /* Wait for controller to receive byte, and check ACK */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200345 return twsi_wait(twsi, expected_status, tick);
Albert Aribaud306563a2010-08-27 18:26:05 +0200346}
347
348/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200349 * twsi_recv() - Receive a byte on the I2C bus.
350 *
351 * The static variable mvtwsi_control_flags controls whether we ack or nak.
352 *
353 * @twsi: The MVTWSI register structure to use.
354 * @byte: The byte to send.
355 * @ack_flag: Flag that determines whether the received byte should
356 * be acknowledged by the controller or not (sent ACK/NAK).
357 * @tick: The duration of a clock cycle at the current I2C speed.
358 * @return Zero if status is as expected, or a non-zero code if either a time
359 * out occurred or the status was not the expected one.
Albert Aribaud306563a2010-08-27 18:26:05 +0200360 */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200361static int twsi_recv(struct mvtwsi_registers *twsi, u8 *byte, int ack_flag,
362 uint tick)
Albert Aribaud306563a2010-08-27 18:26:05 +0200363{
mario.six@gdsys.cc670514f2016-07-21 11:57:04 +0200364 int expected_status, status, control;
Albert Aribaud306563a2010-08-27 18:26:05 +0200365
mario.six@gdsys.cc670514f2016-07-21 11:57:04 +0200366 /* Compute expected status based on passed ACK flag */
367 expected_status = ack_flag ? MVTWSI_STATUS_DATA_R_ACK :
368 MVTWSI_STATUS_DATA_R_NAK;
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200369 /* Acknowledge *previous state*, and launch receive */
mario.six@gdsys.cc670514f2016-07-21 11:57:04 +0200370 control = MVTWSI_CONTROL_TWSIEN;
371 control |= ack_flag == MVTWSI_READ_ACK ? MVTWSI_CONTROL_ACK : 0;
372 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200373 /* Wait for controller to receive byte, and assert ACK or NAK */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200374 status = twsi_wait(twsi, expected_status, tick);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200375 /* If we did receive the expected byte, store it */
Albert Aribaud306563a2010-08-27 18:26:05 +0200376 if (status == 0)
377 *byte = readl(&twsi->data);
Albert Aribaud306563a2010-08-27 18:26:05 +0200378 return status;
379}
380
381/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200382 * twsi_stop() - Assert a STOP condition on the bus.
383 *
384 * This function is also used to force the bus back to idle state (SDA =
385 * SCL = 1).
386 *
387 * @twsi: The MVTWSI register structure to use.
388 * @tick: The duration of a clock cycle at the current I2C speed.
389 * @return Zero if the operation succeeded, or a non-zero code if a time out
390 * occurred.
Albert Aribaud306563a2010-08-27 18:26:05 +0200391 */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200392static int twsi_stop(struct mvtwsi_registers *twsi, uint tick)
Albert Aribaud306563a2010-08-27 18:26:05 +0200393{
394 int control, stop_status;
mario.six@gdsys.cc059fce92016-07-21 11:57:05 +0200395 int status = 0;
Albert Aribaud306563a2010-08-27 18:26:05 +0200396 int timeout = 1000;
397
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200398 /* Assert STOP */
Albert Aribaud306563a2010-08-27 18:26:05 +0200399 control = MVTWSI_CONTROL_TWSIEN | MVTWSI_CONTROL_STOP;
Hans de Goede904dfbf2016-01-14 14:06:25 +0100400 writel(control | MVTWSI_CONTROL_CLEAR_IFLG, &twsi->control);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200401 /* Wait for IDLE; IFLG won't rise, so we can't use twsi_wait() */
Albert Aribaud306563a2010-08-27 18:26:05 +0200402 do {
403 stop_status = readl(&twsi->status);
404 if (stop_status == MVTWSI_STATUS_IDLE)
405 break;
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200406 ndelay(tick); /* One clock cycle */
Albert Aribaud306563a2010-08-27 18:26:05 +0200407 } while (timeout--);
408 control = readl(&twsi->control);
409 if (stop_status != MVTWSI_STATUS_IDLE)
mario.six@gdsys.cc059fce92016-07-21 11:57:05 +0200410 status = mvtwsi_error(MVTWSI_ERROR_TIMEOUT,
411 control, status, MVTWSI_STATUS_IDLE);
Albert Aribaud306563a2010-08-27 18:26:05 +0200412 return status;
413}
414
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200415/*
416 * twsi_calc_freq() - Compute I2C frequency depending on m and n parameters.
417 *
418 * @n: Parameter 'n' for the frequency calculation algorithm.
419 * @m: Parameter 'm' for the frequency calculation algorithm.
420 * @return The I2C frequency corresponding to the passed m and n parameters.
421 */
mario.six@gdsys.cce0758282016-07-21 11:57:06 +0200422static uint twsi_calc_freq(const int n, const int m)
Stefan Roesef582a152015-03-18 09:30:54 +0100423{
Jagan Tekiaec9a0f2016-10-13 14:19:35 +0530424#ifdef CONFIG_ARCH_SUNXI
Stefan Roesef582a152015-03-18 09:30:54 +0100425 return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
426#else
427 return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));
428#endif
429}
Albert Aribaud306563a2010-08-27 18:26:05 +0200430
431/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200432 * twsi_reset() - Reset the I2C controller.
433 *
434 * Resetting the controller also resets the baud rate and slave address, hence
435 * they must be re-established after the reset.
436 *
437 * @twsi: The MVTWSI register structure to use.
Albert Aribaud306563a2010-08-27 18:26:05 +0200438 */
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200439static void twsi_reset(struct mvtwsi_registers *twsi)
Albert Aribaud306563a2010-08-27 18:26:05 +0200440{
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200441 /* Reset controller */
Albert Aribaud306563a2010-08-27 18:26:05 +0200442 writel(0, &twsi->soft_reset);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200443 /* Wait 2 ms -- this is what the Marvell LSP does */
Albert Aribaud306563a2010-08-27 18:26:05 +0200444 udelay(20000);
Albert Aribaud306563a2010-08-27 18:26:05 +0200445}
446
447/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200448 * __twsi_i2c_set_bus_speed() - Set the speed of the I2C controller.
449 *
450 * This function sets baud rate to the highest possible value that does not
451 * exceed the requested rate.
452 *
453 * @twsi: The MVTWSI register structure to use.
454 * @requested_speed: The desired frequency the controller should run at
455 * in Hz.
456 * @return The actual frequency the controller was configured to.
Albert Aribaud306563a2010-08-27 18:26:05 +0200457 */
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200458static uint __twsi_i2c_set_bus_speed(struct mvtwsi_registers *twsi,
mario.six@gdsys.cc61bc02b2016-07-21 11:57:07 +0200459 uint requested_speed)
Albert Aribaud306563a2010-08-27 18:26:05 +0200460{
mario.six@gdsys.cce0758282016-07-21 11:57:06 +0200461 uint tmp_speed, highest_speed, n, m;
462 uint baud = 0x44; /* Baud rate after controller reset */
Albert Aribaud306563a2010-08-27 18:26:05 +0200463
Albert Aribaud306563a2010-08-27 18:26:05 +0200464 highest_speed = 0;
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200465 /* Successively try m, n combinations, and use the combination
466 * resulting in the largest speed that's not above the requested
467 * speed */
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200468 for (n = 0; n < 8; n++) {
469 for (m = 0; m < 16; m++) {
Stefan Roesef582a152015-03-18 09:30:54 +0100470 tmp_speed = twsi_calc_freq(n, m);
mario.six@gdsys.cc9ec43b02016-07-21 11:57:01 +0200471 if ((tmp_speed <= requested_speed) &&
472 (tmp_speed > highest_speed)) {
Albert Aribaud306563a2010-08-27 18:26:05 +0200473 highest_speed = tmp_speed;
474 baud = (m << 3) | n;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200475 }
476 }
477 }
Hans de Goede0db2bbd2014-06-13 22:55:48 +0200478 writel(baud, &twsi->baudrate);
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200479
480 /* Wait for controller for one tick */
481#ifdef CONFIG_DM_I2C
482 ndelay(calc_tick(highest_speed));
483#else
484 ndelay(10000);
485#endif
486 return highest_speed;
Hans de Goede0db2bbd2014-06-13 22:55:48 +0200487}
488
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200489/*
490 * __twsi_i2c_init() - Initialize the I2C controller.
491 *
492 * @twsi: The MVTWSI register structure to use.
493 * @speed: The initial frequency the controller should run at
494 * in Hz.
495 * @slaveadd: The I2C address to be set for the I2C master.
496 * @actual_speed: A output parameter that receives the actual frequency
497 * in Hz the controller was set to by the function.
498 * @return Zero if the operation succeeded, or a non-zero code if a time out
499 * occurred.
500 */
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200501static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200502 int slaveadd, uint *actual_speed)
Hans de Goede0db2bbd2014-06-13 22:55:48 +0200503{
Stefan Mavrodiev004b4cd2018-02-13 09:27:40 +0200504 uint tmp_speed;
505
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200506 /* Reset controller */
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200507 twsi_reset(twsi);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200508 /* Set speed */
Stefan Mavrodiev004b4cd2018-02-13 09:27:40 +0200509 tmp_speed = __twsi_i2c_set_bus_speed(twsi, speed);
Heinrich Schuchardt8bcf12c2018-01-31 00:57:17 +0100510 if (actual_speed)
Stefan Mavrodiev004b4cd2018-02-13 09:27:40 +0200511 *actual_speed = tmp_speed;
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200512 /* Set slave address; even though we don't use it */
Hans de Goede0db2bbd2014-06-13 22:55:48 +0200513 writel(slaveadd, &twsi->slave_address);
514 writel(0, &twsi->xtnd_slave_addr);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200515 /* Assert STOP, but don't care for the result */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200516#ifdef CONFIG_DM_I2C
517 (void) twsi_stop(twsi, calc_tick(*actual_speed));
518#else
519 (void) twsi_stop(twsi, 10000);
520#endif
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200521}
522
Albert Aribaud306563a2010-08-27 18:26:05 +0200523/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200524 * i2c_begin() - Start a I2C transaction.
525 *
526 * Begin a I2C transaction with a given expected start status and chip address.
527 * A START is asserted, and the address byte is sent to the I2C controller. The
528 * expected address status will be derived from the direction bit (bit 0) of
529 * the address byte.
530 *
531 * @twsi: The MVTWSI register structure to use.
532 * @expected_start_status: The I2C status the controller is expected to
533 * assert after the address byte was sent.
534 * @addr: The address byte to be sent.
535 * @tick: The duration of a clock cycle at the current
536 * I2C speed.
537 * @return Zero if the operation succeeded, or a non-zero code if a time out or
538 * unexpected I2C status occurred.
Albert Aribaud306563a2010-08-27 18:26:05 +0200539 */
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200540static int i2c_begin(struct mvtwsi_registers *twsi, int expected_start_status,
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200541 u8 addr, uint tick)
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200542{
Albert Aribaud306563a2010-08-27 18:26:05 +0200543 int status, expected_addr_status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200544
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200545 /* Compute the expected address status from the direction bit in
546 * the address byte */
547 if (addr & 1) /* Reading */
Albert Aribaud306563a2010-08-27 18:26:05 +0200548 expected_addr_status = MVTWSI_STATUS_ADDR_R_ACK;
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200549 else /* Writing */
Albert Aribaud306563a2010-08-27 18:26:05 +0200550 expected_addr_status = MVTWSI_STATUS_ADDR_W_ACK;
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200551 /* Assert START */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200552 status = twsi_start(twsi, expected_start_status, tick);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200553 /* Send out the address if the start went well */
Albert Aribaud306563a2010-08-27 18:26:05 +0200554 if (status == 0)
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200555 status = twsi_send(twsi, addr, expected_addr_status, tick);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200556 /* Return 0, or the status of the first failure */
Albert Aribaud306563a2010-08-27 18:26:05 +0200557 return status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200558}
559
Albert Aribaud306563a2010-08-27 18:26:05 +0200560/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200561 * __twsi_i2c_probe_chip() - Probe the given I2C chip address.
562 *
563 * This function begins a I2C read transaction, does a dummy read and NAKs; if
564 * the procedure succeeds, the chip is considered to be present.
565 *
566 * @twsi: The MVTWSI register structure to use.
567 * @chip: The chip address to probe.
568 * @tick: The duration of a clock cycle at the current I2C speed.
569 * @return Zero if the operation succeeded, or a non-zero code if a time out or
570 * unexpected I2C status occurred.
Albert Aribaud306563a2010-08-27 18:26:05 +0200571 */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200572static int __twsi_i2c_probe_chip(struct mvtwsi_registers *twsi, uchar chip,
573 uint tick)
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200574{
Albert Aribaud306563a2010-08-27 18:26:05 +0200575 u8 dummy_byte;
576 int status;
577
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200578 /* Begin i2c read */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200579 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1) | 1, tick);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200580 /* Dummy read was accepted: receive byte, but NAK it. */
Albert Aribaud306563a2010-08-27 18:26:05 +0200581 if (status == 0)
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200582 status = twsi_recv(twsi, &dummy_byte, MVTWSI_READ_NAK, tick);
Albert Aribaud306563a2010-08-27 18:26:05 +0200583 /* Stop transaction */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200584 twsi_stop(twsi, tick);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200585 /* Return 0, or the status of the first failure */
Albert Aribaud306563a2010-08-27 18:26:05 +0200586 return status;
587}
588
589/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200590 * __twsi_i2c_read() - Read data from a I2C chip.
591 *
592 * This function begins a I2C write transaction, and transmits the address
593 * bytes; then begins a I2C read transaction, and receives the data bytes.
Albert Aribaud306563a2010-08-27 18:26:05 +0200594 *
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200595 * NOTE: Some devices want a stop right before the second start, while some
596 * will choke if it is there. Since deciding this is not yet supported in
597 * higher level APIs, we need to make a decision here, and for the moment that
598 * will be a repeated start without a preceding stop.
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200599 *
600 * @twsi: The MVTWSI register structure to use.
601 * @chip: The chip address to read from.
602 * @addr: The address bytes to send.
603 * @alen: The length of the address bytes in bytes.
604 * @data: The buffer to receive the data read from the chip (has to have
605 * a size of at least 'length' bytes).
606 * @length: The amount of data to be read from the chip in bytes.
607 * @tick: The duration of a clock cycle at the current I2C speed.
608 * @return Zero if the operation succeeded, or a non-zero code if a time out or
609 * unexpected I2C status occurred.
Albert Aribaud306563a2010-08-27 18:26:05 +0200610 */
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200611static int __twsi_i2c_read(struct mvtwsi_registers *twsi, uchar chip,
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200612 u8 *addr, int alen, uchar *data, int length,
613 uint tick)
Albert Aribaud306563a2010-08-27 18:26:05 +0200614{
mario.six@gdsys.cc059fce92016-07-21 11:57:05 +0200615 int status = 0;
616 int stop_status;
mario.six@gdsys.cc24f9c6b2016-07-21 11:57:11 +0200617 int expected_start = MVTWSI_STATUS_START;
Albert Aribaud306563a2010-08-27 18:26:05 +0200618
mario.six@gdsys.cc24f9c6b2016-07-21 11:57:11 +0200619 if (alen > 0) {
620 /* Begin i2c write to send the address bytes */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200621 status = i2c_begin(twsi, expected_start, (chip << 1), tick);
mario.six@gdsys.cc24f9c6b2016-07-21 11:57:11 +0200622 /* Send address bytes */
623 while ((status == 0) && alen--)
Stefan Roese03d6cd92016-08-25 15:20:01 +0200624 status = twsi_send(twsi, addr[alen],
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200625 MVTWSI_STATUS_DATA_W_ACK, tick);
mario.six@gdsys.cc24f9c6b2016-07-21 11:57:11 +0200626 /* Send repeated STARTs after the initial START */
627 expected_start = MVTWSI_STATUS_REPEATED_START;
628 }
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200629 /* Begin i2c read to receive data bytes */
Albert Aribaud306563a2010-08-27 18:26:05 +0200630 if (status == 0)
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200631 status = i2c_begin(twsi, expected_start, (chip << 1) | 1, tick);
mario.six@gdsys.cc670514f2016-07-21 11:57:04 +0200632 /* Receive actual data bytes; set NAK if we if we have nothing more to
633 * read */
634 while ((status == 0) && length--)
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200635 status = twsi_recv(twsi, data++,
mario.six@gdsys.cc670514f2016-07-21 11:57:04 +0200636 length > 0 ?
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200637 MVTWSI_READ_ACK : MVTWSI_READ_NAK, tick);
Albert Aribaud306563a2010-08-27 18:26:05 +0200638 /* Stop transaction */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200639 stop_status = twsi_stop(twsi, tick);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200640 /* Return 0, or the status of the first failure */
mario.six@gdsys.cc059fce92016-07-21 11:57:05 +0200641 return status != 0 ? status : stop_status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200642}
643
Albert Aribaud306563a2010-08-27 18:26:05 +0200644/*
mario.six@gdsys.cc6e677ca2016-07-21 11:57:13 +0200645 * __twsi_i2c_write() - Send data to a I2C chip.
646 *
647 * This function begins a I2C write transaction, and transmits the address
648 * bytes; then begins a new I2C write transaction, and sends the data bytes.
649 *
650 * @twsi: The MVTWSI register structure to use.
651 * @chip: The chip address to read from.
652 * @addr: The address bytes to send.
653 * @alen: The length of the address bytes in bytes.
654 * @data: The buffer containing the data to be sent to the chip.
655 * @length: The length of data to be sent to the chip in bytes.
656 * @tick: The duration of a clock cycle at the current I2C speed.
657 * @return Zero if the operation succeeded, or a non-zero code if a time out or
658 * unexpected I2C status occurred.
Albert Aribaud306563a2010-08-27 18:26:05 +0200659 */
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200660static int __twsi_i2c_write(struct mvtwsi_registers *twsi, uchar chip,
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200661 u8 *addr, int alen, uchar *data, int length,
662 uint tick)
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200663{
mario.six@gdsys.cc059fce92016-07-21 11:57:05 +0200664 int status, stop_status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200665
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200666 /* Begin i2c write to send first the address bytes, then the
667 * data bytes */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200668 status = i2c_begin(twsi, MVTWSI_STATUS_START, (chip << 1), tick);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200669 /* Send address bytes */
mario.six@gdsys.ccf8a10ed2016-07-21 11:57:09 +0200670 while ((status == 0) && (alen-- > 0))
Stefan Roese03d6cd92016-08-25 15:20:01 +0200671 status = twsi_send(twsi, addr[alen], MVTWSI_STATUS_DATA_W_ACK,
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200672 tick);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200673 /* Send data bytes */
Albert Aribaud306563a2010-08-27 18:26:05 +0200674 while ((status == 0) && (length-- > 0))
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200675 status = twsi_send(twsi, *(data++), MVTWSI_STATUS_DATA_W_ACK,
676 tick);
Albert Aribaud306563a2010-08-27 18:26:05 +0200677 /* Stop transaction */
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200678 stop_status = twsi_stop(twsi, tick);
mario.six@gdsys.cc49c801b2016-07-21 11:57:03 +0200679 /* Return 0, or the status of the first failure */
mario.six@gdsys.cc059fce92016-07-21 11:57:05 +0200680 return status != 0 ? status : stop_status;
Heiko Schocher4ce5a722009-07-20 09:59:37 +0200681}
682
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200683#ifndef CONFIG_DM_I2C
mario.six@gdsys.cc61bc02b2016-07-21 11:57:07 +0200684static void twsi_i2c_init(struct i2c_adapter *adap, int speed,
685 int slaveadd)
686{
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200687 struct mvtwsi_registers *twsi = twsi_get_base(adap);
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200688 __twsi_i2c_init(twsi, speed, slaveadd, NULL);
mario.six@gdsys.cc61bc02b2016-07-21 11:57:07 +0200689}
690
691static uint twsi_i2c_set_bus_speed(struct i2c_adapter *adap,
692 uint requested_speed)
693{
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200694 struct mvtwsi_registers *twsi = twsi_get_base(adap);
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200695 __twsi_i2c_set_bus_speed(twsi, requested_speed);
696 return 0;
mario.six@gdsys.cc61bc02b2016-07-21 11:57:07 +0200697}
698
699static int twsi_i2c_probe(struct i2c_adapter *adap, uchar chip)
700{
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200701 struct mvtwsi_registers *twsi = twsi_get_base(adap);
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200702 return __twsi_i2c_probe_chip(twsi, chip, 10000);
mario.six@gdsys.cc61bc02b2016-07-21 11:57:07 +0200703}
704
705static int twsi_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
706 int alen, uchar *data, int length)
707{
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200708 struct mvtwsi_registers *twsi = twsi_get_base(adap);
mario.six@gdsys.ccf8a10ed2016-07-21 11:57:09 +0200709 u8 addr_bytes[4];
710
711 addr_bytes[0] = (addr >> 0) & 0xFF;
712 addr_bytes[1] = (addr >> 8) & 0xFF;
713 addr_bytes[2] = (addr >> 16) & 0xFF;
714 addr_bytes[3] = (addr >> 24) & 0xFF;
715
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200716 return __twsi_i2c_read(twsi, chip, addr_bytes, alen, data, length,
717 10000);
mario.six@gdsys.cc61bc02b2016-07-21 11:57:07 +0200718}
719
720static int twsi_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
721 int alen, uchar *data, int length)
722{
mario.six@gdsys.cc3c4db632016-07-21 11:57:08 +0200723 struct mvtwsi_registers *twsi = twsi_get_base(adap);
mario.six@gdsys.ccf8a10ed2016-07-21 11:57:09 +0200724 u8 addr_bytes[4];
725
726 addr_bytes[0] = (addr >> 0) & 0xFF;
727 addr_bytes[1] = (addr >> 8) & 0xFF;
728 addr_bytes[2] = (addr >> 16) & 0xFF;
729 addr_bytes[3] = (addr >> 24) & 0xFF;
730
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200731 return __twsi_i2c_write(twsi, chip, addr_bytes, alen, data, length,
732 10000);
mario.six@gdsys.cc61bc02b2016-07-21 11:57:07 +0200733}
734
Paul Kocialkowskidd822422015-04-10 23:09:51 +0200735#ifdef CONFIG_I2C_MVTWSI_BASE0
Hans de Goede0db2bbd2014-06-13 22:55:48 +0200736U_BOOT_I2C_ADAP_COMPLETE(twsi0, twsi_i2c_init, twsi_i2c_probe,
737 twsi_i2c_read, twsi_i2c_write,
738 twsi_i2c_set_bus_speed,
739 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0)
Paul Kocialkowskidd822422015-04-10 23:09:51 +0200740#endif
741#ifdef CONFIG_I2C_MVTWSI_BASE1
742U_BOOT_I2C_ADAP_COMPLETE(twsi1, twsi_i2c_init, twsi_i2c_probe,
743 twsi_i2c_read, twsi_i2c_write,
744 twsi_i2c_set_bus_speed,
745 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1)
746
747#endif
748#ifdef CONFIG_I2C_MVTWSI_BASE2
749U_BOOT_I2C_ADAP_COMPLETE(twsi2, twsi_i2c_init, twsi_i2c_probe,
750 twsi_i2c_read, twsi_i2c_write,
751 twsi_i2c_set_bus_speed,
752 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2)
753
754#endif
755#ifdef CONFIG_I2C_MVTWSI_BASE3
756U_BOOT_I2C_ADAP_COMPLETE(twsi3, twsi_i2c_init, twsi_i2c_probe,
757 twsi_i2c_read, twsi_i2c_write,
758 twsi_i2c_set_bus_speed,
759 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3)
760
761#endif
762#ifdef CONFIG_I2C_MVTWSI_BASE4
763U_BOOT_I2C_ADAP_COMPLETE(twsi4, twsi_i2c_init, twsi_i2c_probe,
764 twsi_i2c_read, twsi_i2c_write,
765 twsi_i2c_set_bus_speed,
766 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 4)
767
768#endif
Jelle van der Waa9d082682016-01-14 14:06:26 +0100769#ifdef CONFIG_I2C_MVTWSI_BASE5
770U_BOOT_I2C_ADAP_COMPLETE(twsi5, twsi_i2c_init, twsi_i2c_probe,
771 twsi_i2c_read, twsi_i2c_write,
772 twsi_i2c_set_bus_speed,
773 CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 5)
774
775#endif
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200776#else /* CONFIG_DM_I2C */
777
778static int mvtwsi_i2c_probe_chip(struct udevice *bus, u32 chip_addr,
779 u32 chip_flags)
780{
781 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200782 return __twsi_i2c_probe_chip(dev->base, chip_addr, dev->tick);
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200783}
784
785static int mvtwsi_i2c_set_bus_speed(struct udevice *bus, uint speed)
786{
787 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200788
789 dev->speed = __twsi_i2c_set_bus_speed(dev->base, speed);
790 dev->tick = calc_tick(dev->speed);
791
792 return 0;
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200793}
794
795static int mvtwsi_i2c_ofdata_to_platdata(struct udevice *bus)
796{
797 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
798
Simon Glassa821c4a2017-05-17 17:18:05 -0600799 dev->base = devfdt_get_addr_ptr(bus);
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200800
801 if (!dev->base)
802 return -ENOMEM;
803
Simon Glasse160f7d2017-01-17 16:52:55 -0700804 dev->index = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200805 "cell-index", -1);
Simon Glasse160f7d2017-01-17 16:52:55 -0700806 dev->slaveadd = fdtdec_get_int(gd->fdt_blob, dev_of_offset(bus),
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200807 "u-boot,i2c-slave-addr", 0x0);
Simon Glassf3d46152020-01-23 11:48:22 -0700808 dev->speed = dev_read_u32_default(bus, "clock-frequency",
809 I2C_SPEED_STANDARD_RATE);
810
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200811 return 0;
812}
813
Baruch Siach173ec352018-06-07 12:38:10 +0300814static void twsi_disable_i2c_slave(struct mvtwsi_registers *twsi)
815{
816 clrbits_le32(&twsi->debug, BIT(18));
817}
818
819static int mvtwsi_i2c_bind(struct udevice *bus)
820{
821 struct mvtwsi_registers *twsi = devfdt_get_addr_ptr(bus);
822
823 /* Disable the hidden slave in i2c0 of these platforms */
Trevor Woernerbb0fb4c2020-05-06 08:02:40 -0400824 if ((IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARCH_KIRKWOOD))
Baruch Siach173ec352018-06-07 12:38:10 +0300825 && bus->req_seq == 0)
826 twsi_disable_i2c_slave(twsi);
827
828 return 0;
829}
830
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200831static int mvtwsi_i2c_probe(struct udevice *bus)
832{
833 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200834 uint actual_speed;
835
836 __twsi_i2c_init(dev->base, dev->speed, dev->slaveadd, &actual_speed);
837 dev->speed = actual_speed;
838 dev->tick = calc_tick(dev->speed);
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200839 return 0;
840}
841
842static int mvtwsi_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
843{
844 struct mvtwsi_i2c_dev *dev = dev_get_priv(bus);
845 struct i2c_msg *dmsg, *omsg, dummy;
846
847 memset(&dummy, 0, sizeof(struct i2c_msg));
848
849 /* We expect either two messages (one with an offset and one with the
850 * actual data) or one message (just data or offset/data combined) */
851 if (nmsgs > 2 || nmsgs == 0) {
852 debug("%s: Only one or two messages are supported.", __func__);
853 return -1;
854 }
855
856 omsg = nmsgs == 1 ? &dummy : msg;
857 dmsg = nmsgs == 1 ? msg : msg + 1;
858
859 if (dmsg->flags & I2C_M_RD)
860 return __twsi_i2c_read(dev->base, dmsg->addr, omsg->buf,
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200861 omsg->len, dmsg->buf, dmsg->len,
862 dev->tick);
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200863 else
864 return __twsi_i2c_write(dev->base, dmsg->addr, omsg->buf,
mario.six@gdsys.ccc68c6242016-07-21 11:57:12 +0200865 omsg->len, dmsg->buf, dmsg->len,
866 dev->tick);
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200867}
868
869static const struct dm_i2c_ops mvtwsi_i2c_ops = {
870 .xfer = mvtwsi_i2c_xfer,
871 .probe_chip = mvtwsi_i2c_probe_chip,
872 .set_bus_speed = mvtwsi_i2c_set_bus_speed,
873};
874
875static const struct udevice_id mvtwsi_i2c_ids[] = {
876 { .compatible = "marvell,mv64xxx-i2c", },
Stefan Roese87de0eb2016-09-16 15:07:55 +0200877 { .compatible = "marvell,mv78230-i2c", },
Jernej Skrabeca8f01cc2017-04-27 00:03:36 +0200878 { .compatible = "allwinner,sun6i-a31-i2c", },
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200879 { /* sentinel */ }
880};
881
882U_BOOT_DRIVER(i2c_mvtwsi) = {
883 .name = "i2c_mvtwsi",
884 .id = UCLASS_I2C,
885 .of_match = mvtwsi_i2c_ids,
Baruch Siach173ec352018-06-07 12:38:10 +0300886 .bind = mvtwsi_i2c_bind,
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200887 .probe = mvtwsi_i2c_probe,
888 .ofdata_to_platdata = mvtwsi_i2c_ofdata_to_platdata,
889 .priv_auto_alloc_size = sizeof(struct mvtwsi_i2c_dev),
890 .ops = &mvtwsi_i2c_ops,
891};
892#endif /* CONFIG_DM_I2C */