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wdenk37bd3212002-11-03 11:21:28 +00001/*
2 * (C) Copyright 2000
3 * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include "cpciiser4.h"
26#include <asm/processor.h>
27#include <command.h>
wdenk8bde7f72003-06-27 21:31:46 +000028
Wolfgang Denkd87080b2006-03-31 18:32:53 +020029DECLARE_GLOBAL_DATA_PTR;
30
wdenk8bde7f72003-06-27 21:31:46 +000031/*cmd_boot.c*/
32
33extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
stroese20aacbf2004-12-16 18:35:14 +000034extern void lxt971_no_sleep(void);
wdenk8bde7f72003-06-27 21:31:46 +000035
wdenk37bd3212002-11-03 11:21:28 +000036
37/* ------------------------------------------------------------------------- */
38
39#if 0
40#define FPGA_DEBUG
41#endif
42
43#if 0
44#define FPGA_DEBUG2
45#endif
46
47/* fpga configuration data - generated by bin2cc */
48const unsigned char fpgadata[] = {
49#include "fpgadata.c"
50};
51
52/*
53 * include common fpga code (for esd boards)
54 */
55#include "../common/fpga.c"
56
57
wdenkc837dcb2004-01-20 23:12:12 +000058int board_early_init_f (void)
wdenk37bd3212002-11-03 11:21:28 +000059{
wdenk37bd3212002-11-03 11:21:28 +000060 int index, len, i;
61 volatile unsigned char dummy;
62 int status;
63
64#ifdef FPGA_DEBUG
65 /* set up serial port with default baudrate */
66 (void) get_clocks ();
67 gd->baudrate = CONFIG_BAUDRATE;
68 serial_init ();
69 console_init_f ();
70#endif
71
72 /*
73 * Boot onboard FPGA
74 */
75 status = fpga_boot ((unsigned char *) fpgadata, sizeof (fpgadata));
76 if (status != 0) {
77 /* booting FPGA failed */
78#ifndef FPGA_DEBUG
79 /* set up serial port with default baudrate */
80 (void) get_clocks ();
81 gd->baudrate = CONFIG_BAUDRATE;
82 serial_init ();
83 console_init_f ();
84#endif
85 printf ("\nFPGA: Booting failed ");
86 switch (status) {
87 case ERROR_FPGA_PRG_INIT_LOW:
88 printf ("(Timeout: INIT not low after asserting PROGRAM*)\n ");
89 break;
90 case ERROR_FPGA_PRG_INIT_HIGH:
91 printf ("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
92 break;
93 case ERROR_FPGA_PRG_DONE:
94 printf ("(Timeout: DONE not high after programming FPGA)\n ");
95 break;
96 }
97
98 /* display infos on fpgaimage */
99 index = 15;
100 for (i = 0; i < 4; i++) {
101 len = fpgadata[index];
102 printf ("FPGA: %s\n", &(fpgadata[index + 1]));
103 index += len + 3;
104 }
105 putc ('\n');
106 /* delayed reboot */
107 for (i = 20; i > 0; i--) {
108 printf ("Rebooting in %2d seconds \r", i);
109 for (index = 0; index < 1000; index++)
110 udelay (1000);
111 }
112 putc ('\n');
113 do_reset (NULL, 0, 0, NULL);
114 }
115
116 /*
117 * Init FPGA via RESET (read access on CS3)
118 */
119 dummy = *(unsigned char *) 0xf0200000;
120
121 /*
122 * IRQ 0-15 405GP internally generated; active high; level sensitive
123 * IRQ 16 405GP internally generated; active low; level sensitive
124 * IRQ 17-24 RESERVED
125 * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
126 * IRQ 26 (EXT IRQ 1) CAN1; active low; level sensitive
127 * IRQ 27 (EXT IRQ 2) PCI SLOT 0; active low; level sensitive
128 * IRQ 28 (EXT IRQ 3) PCI SLOT 1; active low; level sensitive
129 * IRQ 29 (EXT IRQ 4) PCI SLOT 2; active low; level sensitive
130 * IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
131 * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
132 */
133 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
134 mtdcr (uicer, 0x00000000); /* disable all ints */
135 mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
136 /* mtdcr(uicpr, 0xFFFFFF81); / set int polarities */
137 mtdcr (uicpr, 0xFFFFFF80); /* set int polarities */
138 mtdcr (uictr, 0x10000000); /* set int trigger levels */
139 mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
140 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
141
142 return 0;
143}
144
145
146/* ------------------------------------------------------------------------- */
147
148/*
149 * Check Board Identity:
150 */
151
152int checkboard (void)
153{
154 int index;
155 int len;
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200156 char str[64];
wdenk37bd3212002-11-03 11:21:28 +0000157 int i = getenv_r ("serial#", str, sizeof (str));
158
159 puts ("Board: ");
160
stroese20aacbf2004-12-16 18:35:14 +0000161 if (i == -1) {
162 puts ("### No HW ID - assuming AR405");
163 } else {
164 puts(str);
wdenk37bd3212002-11-03 11:21:28 +0000165 }
166
wdenk37bd3212002-11-03 11:21:28 +0000167 puts ("\nFPGA: ");
168
169 /* display infos on fpgaimage */
170 index = 15;
171 for (i = 0; i < 4; i++) {
172 len = fpgadata[index];
173 printf ("%s ", &(fpgadata[index + 1]));
174 index += len + 3;
175 }
176
177 putc ('\n');
178
stroese20aacbf2004-12-16 18:35:14 +0000179 /*
180 * Disable sleep mode in LXT971
181 */
182 lxt971_no_sleep();
183
wdenk37bd3212002-11-03 11:21:28 +0000184 return 0;
185}
186
187/* ------------------------------------------------------------------------- */
188
189long int initdram (int board_type)
190{
191 return (16 * 1024 * 1024);
192}
193
194/* ------------------------------------------------------------------------- */
195
196int testdram (void)
197{
198 /* TODO: XXX XXX XXX */
199 printf ("test: 16 MB - ok\n");
200
201 return (0);
202}
203
204/* ------------------------------------------------------------------------- */