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Heiko Schocherbbe31092010-03-05 07:36:33 +01001/*
2 * Copyright (C) 2010 Heiko Schocher <hs@denx.de>
3 *
4 * based on:
5 * Copyright (C) 2009 Ilya Yanok <yanok@emcraft.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#ifndef __IMX27LITE_COMMON_CONFIG_H
24#define __IMX27LITE_COMMON_CONFIG_H
25
26/*
27 * SoC Configuration
28 */
29#define CONFIG_ARM926EJS /* arm926ejs CPU core */
30#define CONFIG_MX27
31#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */
32#define CONFIG_SYS_HZ 1000
33
34#define CONFIG_DISPLAY_BOARDINFO
35#define CONFIG_DISPLAY_CPUINFO
36
Fabio Estevam43f13e42011-06-06 05:25:20 +000037#define CONFIG_SYS_TEXT_BASE 0xc0000000
38
Heiko Schocherbbe31092010-03-05 07:36:33 +010039#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
40#define CONFIG_SETUP_MEMORY_TAGS 1
41#define CONFIG_INITRD_TAG 1
42
43/*
44 * Lowlevel configuration
45 */
46#define SDRAM_ESDCFG_REGISTER_VAL(cas) \
47 (ESDCFG_TRC(10) | \
48 ESDCFG_TRCD(3) | \
49 ESDCFG_TCAS(cas) | \
50 ESDCFG_TRRD(1) | \
51 ESDCFG_TRAS(5) | \
52 ESDCFG_TWR | \
53 ESDCFG_TMRD(2) | \
54 ESDCFG_TRP(2) | \
55 ESDCFG_TXP(3))
56
57#define SDRAM_ESDCTL_REGISTER_VAL \
58 (ESDCTL_PRCT(0) | \
59 ESDCTL_BL | \
60 ESDCTL_PWDT(0) | \
61 ESDCTL_SREFR(3) | \
62 ESDCTL_DSIZ_32 | \
63 ESDCTL_COL10 | \
64 ESDCTL_ROW13 | \
65 ESDCTL_SDE)
66
67#define SDRAM_ALL_VAL 0xf00
68
69#define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */
70#define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000
71
72#define MPCTL0_VAL 0x1ef15d5
73
74#define SPCTL0_VAL 0x043a1c09
75
76#define CSCR_VAL 0x33f08107
77
78#define PCDR0_VAL 0x120470c3
79#define PCDR1_VAL 0x03030303
80#define PCCR0_VAL 0xffffffff
81#define PCCR1_VAL 0xfffffffc
82
83#define AIPI1_PSR0_VAL 0x20040304
84#define AIPI1_PSR1_VAL 0xdffbfcfb
85#define AIPI2_PSR0_VAL 0x07ffc200
86#define AIPI2_PSR1_VAL 0xffffffff
87
88/*
89 * Memory Info
90 */
91/* malloc() len */
92#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024)
Heiko Schocherbbe31092010-03-05 07:36:33 +010093/* memtest start address */
94#define CONFIG_SYS_MEMTEST_START 0xA0000000
95#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */
96#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
97#define CONFIG_STACKSIZE (256 * 1024) /* regular stack */
98#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */
99#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
100
101/*
102 * Serial Driver info
103 */
104#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +0100105#define CONFIG_MXC_UART_BASE UART1_BASE
Heiko Schocherbbe31092010-03-05 07:36:33 +0100106#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
107#define CONFIG_BAUDRATE 115200 /* Default baud rate */
108#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
109
110/*
111 * Flash & Environment
112 */
113#define CONFIG_ENV_IS_IN_FLASH
114#define CONFIG_FLASH_CFI_DRIVER
115#define CONFIG_SYS_FLASH_CFI
116/* Use buffered writes (~10x faster) */
117#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
118/* Use hardware sector protection */
119#define CONFIG_SYS_FLASH_PROTECTION 1
120#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
121/* CS2 Base address */
122#define PHYS_FLASH_1 0xc0000000
123/* Flash Base for U-Boot */
124#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
125#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \
126 CONFIG_SYS_FLASH_SECT_SZ)
127#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
128#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */
129#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
130/* Address and size of Redundant Environment Sector */
131#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
132#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
133
134/*
135 * Ethernet
136 */
137#define CONFIG_FEC_MXC
138#define CONFIG_FEC_MXC_PHYADDR 0x1f
139#define CONFIG_MII
Heiko Schocherbbe31092010-03-05 07:36:33 +0100140
141/*
142 * MTD
143 */
144#define CONFIG_FLASH_CFI_MTD
145#define CONFIG_MTD_DEVICE
146
147/*
148 * NAND
149 */
150#define CONFIG_NAND_MXC
151#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000
152#define CONFIG_SYS_MAX_NAND_DEVICE 1
153#define CONFIG_SYS_NAND_BASE 0xd8000000
154#define CONFIG_JFFS2_NAND
155#define CONFIG_MXC_NAND_HWECC
156#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
157
158/*
159 * SD/MMC
160 */
161#define CONFIG_MMC
162#define CONFIG_GENERIC_MMC
163#define CONFIG_MXC_MMC
164#define CONFIG_DOS_PARTITION
165
166/*
167 * MTD partitions
168 */
169#define CONFIG_CMD_MTDPARTS
170
171/*
172 * U-Boot general configuration
173 */
174#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
175#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
176/* Print buffer sz */
177#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
178 sizeof(CONFIG_SYS_PROMPT) + 16)
179#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
180/* Boot Argument Buffer Size */
181#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
182#define CONFIG_CMDLINE_EDITING
183#define CONFIG_SYS_LONGHELP
184
185/*
186 * U-Boot commands
187 */
188#include <config_cmd_default.h>
189#define CONFIG_CMD_ASKENV
Heiko Schocherc3330e92010-09-17 13:10:30 +0200190#define CONFIG_CMD_CACHE
Heiko Schocherbbe31092010-03-05 07:36:33 +0100191#define CONFIG_CMD_DHCP
192#define CONFIG_CMD_DIAG
193#define CONFIG_CMD_FAT
194#define CONFIG_CMD_JFFS2
195#define CONFIG_CMD_MII
196#define CONFIG_CMD_MMC
197#define CONFIG_CMD_NAND
198#define CONFIG_CMD_PING
199
200#define CONFIG_BOOTDELAY 5
201
202#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */
203#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
204
205#define xstr(s) str(s)
206#define str(s) #s
207
208#define CONFIG_EXTRA_ENV_SETTINGS \
209 "netdev=eth0\0" \
210 "nfsargs=setenv bootargs root=/dev/nfs rw " \
211 "nfsroot=${serverip}:${rootpath}\0" \
212 "ramargs=setenv bootargs root=/dev/ram rw\0" \
213 "addip=setenv bootargs ${bootargs} " \
214 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
215 ":${hostname}:${netdev}:off panic=1\0" \
216 "addtty=setenv bootargs ${bootargs}" \
217 " console=ttymxc0,${baudrate}\0" \
218 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
219 "addmisc=setenv bootargs ${bootargs}\0" \
220 "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
221 "kernel_addr_r=a0800000\0" \
222 "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
223 "rootpath=/opt/eldk-4.2-arm/arm\0" \
224 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
225 "run nfsargs addip addtty addmtd addmisc;" \
226 "bootm\0" \
227 "bootcmd=run net_nfs\0" \
228 "load=tftp ${loadaddr} ${u-boot}\0" \
229 "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \
230 " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \
231 " +${filesize};cp.b ${fileaddr} " \
232 xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \
233 "upd=run load update\0" \
234 "mtdids=" MTDIDS_DEFAULT "\0" \
235 "mtdparts=" MTDPARTS_DEFAULT "\0" \
236
Heiko Schochera784c012010-09-22 14:06:33 +0200237/* additions for new relocation code, must be added to all boards */
Heiko Schocherab86f722010-09-17 13:10:42 +0200238#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
239#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200240 GENERATED_GBL_DATA_SIZE)
Heiko Schocherbbe31092010-03-05 07:36:33 +0100241#endif /* __IMX27LITE_COMMON_CONFIG_H */