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Minkyu Kang9e408082011-01-24 15:33:50 +09001/*
2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 *
Chander Kashyap393cb362011-12-06 23:34:12 +00005 * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board.
Minkyu Kang9e408082011-01-24 15:33:50 +09006 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef __CONFIG_H
27#define __CONFIG_H
28
29/*
30 * High Level Configuration Options
31 * (easy to change)
32 */
Minkyu Kang9e408082011-01-24 15:33:50 +090033#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
34#define CONFIG_S5P 1 /* which is in a S5P Family */
Chander Kashyap393cb362011-12-06 23:34:12 +000035#define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */
Minkyu Kang9e408082011-01-24 15:33:50 +090036#define CONFIG_UNIVERSAL 1 /* working with Universal */
37
38#include <asm/arch/cpu.h> /* get chip and board defs */
39
40#define CONFIG_ARCH_CPU_INIT
41#define CONFIG_DISPLAY_CPUINFO
42#define CONFIG_DISPLAY_BOARDINFO
43
44/* Keep L2 Cache Disabled */
Aneesh Ve47f2db2011-06-16 23:30:48 +000045#define CONFIG_SYS_L2CACHE_OFF 1
Minkyu Kang9e408082011-01-24 15:33:50 +090046
47#define CONFIG_SYS_SDRAM_BASE 0x40000000
48#define CONFIG_SYS_TEXT_BASE 0x44800000
49
Chander Kashyap393cb362011-12-06 23:34:12 +000050/* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
Minkyu Kang9e408082011-01-24 15:33:50 +090051#define CONFIG_SYS_CLK_FREQ_C210 24000000
Chander Kashyap5e46f832012-02-05 23:01:45 +000052#define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210
Minkyu Kang9e408082011-01-24 15:33:50 +090053
54#define CONFIG_SETUP_MEMORY_TAGS
55#define CONFIG_CMDLINE_TAG
56#define CONFIG_INITRD_TAG
57#define CONFIG_REVISION_TAG
58#define CONFIG_CMDLINE_EDITING
59
60/* Size of malloc() pool */
61#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
62
63/* select serial console configuration */
64#define CONFIG_SERIAL_MULTI 1
65#define CONFIG_SERIAL2 1 /* use SERIAL 2 */
66#define CONFIG_BAUDRATE 115200
67
68/* MMC */
69#define CONFIG_GENERIC_MMC 1
70#define CONFIG_MMC 1
71#define CONFIG_S5P_MMC 1
72
Minkyu Kangaa44a452011-03-10 20:10:38 +090073/* PWM */
74#define CONFIG_PWM 1
75
Minkyu Kang9e408082011-01-24 15:33:50 +090076/* It should define before config_cmd_default.h */
77#define CONFIG_SYS_NO_FLASH 1
78
79/* Command definition */
80#include <config_cmd_default.h>
81
82#undef CONFIG_CMD_FPGA
83#undef CONFIG_CMD_MISC
84#undef CONFIG_CMD_NET
85#undef CONFIG_CMD_NFS
86#undef CONFIG_CMD_XIMG
87#define CONFIG_CMD_CACHE
88#define CONFIG_CMD_ONENAND
89#define CONFIG_CMD_MTDPARTS
90#define CONFIG_CMD_MMC
91#define CONFIG_CMD_FAT
92
93#define CONFIG_BOOTDELAY 1
94#define CONFIG_ZERO_BOOTDELAY_CHECK
95
96#define CONFIG_MTD_DEVICE
97#define CONFIG_MTD_PARTITIONS
98
99/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
100#define MTDIDS_DEFAULT "onenand0=samsung-onenand"
101
102#define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\
103 "128k(s-boot)"\
104 ",896k(bootloader)"\
105 ",256k(params)"\
106 ",2816k(config)"\
107 ",8m(csa)"\
108 ",7m(kernel)"\
109 ",1m(log)"\
110 ",12m(modem)"\
111 ",60m(qboot)"\
112 ",-(UBI)\0"
113
114#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
115
116#define MBRPARTS_DEFAULT "20M(permanent)"\
117 ",20M(boot)"\
118 ",1G(system)"\
119 ",100M(swap)"\
120 ",-(UMS)\0"
121
122#define CONFIG_BOOTARGS "Please use defined boot"
123#define CONFIG_BOOTCOMMAND "run mmcboot"
124#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
125
126#define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7"
127#define CONFIG_BOOTBLOCK "10"
128#define CONFIG_UBIBLOCK "9"
129
130#define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc "
131#define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \
132 "${mtdparts}"
133
134#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
135
136#define CONFIG_ENV_OVERWRITE
137#define CONFIG_SYS_CONSOLE_INFO_QUIET
138#define CONFIG_SYS_CONSOLE_IS_IN_ENV
139
140#define CONFIG_EXTRA_ENV_SETTINGS \
141 "updateb=" \
142 "onenand erase 0x0 0x100000;" \
143 "onenand write 0x42008000 0x0 0x100000\0" \
144 "updatek=" \
145 "onenand erase 0xc00000 0x500000;" \
146 "onenand write 0x41008000 0xc00000 0x500000\0" \
147 "bootk=" \
148 "run loaduimage; bootm 0x40007FC0\0" \
149 "updatemmc=" \
150 "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
151 "mmc boot 0 1 1 0\0" \
152 "updatebackup=" \
153 "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \
154 "mmc boot 0 1 1 0\0" \
155 "updatebootb=" \
156 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
157 "lpj=lpj=3981312\0" \
158 "ubifsboot=" \
159 "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \
160 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
161 CONFIG_ENV_COMMON_BOOT "; run bootk\0" \
162 "tftpboot=" \
163 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \
164 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
165 CONFIG_ENV_COMMON_BOOT \
166 "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \
167 "nfsboot=" \
168 "set bootargs root=/dev/nfs rw " \
169 "nfsroot=${nfsroot},nolock,tcp " \
170 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
171 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
172 "; run bootk\0" \
173 "ramfsboot=" \
174 "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \
175 "${console} ${meminfo} " \
176 "initrd=0x43000000,8M ramdisk=8192\0" \
177 "mmcboot=" \
178 "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
179 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
180 "run loaduimage; bootm 0x40007FC0\0" \
181 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
182 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
183 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
184 "verify=n\0" \
185 "rootfstype=ext4\0" \
186 "console=" CONFIG_DEFAULT_CONSOLE \
187 "mtdparts=" MTDPARTS_DEFAULT \
188 "mbrparts=" MBRPARTS_DEFAULT \
189 "meminfo=crashkernel=32M@0x50000000\0" \
190 "nfsroot=/nfsroot/arm\0" \
191 "bootblock=" CONFIG_BOOTBLOCK "\0" \
192 "ubiblock=" CONFIG_UBIBLOCK" \0" \
193 "ubi=enabled\0" \
194 "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
195 "mmcdev=0\0" \
196 "mmcbootpart=2\0" \
197 "mmcrootpart=3\0" \
198 "opts=always_resume=1"
199
200/* Miscellaneous configurable options */
201#define CONFIG_SYS_LONGHELP /* undef to save memory */
202#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
203#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
204#define CONFIG_SYS_PROMPT "Universal # "
205#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
206#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
207#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
208/* Boot Argument Buffer Size */
209#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
210/* memtest works on */
211#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
212#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
213#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
214
215#define CONFIG_SYS_HZ 1000
216
217/* valid baudrates */
218#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
219
220/* Stack sizes */
221#define CONFIG_STACKSIZE (256 << 10) /* regular stack 256KB */
222
223/* Universal has 2 banks of DRAM */
224#define CONFIG_NR_DRAM_BANKS 2
225#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
226#define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
227#define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
228#define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
229
230#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
231
232#define CONFIG_SYS_MONITOR_BASE 0x00000000
233#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
234
235#define CONFIG_USE_ONENAND_BOARD_INIT
236#define CONFIG_SYS_ONENAND_BASE 0x0C000000
237
238#define CONFIG_ENV_IS_IN_MMC 1
239#define CONFIG_SYS_MMC_ENV_DEV 0
240#define CONFIG_ENV_SIZE 4096
241#define CONFIG_ENV_OFFSET ((32 - 4) << 10)/* 32KiB - 4KiB */
242
243#define CONFIG_DOS_PARTITION 1
244
245#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
246
Łukasz Majewski0aa597d2011-10-17 01:42:24 +0000247#define CONFIG_SYS_CACHELINE_SIZE 32
248
Łukasz Majewski2427f5d2011-10-26 22:33:17 +0000249#include <asm/arch/gpio.h>
250/*
251 * I2C Settings
252 */
Chander Kashyap393cb362011-12-06 23:34:12 +0000253#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
254#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
Łukasz Majewski2427f5d2011-10-26 22:33:17 +0000255
256#define CONFIG_SOFT_I2C
257#define CONFIG_SOFT_I2C_READ_REPEATED_START
258#define CONFIG_SYS_I2C_SPEED 50000
259#define CONFIG_I2C_MULTI_BUS
260#define CONFIG_SYS_MAX_I2C_BUS 7
261
262#define CONFIG_PMIC
263#define CONFIG_PMIC_I2C
264#define CONFIG_PMIC_MAX8998
265
Lukasz Majewskiddc7e542011-12-15 10:32:12 +0100266#define CONFIG_USB_GADGET
267#define CONFIG_USB_GADGET_S3C_UDC_OTG
268#define CONFIG_USB_GADGET_DUALSPEED
269
Minkyu Kang9e408082011-01-24 15:33:50 +0900270#endif /* __CONFIG_H */