Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 1 | /* |
| 2 | * U-boot - start.S Startup file for Blackfin u-boot |
| 3 | * |
Mike Frysinger | 9609222 | 2008-10-11 21:18:10 -0400 | [diff] [blame] | 4 | * Copyright (c) 2005-2008 Analog Devices Inc. |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 5 | * |
| 6 | * This file is based on head.S |
| 7 | * Copyright (c) 2003 Metrowerks/Motorola |
| 8 | * Copyright (C) 1998 D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>, |
| 9 | * Kenneth Albanowski <kjahds@kjahds.com>, |
| 10 | * The Silver Hammer Group, Ltd. |
| 11 | * (c) 1995, Dionne & Associates |
| 12 | * (c) 1995, DKG Display Tech. |
| 13 | * |
| 14 | * See file CREDITS for list of people who contributed to this |
| 15 | * project. |
| 16 | * |
| 17 | * This program is free software; you can redistribute it and/or |
| 18 | * modify it under the terms of the GNU General Public License as |
| 19 | * published by the Free Software Foundation; either version 2 of |
| 20 | * the License, or (at your option) any later version. |
| 21 | * |
| 22 | * This program is distributed in the hope that it will be useful, |
| 23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 25 | * GNU General Public License for more details. |
| 26 | * |
| 27 | * You should have received a copy of the GNU General Public License |
| 28 | * along with this program; if not, write to the Free Software |
| 29 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, |
| 30 | * MA 02110-1301 USA |
| 31 | */ |
| 32 | |
| 33 | #include <config.h> |
| 34 | #include <asm/blackfin.h> |
| 35 | #include <asm/mach-common/bits/core.h> |
| 36 | #include <asm/mach-common/bits/dma.h> |
| 37 | #include <asm/mach-common/bits/pll.h> |
| 38 | |
| 39 | #include "serial.h" |
| 40 | |
| 41 | /* It may seem odd that we make calls to functions even though we haven't |
| 42 | * relocated ourselves yet out of {flash,ram,wherever}. This is OK because |
| 43 | * the "call" instruction in the Blackfin architecture is actually PC |
| 44 | * relative. So we can call functions all we want and not worry about them |
| 45 | * not being relocated yet. |
| 46 | */ |
| 47 | |
| 48 | .text |
| 49 | ENTRY(_start) |
| 50 | |
| 51 | /* Set our initial stack to L1 scratch space */ |
Mike Frysinger | 9609222 | 2008-10-11 21:18:10 -0400 | [diff] [blame] | 52 | sp.l = LO(L1_SRAM_SCRATCH_END - 20); |
| 53 | sp.h = HI(L1_SRAM_SCRATCH_END - 20); |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 54 | |
| 55 | #ifdef CONFIG_HW_WATCHDOG |
| 56 | # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_START |
| 57 | # define CONFIG_HW_WATCHDOG_TIMEOUT_START 5000 |
| 58 | # endif |
| 59 | /* Program the watchdog with an initial timeout of ~5 seconds. |
| 60 | * That should be long enough to bootstrap ourselves up and |
| 61 | * then the common u-boot code can take over. |
| 62 | */ |
| 63 | P0.L = LO(WDOG_CNT); |
| 64 | P0.H = HI(WDOG_CNT); |
| 65 | R0.L = 0; |
| 66 | R0.H = HI(MSEC_TO_SCLK(CONFIG_HW_WATCHDOG_TIMEOUT_START)); |
| 67 | [P0] = R0; |
| 68 | /* fire up the watchdog - R0.L above needs to be 0x0000 */ |
| 69 | W[P0 + (WDOG_CTL - WDOG_CNT)] = R0; |
| 70 | #endif |
| 71 | |
| 72 | /* Turn on the serial for debugging the init process */ |
| 73 | serial_early_init |
| 74 | serial_early_set_baud |
| 75 | |
| 76 | serial_early_puts("Init Registers"); |
| 77 | |
Mike Frysinger | 70c4c03 | 2008-06-01 01:23:48 -0400 | [diff] [blame] | 78 | /* Disable self-nested interrupts and enable CYCLES for udelay() */ |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 79 | R0 = CCEN | 0x30; |
| 80 | SYSCFG = R0; |
| 81 | |
| 82 | /* Zero out registers required by Blackfin ABI. |
| 83 | * http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface |
| 84 | */ |
| 85 | r1 = 0 (x); |
| 86 | /* Disable circular buffers */ |
| 87 | l0 = r1; |
| 88 | l1 = r1; |
| 89 | l2 = r1; |
| 90 | l3 = r1; |
| 91 | /* Disable hardware loops in case we were started by 'go' */ |
| 92 | lc0 = r1; |
| 93 | lc1 = r1; |
| 94 | |
| 95 | /* Save RETX so we can pass it while booting Linux */ |
| 96 | r7 = RETX; |
| 97 | |
| 98 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) |
| 99 | /* In bypass mode, we don't have an LDR with an init block |
| 100 | * so we need to explicitly call it ourselves. This will |
| 101 | * reprogram our clocks and setup our async banks. |
| 102 | */ |
| 103 | /* XXX: we should DMA this into L1, put external memory into |
| 104 | * self refresh, and then jump there ... |
| 105 | */ |
| 106 | call _get_pc; |
| 107 | r3 = 0x0; |
| 108 | r3.h = 0x2000; |
| 109 | cc = r0 < r3 (iu); |
| 110 | if cc jump .Lproc_initialized; |
| 111 | |
| 112 | serial_early_puts("Program Clocks"); |
| 113 | |
| 114 | call _initcode; |
| 115 | |
| 116 | /* Since we reprogrammed SCLK, we need to update the serial divisor */ |
| 117 | serial_early_set_baud |
| 118 | |
| 119 | .Lproc_initialized: |
| 120 | #endif |
| 121 | |
| 122 | /* Inform upper layers if we had to do the relocation ourselves. |
| 123 | * This allows us to detect whether we were loaded by 'go 0x1000' |
| 124 | * or by the bootrom from an LDR. "r6" is "loaded_from_ldr". |
| 125 | */ |
| 126 | r6 = 1 (x); |
| 127 | |
Mike Frysinger | b5eba3f | 2008-10-11 21:40:26 -0400 | [diff] [blame] | 128 | /* Relocate from wherever we are (FLASH/RAM/etc...) to the hardcoded |
Mike Frysinger | dc2bfb0 | 2008-06-01 01:21:34 -0400 | [diff] [blame] | 129 | * monitor location in the end of RAM. We know that memcpy() only |
Mike Frysinger | b5eba3f | 2008-10-11 21:40:26 -0400 | [diff] [blame] | 130 | * uses registers, so it is safe to call here. Note that this only |
| 131 | * copies to external memory ... we do not start executing out of |
| 132 | * it yet (see "lower to 15" below). |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 133 | */ |
| 134 | serial_early_puts("Relocate"); |
| 135 | call _get_pc; |
| 136 | .Loffset: |
| 137 | r2.l = .Loffset; |
| 138 | r2.h = .Loffset; |
| 139 | r3.l = _start; |
| 140 | r3.h = _start; |
Mike Frysinger | dc2bfb0 | 2008-06-01 01:21:34 -0400 | [diff] [blame] | 141 | r2 = r2 - r3; |
| 142 | r1 = r0 - r2; |
| 143 | cc = r1 == r3; |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 144 | if cc jump .Lnorelocate; |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 145 | r6 = 0 (x); |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 146 | |
Mike Frysinger | dc2bfb0 | 2008-06-01 01:21:34 -0400 | [diff] [blame] | 147 | r0 = r3; |
| 148 | r2.l = LO(CONFIG_SYS_MONITOR_LEN); |
| 149 | r2.h = HI(CONFIG_SYS_MONITOR_LEN); |
| 150 | call _memcpy_ASM; |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 151 | |
| 152 | /* Initialize BSS section ... we know that memset() does not |
| 153 | * use the BSS, so it is safe to call here. The bootrom LDR |
| 154 | * takes care of clearing things for us. |
| 155 | */ |
| 156 | serial_early_puts("Zero BSS"); |
| 157 | r0.l = __bss_start; |
| 158 | r0.h = __bss_start; |
| 159 | r1 = 0 (x); |
| 160 | r2.l = __bss_end; |
| 161 | r2.h = __bss_end; |
| 162 | r2 = r2 - r0; |
| 163 | call _memset; |
| 164 | |
| 165 | .Lnorelocate: |
| 166 | |
| 167 | /* Setup the actual stack in external memory */ |
Mike Frysinger | 95433f6 | 2008-10-11 21:23:41 -0400 | [diff] [blame] | 168 | sp.h = HI(CONFIG_STACKBASE); |
| 169 | sp.l = LO(CONFIG_STACKBASE); |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 170 | fp = sp; |
| 171 | |
| 172 | /* Now lower ourselves from the highest interrupt level to |
| 173 | * the lowest. We do this by masking all interrupts but 15, |
Mike Frysinger | 70c4c03 | 2008-06-01 01:23:48 -0400 | [diff] [blame] | 174 | * setting the 15 handler to ".Lenable_nested", raising the 15 |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 175 | * interrupt, and then returning from the highest interrupt |
| 176 | * level to the dummy "jump" until the interrupt controller |
Mike Frysinger | b5eba3f | 2008-10-11 21:40:26 -0400 | [diff] [blame] | 177 | * services the pending 15 interrupt. If executing out of |
| 178 | * flash, these steps also changes the code flow from flash |
| 179 | * to external memory. |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 180 | */ |
| 181 | serial_early_puts("Lower to 15"); |
| 182 | r0 = r7; |
| 183 | r1 = r6; |
| 184 | p0.l = LO(EVT15); |
| 185 | p0.h = HI(EVT15); |
Mike Frysinger | 70c4c03 | 2008-06-01 01:23:48 -0400 | [diff] [blame] | 186 | p1.l = .Lenable_nested; |
| 187 | p1.h = .Lenable_nested; |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 188 | [p0] = p1; |
Mike Frysinger | bd33e5c | 2008-10-11 21:19:39 -0400 | [diff] [blame] | 189 | r7 = EVT_IVG15 (z); |
| 190 | sti r7; |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 191 | raise 15; |
| 192 | p4.l = .LWAIT_HERE; |
| 193 | p4.h = .LWAIT_HERE; |
| 194 | reti = p4; |
| 195 | rti; |
| 196 | |
Mike Frysinger | 70c4c03 | 2008-06-01 01:23:48 -0400 | [diff] [blame] | 197 | /* Enable nested interrupts before continuing with cpu init */ |
| 198 | .Lenable_nested: |
| 199 | cli r7; |
| 200 | [--sp] = reti; |
| 201 | jump.l _cpu_init_f; |
| 202 | |
Mike Frysinger | 9171fc8 | 2008-03-30 15:46:13 -0400 | [diff] [blame] | 203 | .LWAIT_HERE: |
| 204 | jump .LWAIT_HERE; |
| 205 | ENDPROC(_start) |
| 206 | |
| 207 | LENTRY(_get_pc) |
| 208 | r0 = rets; |
| 209 | #if ANOMALY_05000371 |
| 210 | NOP; |
| 211 | NOP; |
| 212 | NOP; |
| 213 | #endif |
| 214 | rts; |
| 215 | ENDPROC(_get_pc) |