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wdenk2262cfe2002-11-18 00:14:45 +00001/*
Graeme Russdbf71152011-04-13 19:43:26 +10002 * (C) Copyright 2008-2011
3 * Graeme Russ, <graeme.russ@gmail.com>
4 *
wdenk2262cfe2002-11-18 00:14:45 +00005 * (C) Copyright 2002
Albert ARIBAUDfa82f872011-08-04 18:45:45 +02006 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk8bde7f72003-06-27 21:31:46 +00007 *
wdenk2262cfe2002-11-18 00:14:45 +00008 * (C) Copyright 2002
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 *
12 * (C) Copyright 2002
13 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
14 * Alex Zuepke <azu@sysgo.de>
15 *
16 * See file CREDITS for list of people who contributed to this
17 * project.
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License as
21 * published by the Free Software Foundation; either version 2 of
22 * the License, or (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * MA 02111-1307 USA
33 */
34
wdenk2262cfe2002-11-18 00:14:45 +000035#include <common.h>
36#include <command.h>
Graeme Russc53fd2b2011-02-12 15:11:30 +110037#include <asm/processor.h>
Graeme Russ0c24c9c2011-02-12 15:11:32 +110038#include <asm/processor-flags.h>
Graeme Russ3f5f18d2008-12-07 10:29:02 +110039#include <asm/interrupt.h>
Gabe Black60a9b6b2011-11-16 23:32:50 +000040#include <linux/compiler.h>
wdenk2262cfe2002-11-18 00:14:45 +000041
Graeme Russdbf71152011-04-13 19:43:26 +100042/*
43 * Constructor for a conventional segment GDT (or LDT) entry
44 * This is a macro so it can be used in initialisers
45 */
Graeme Russ59c6d0e2010-10-07 20:03:21 +110046#define GDT_ENTRY(flags, base, limit) \
47 ((((base) & 0xff000000ULL) << (56-24)) | \
48 (((flags) & 0x0000f0ffULL) << 40) | \
49 (((limit) & 0x000f0000ULL) << (48-16)) | \
50 (((base) & 0x00ffffffULL) << 16) | \
51 (((limit) & 0x0000ffffULL)))
52
Graeme Russ59c6d0e2010-10-07 20:03:21 +110053struct gdt_ptr {
54 u16 len;
55 u32 ptr;
Graeme Russ717979f2011-11-08 02:33:13 +000056} __packed;
Graeme Russ59c6d0e2010-10-07 20:03:21 +110057
58static void reload_gdt(void)
59{
Graeme Russdbf71152011-04-13 19:43:26 +100060 /*
61 * There are machines which are known to not boot with the GDT
62 * being 8-byte unaligned. Intel recommends 16 byte alignment
63 */
Graeme Russ59c6d0e2010-10-07 20:03:21 +110064 static const u64 boot_gdt[] __attribute__((aligned(16))) = {
65 /* CS: code, read/execute, 4 GB, base 0 */
Graeme Russ109ad142011-12-31 10:24:36 +110066 [X86_GDT_ENTRY_32BIT_CS] = GDT_ENTRY(0xc09b, 0, 0xfffff),
Graeme Russ59c6d0e2010-10-07 20:03:21 +110067 /* DS: data, read/write, 4 GB, base 0 */
Graeme Russ109ad142011-12-31 10:24:36 +110068 [X86_GDT_ENTRY_32BIT_DS] = GDT_ENTRY(0xc093, 0, 0xfffff),
Graeme Russ59c6d0e2010-10-07 20:03:21 +110069 /* 16-bit CS: code, read/execute, 64 kB, base 0 */
Graeme Russ109ad142011-12-31 10:24:36 +110070 [X86_GDT_ENTRY_16BIT_CS] = GDT_ENTRY(0x109b, 0, 0x0ffff),
Graeme Russ59c6d0e2010-10-07 20:03:21 +110071 /* 16-bit DS: data, read/write, 64 kB, base 0 */
Graeme Russ109ad142011-12-31 10:24:36 +110072 [X86_GDT_ENTRY_16BIT_DS] = GDT_ENTRY(0x1093, 0, 0x0ffff),
Graeme Russ59c6d0e2010-10-07 20:03:21 +110073 };
74 static struct gdt_ptr gdt;
75
76 gdt.len = sizeof(boot_gdt)-1;
77 gdt.ptr = (u32)&boot_gdt;
78
79 asm volatile("lgdtl %0\n" \
80 "movl $((2+1)*8), %%ecx\n" \
81 "movl %%ecx, %%ds\n" \
82 "movl %%ecx, %%es\n" \
83 "movl %%ecx, %%fs\n" \
84 "movl %%ecx, %%gs\n" \
85 "movl %%ecx, %%ss" \
86 : : "m" (gdt) : "ecx");
87}
88
Graeme Russ0ea76e92011-02-12 15:11:35 +110089int x86_cpu_init_f(void)
wdenk2262cfe2002-11-18 00:14:45 +000090{
Graeme Russ0c24c9c2011-02-12 15:11:32 +110091 const u32 em_rst = ~X86_CR0_EM;
92 const u32 mp_ne_set = X86_CR0_MP | X86_CR0_NE;
93
wdenk7a8e9bed2003-05-31 18:35:21 +000094 /* initialize FPU, reset EM, set MP and NE */
95 asm ("fninit\n" \
Graeme Russ0c24c9c2011-02-12 15:11:32 +110096 "movl %%cr0, %%eax\n" \
97 "andl %0, %%eax\n" \
98 "orl %1, %%eax\n" \
99 "movl %%eax, %%cr0\n" \
100 : : "i" (em_rst), "i" (mp_ne_set) : "eax");
wdenk8bde7f72003-06-27 21:31:46 +0000101
Graeme Russ1c409bc2009-11-24 20:04:21 +1100102 return 0;
103}
Graeme Russ0ea76e92011-02-12 15:11:35 +1100104int cpu_init_f(void) __attribute__((weak, alias("x86_cpu_init_f")));
Graeme Russ1c409bc2009-11-24 20:04:21 +1100105
Graeme Russ0ea76e92011-02-12 15:11:35 +1100106int x86_cpu_init_r(void)
Graeme Russ1c409bc2009-11-24 20:04:21 +1100107{
Graeme Russ0ea76e92011-02-12 15:11:35 +1100108 const u32 nw_cd_rst = ~(X86_CR0_NW | X86_CR0_CD);
109
110 /* turn on the cache and disable write through */
111 asm("movl %%cr0, %%eax\n"
112 "andl %0, %%eax\n"
113 "movl %%eax, %%cr0\n"
114 "wbinvd\n" : : "i" (nw_cd_rst) : "eax");
115
Graeme Russ59c6d0e2010-10-07 20:03:21 +1100116 reload_gdt();
117
Graeme Russabf0cd32009-02-24 21:13:40 +1100118 /* Initialize core interrupt and exception functionality of CPU */
Graeme Russ717979f2011-11-08 02:33:13 +0000119 cpu_init_interrupts();
wdenk2262cfe2002-11-18 00:14:45 +0000120 return 0;
121}
Graeme Russ0ea76e92011-02-12 15:11:35 +1100122int cpu_init_r(void) __attribute__((weak, alias("x86_cpu_init_r")));
wdenk2262cfe2002-11-18 00:14:45 +0000123
Wolfgang Denk54841ab2010-06-28 22:00:46 +0200124int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
wdenk2262cfe2002-11-18 00:14:45 +0000125{
Graeme Russ717979f2011-11-08 02:33:13 +0000126 printf("resetting ...\n");
Graeme Russdbf71152011-04-13 19:43:26 +1000127
128 /* wait 50 ms */
129 udelay(50000);
wdenk2262cfe2002-11-18 00:14:45 +0000130 disable_interrupts();
131 reset_cpu(0);
132
133 /*NOTREACHED*/
134 return 0;
135}
136
Graeme Russ717979f2011-11-08 02:33:13 +0000137void flush_cache(unsigned long dummy1, unsigned long dummy2)
wdenk2262cfe2002-11-18 00:14:45 +0000138{
139 asm("wbinvd\n");
wdenk2262cfe2002-11-18 00:14:45 +0000140}
Graeme Russ3f5f18d2008-12-07 10:29:02 +1100141
142void __attribute__ ((regparm(0))) generate_gpf(void);
143
144/* segment 0x70 is an arbitrary segment which does not exist */
145asm(".globl generate_gpf\n"
Graeme Russ717979f2011-11-08 02:33:13 +0000146 ".hidden generate_gpf\n"
147 ".type generate_gpf, @function\n"
148 "generate_gpf:\n"
149 "ljmp $0x70, $0x47114711\n");
Graeme Russ3f5f18d2008-12-07 10:29:02 +1100150
151void __reset_cpu(ulong addr)
152{
Graeme Russfea25722011-04-13 19:43:28 +1000153 printf("Resetting using x86 Triple Fault\n");
Graeme Russ717979f2011-11-08 02:33:13 +0000154 set_vector(13, generate_gpf); /* general protection fault handler */
155 set_vector(8, generate_gpf); /* double fault handler */
156 generate_gpf(); /* start the show */
Graeme Russ3f5f18d2008-12-07 10:29:02 +1100157}
158void reset_cpu(ulong addr) __attribute__((weak, alias("__reset_cpu")));