blob: 81aff17e31d5fecbf670a90163f443d375b99eb5 [file] [log] [blame]
Konstantin Porotchkinf29eaad2021-05-11 08:11:24 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018-2021 Marvell International Ltd.
4 */
5
6#include "cn9130-db-A.dts"
7#include "cn9131-db.dtsi"
8
9/ {
10 model = "Marvell CN9131 development board (CP NOR) setup(A)";
11 compatible = "marvell,cn9131-db", "marvell,armada-ap806-quad",
12 "marvell,armada-ap806";
13};
14
15&cp1_comphy {
16 /* Serdes Configuration:
17 * Lane 0: PCIe0 (x2)
18 * Lane 1: PCIe0 (x2)
19 * Lane 2: unconnected
20 * Lane 3: USB1
21 * Lane 4: SFP (port 0)
22 * Lane 5: SATA1
23 */
24 phy0 {
25 phy-type = <COMPHY_TYPE_PEX0>;
26 };
27 phy1 {
28 phy-type = <COMPHY_TYPE_PEX0>;
29 };
30 phy2 {
31 phy-type = <COMPHY_TYPE_UNCONNECTED>;
32 };
33 phy3 {
34 phy-type = <COMPHY_TYPE_USB3_HOST1>;
35 };
36 phy4 {
37 phy-type = <COMPHY_TYPE_SFI0>;
38 phy-speed = <COMPHY_SPEED_10_3125G>;
39 };
40 phy5 {
41 phy-type = <COMPHY_TYPE_SATA1>;
42 };
43};
44
45&cp1_ethernet {
46 status = "okay";
47};
48
49/* CON50 */
50&cp1_eth0 {
51 status = "okay";
52 phy-mode = "sfi"; /* lane-4 */
53 marvell,sfp-tx-disable-gpio = <&cp1_gpio0 9 GPIO_ACTIVE_HIGH>;
54};