blob: d51a4d0b30e6c20e6f49ba49d5ed6d9e6301a7d6 [file] [log] [blame]
Konstantin Porotchkinf29eaad2021-05-11 08:11:24 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018-2021 Marvell International Ltd.
4 */
5
6#undef CP110_NAME
7#undef CP110_NUM
8#undef CP110_PCIE_MEM_SIZE
9#undef CP110_PCIEx_CPU_MEM_BASE
10#undef CP110_PCIEx_BUS_MEM_BASE
11
12/* CP110-2 Settings */
13#define CP110_NAME cp2
14#define CP110_NUM 2
15#define CP110_PCIE_MEM_SIZE(iface) (0xf00000)
16#define CP110_PCIEx_CPU_MEM_BASE(iface) (0xe5000000 + (iface) * 0x1000000)
17#define CP110_PCIEx_BUS_MEM_BASE(iface) (CP110_PCIEx_CPU_MEM_BASE(iface))
18
19#include "armada-cp110.dtsi"
20
21/ {
22 model = "Marvell CN9132 development board";
23 compatible = "marvell,cn9132-db";
24
25 aliases {
26 gpio5 = &cp2_gpio0;
27 gpio6 = &cp2_gpio1;
28 };
29
30 cp2 {
31 config-space {
32 sdhci@780000 {
33 vqmmc-supply = <&cp2_reg_sd_vccq>;
34 };
35
36 cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 {
37 compatible = "regulator-fixed";
38 regulator-name = "cp2-xhci0-vbus";
39 regulator-min-microvolt = <5000000>;
40 regulator-max-microvolt = <5000000>;
41 startup-delay-us = <100000>;
42 regulator-force-boot-off;
43 gpio = <&cp2_gpio0 2 GPIO_ACTIVE_HIGH>;
44 };
45
46 cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 {
47 compatible = "regulator-fixed";
48 regulator-name = "cp2-xhci1-vbus";
49 regulator-min-microvolt = <5000000>;
50 regulator-max-microvolt = <5000000>;
51 startup-delay-us = <100000>;
52 regulator-force-boot-off;
53 gpio = <&cp2_gpio0 3 GPIO_ACTIVE_HIGH>;
54 };
55 cp2_reg_sd_vccq: cp2_sd_vccq@0 {
56 compatible = "regulator-gpio";
57 regulator-name = "cp2_sd_vcc";
58 regulator-min-microvolt = <1800000>;
59 regulator-max-microvolt = <3300000>;
60 /* cp2_mpp49 */
61 gpios = <&cp2_gpio1 17 GPIO_ACTIVE_HIGH>;
62 states = <1800000 0x1
63 3300000 0x0>;
64 };
65 cp2_reg_usb3_current_lim0: cp2_usb3_current_limiter@0 {
66 compatible = "regulator-fixed";
67 regulator-min-microamp = <900000>;
68 regulator-max-microamp = <900000>;
69 regulator-force-boot-off;
70 gpio = <&cp2_gpio0 0 GPIO_ACTIVE_HIGH>;
71 };
72
73 cp2_reg_usb3_current_lim1: cp2_usb3_current_limiter@1 {
74 compatible = "regulator-fixed";
75 regulator-min-microamp = <900000>;
76 regulator-max-microamp = <900000>;
77 regulator-force-boot-off;
78 gpio = <&cp2_gpio0 1 GPIO_ACTIVE_HIGH>;
79 };
80 };
81 };
82};
83
84&cp2_i2c0 {
85 pinctrl-names = "default";
86 pinctrl-0 = <&cp2_i2c0_pins>;
87 status = "okay";
88 clock-frequency = <100000>;
89};
90
91&cp2_pinctl {
92 compatible = "marvell,mvebu-pinctrl",
93 "marvell,cp115-standalone-pinctrl";
94 bank-name ="cp2-110";
95
96 /* MPP Bus:
97 * [0-26] GPIO
98 * [27] SATA0_PRESENT_ACTIVEn
99 * [28] SATA1_PRESENT_ACTIVEn
100 * [29-31, 33] GPIO (Default)
101 * [32,34] SMI
102 * [37-38] I2C0
103 * [39-53] GPIO
104 * [54] SD_CRD_RSTn (out)
105 * [55] SD_CRD_DT (in)
106 * [56-62] SDIO
107 */
108 /* 0 1 2 3 4 5 6 7 8 9 */
109 pin-func = < 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
110 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
111 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x9 0x9 0x0
112 0x0 0x0 0x8 0x0 0x8 0x0 0x0 0x2 0x2 0x0
113 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
114 0x0 0x0 0x0 0x0 0xa 0xb 0xe 0xe 0xe 0xe
115 0xe 0xe 0xe >;
116
117 cp2_i2c0_pins: cp2-i2c-pins-0 {
118 marvell,pins = < 37 38 >;
119 marvell,function = <2>;
120 };
121
122 cp2_sdhci_pins: cp2-sdhi-pins-0 {
123 marvell,pins = < 56 57 58 59 60 61 >;
124 marvell,function = <14>;
125 };
126};
127
128&cp2_usb3_0 {
129 status = "okay";
130 vbus-supply = <&cp2_reg_usb3_vbus0>;
131 current-limiter = <&cp2_reg_usb3_current_lim0>;
132 vbus-disable-delay = <500>;
133};
134
135/* SLM-1521-V2, CON11 */
136&cp2_usb3_1 {
137 status = "okay";
138 vbus-supply = <&cp2_reg_usb3_vbus1>;
139 current-limiter = <&cp2_reg_usb3_current_lim1>;
140 vbus-disable-delay = <500>;
141 status = "okay";
142};
143
144&cp2_utmi0 {
145 status = "okay";
146};
147
148&cp2_utmi1 {
149 status = "okay";
150};
151
152&cp2_comphy {
153 phy0 {
154 phy-type = <COMPHY_TYPE_PEX0>;
155 };
156
157 phy1 {
158 phy-type = <COMPHY_TYPE_PEX0>;
159 };
160
161 phy2 {
162 phy-type = <COMPHY_TYPE_SATA0>;
163 };
164
165 phy3 {
166 phy-type = <COMPHY_TYPE_USB3_HOST1>;
167 };
168
169 phy4 {
170 phy-type = <COMPHY_TYPE_SFI0>;
171 phy-speed = <COMPHY_SPEED_10_3125G>;
172 };
173
174 phy5 {
175 phy-type = <COMPHY_TYPE_PEX2>;
176 };
177};
178
179&cp2_ethernet {
180 status = "okay";
181};
182
183/* SLM-1521-V2, CON9 */
184&cp2_eth0 {
185 status = "okay";
186 phy-mode = "sfi";
187};
188
189/* SLM-1521-V2, CON6 */
190&cp2_pcie0 {
191 /* non-prefetchable memory */
192 ranges =<0x82000000 0 0xe5000000 0 0xe5000000 0 0x1000000>;
193 num-lanes = <2>;
194 status = "okay";
195};
196
197/* SLM-1521-V2, CON8 */
198&cp2_pcie2 {
199 num-lanes = <1>;
200 status = "okay";
201};
202
203&cp2_pinctl {
204};
205
206/* SLM-1521-V2, CON4 */
207&cp2_sata0 {
208 status = "okay";
209};
210
211/* CON 2 on SLM-1683 - microSD */
212&cp2_sdhci0 {
213 pinctrl-names = "default";
214 pinctrl-0 = <&cp2_sdhci_pins>;
215 bus-width = <4>;
216 status = "okay";
217};