Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2018 Amarula Solutions. |
| 4 | * Author: Jagan Teki <jagan@amarulasolutions.com> |
| 5 | */ |
| 6 | |
Samuel Holland | 21d314a | 2021-09-12 11:48:43 -0500 | [diff] [blame] | 7 | #ifndef _CLK_SUNXI_H |
| 8 | #define _CLK_SUNXI_H |
Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 9 | |
Simon Glass | cd93d62 | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 10 | #include <linux/bitops.h> |
Simon Glass | cd93d62 | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 11 | |
Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 12 | /** |
Jagan Teki | 99ba430 | 2019-01-18 22:18:13 +0530 | [diff] [blame] | 13 | * enum ccu_flags - ccu clock/reset flags |
Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 14 | * |
| 15 | * @CCU_CLK_F_IS_VALID: is given clock gate is valid? |
Jagan Teki | 99ba430 | 2019-01-18 22:18:13 +0530 | [diff] [blame] | 16 | * @CCU_RST_F_IS_VALID: is given reset control is valid? |
Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 17 | */ |
| 18 | enum ccu_flags { |
| 19 | CCU_CLK_F_IS_VALID = BIT(0), |
Jagan Teki | 99ba430 | 2019-01-18 22:18:13 +0530 | [diff] [blame] | 20 | CCU_RST_F_IS_VALID = BIT(1), |
Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 21 | }; |
| 22 | |
| 23 | /** |
| 24 | * struct ccu_clk_gate - ccu clock gate |
| 25 | * @off: gate offset |
| 26 | * @bit: gate bit |
| 27 | * @flags: ccu clock gate flags |
| 28 | */ |
| 29 | struct ccu_clk_gate { |
| 30 | u16 off; |
| 31 | u32 bit; |
| 32 | enum ccu_flags flags; |
| 33 | }; |
| 34 | |
| 35 | #define GATE(_off, _bit) { \ |
| 36 | .off = _off, \ |
| 37 | .bit = _bit, \ |
| 38 | .flags = CCU_CLK_F_IS_VALID, \ |
| 39 | } |
| 40 | |
| 41 | /** |
Jagan Teki | 99ba430 | 2019-01-18 22:18:13 +0530 | [diff] [blame] | 42 | * struct ccu_reset - ccu reset |
| 43 | * @off: reset offset |
| 44 | * @bit: reset bit |
| 45 | * @flags: ccu reset control flags |
| 46 | */ |
| 47 | struct ccu_reset { |
| 48 | u16 off; |
| 49 | u32 bit; |
| 50 | enum ccu_flags flags; |
| 51 | }; |
| 52 | |
| 53 | #define RESET(_off, _bit) { \ |
| 54 | .off = _off, \ |
| 55 | .bit = _bit, \ |
| 56 | .flags = CCU_RST_F_IS_VALID, \ |
| 57 | } |
| 58 | |
| 59 | /** |
Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 60 | * struct ccu_desc - clock control unit descriptor |
| 61 | * |
| 62 | * @gates: clock gates |
Jagan Teki | 99ba430 | 2019-01-18 22:18:13 +0530 | [diff] [blame] | 63 | * @resets: reset unit |
Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 64 | */ |
| 65 | struct ccu_desc { |
| 66 | const struct ccu_clk_gate *gates; |
Jagan Teki | 99ba430 | 2019-01-18 22:18:13 +0530 | [diff] [blame] | 67 | const struct ccu_reset *resets; |
Jagan Teki | 0d47bc7 | 2018-12-22 21:32:49 +0530 | [diff] [blame] | 68 | }; |
| 69 | |
| 70 | /** |
| 71 | * struct ccu_priv - sunxi clock control unit |
| 72 | * |
| 73 | * @base: base address |
| 74 | * @desc: ccu descriptor |
| 75 | */ |
| 76 | struct ccu_priv { |
| 77 | void *base; |
| 78 | const struct ccu_desc *desc; |
| 79 | }; |
| 80 | |
| 81 | /** |
| 82 | * sunxi_clk_probe - common sunxi clock probe |
| 83 | * @dev: clock device |
| 84 | */ |
| 85 | int sunxi_clk_probe(struct udevice *dev); |
| 86 | |
| 87 | extern struct clk_ops sunxi_clk_ops; |
| 88 | |
Jagan Teki | 99ba430 | 2019-01-18 22:18:13 +0530 | [diff] [blame] | 89 | /** |
| 90 | * sunxi_reset_bind() - reset binding |
| 91 | * |
| 92 | * @dev: reset device |
| 93 | * @count: reset count |
Heinrich Schuchardt | 185f812 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 94 | * Return: 0 success, or error value |
Jagan Teki | 99ba430 | 2019-01-18 22:18:13 +0530 | [diff] [blame] | 95 | */ |
| 96 | int sunxi_reset_bind(struct udevice *dev, ulong count); |
| 97 | |
Samuel Holland | 21d314a | 2021-09-12 11:48:43 -0500 | [diff] [blame] | 98 | #endif /* _CLK_SUNXI_H */ |