Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007 |
| 4 | * Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com. |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * Epson RX8025 RTC driver. |
| 9 | */ |
| 10 | |
| 11 | #include <common.h> |
| 12 | #include <command.h> |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 13 | #include <dm.h> |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 14 | #include <i2c.h> |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 15 | #include <rtc.h> |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 16 | |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 17 | /*---------------------------------------------------------------------*/ |
| 18 | #undef DEBUG_RTC |
| 19 | |
| 20 | #ifdef DEBUG_RTC |
| 21 | #define DEBUGR(fmt,args...) printf(fmt ,##args) |
| 22 | #else |
| 23 | #define DEBUGR(fmt,args...) |
| 24 | #endif |
| 25 | /*---------------------------------------------------------------------*/ |
| 26 | |
Mathew McBride | 9ca4ae2 | 2021-09-17 06:46:02 +0000 | [diff] [blame^] | 27 | enum rx_model { |
| 28 | model_rx_8025, |
| 29 | model_rx_8035, |
| 30 | }; |
| 31 | |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 32 | /* |
| 33 | * RTC register addresses |
| 34 | */ |
| 35 | #define RTC_SEC_REG_ADDR 0x00 |
| 36 | #define RTC_MIN_REG_ADDR 0x01 |
| 37 | #define RTC_HR_REG_ADDR 0x02 |
| 38 | #define RTC_DAY_REG_ADDR 0x03 |
| 39 | #define RTC_DATE_REG_ADDR 0x04 |
| 40 | #define RTC_MON_REG_ADDR 0x05 |
| 41 | #define RTC_YR_REG_ADDR 0x06 |
| 42 | |
| 43 | #define RTC_CTL1_REG_ADDR 0x0e |
| 44 | #define RTC_CTL2_REG_ADDR 0x0f |
| 45 | |
| 46 | /* |
| 47 | * Control register 1 bits |
| 48 | */ |
| 49 | #define RTC_CTL1_BIT_2412 0x20 |
| 50 | |
| 51 | /* |
| 52 | * Control register 2 bits |
| 53 | */ |
| 54 | #define RTC_CTL2_BIT_PON 0x10 |
| 55 | #define RTC_CTL2_BIT_VDET 0x40 |
| 56 | #define RTC_CTL2_BIT_XST 0x20 |
| 57 | #define RTC_CTL2_BIT_VDSL 0x80 |
| 58 | |
| 59 | /* |
| 60 | * Note: the RX8025 I2C RTC requires register |
| 61 | * reads and write to consist of a single bus |
| 62 | * cycle. It is not allowed to write the register |
| 63 | * address in a first cycle that is terminated by |
| 64 | * a STOP condition. The chips needs a 'restart' |
| 65 | * sequence (start sequence without a prior stop). |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 66 | */ |
| 67 | |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 68 | #define rtc_read(reg) buf[(reg) & 0xf] |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 69 | |
Mathew McBride | 152ef91 | 2021-09-17 06:46:01 +0000 | [diff] [blame] | 70 | static int rtc_write(struct udevice *dev, uchar reg, uchar val); |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 71 | |
Mathew McBride | 9ca4ae2 | 2021-09-17 06:46:02 +0000 | [diff] [blame^] | 72 | static int rx8025_is_osc_stopped(enum rx_model model, int ctrl2) |
| 73 | { |
| 74 | int xstp = ctrl2 & RTC_CTL2_BIT_XST; |
| 75 | /* XSTP bit has different polarity on RX-8025 vs RX-8035. |
| 76 | * RX-8025: 0 == oscillator stopped |
| 77 | * RX-8035: 1 == oscillator stopped |
| 78 | */ |
| 79 | |
| 80 | if (model == model_rx_8025) |
| 81 | xstp = !xstp; |
| 82 | |
| 83 | return xstp; |
| 84 | } |
| 85 | |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 86 | /* |
| 87 | * Get the current time from the RTC |
| 88 | */ |
Mathew McBride | 152ef91 | 2021-09-17 06:46:01 +0000 | [diff] [blame] | 89 | static int rx8025_rtc_get(struct udevice *dev, struct rtc_time *tmp) |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 90 | { |
Yuri Tikhonov | b73a19e | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 91 | int rel = 0; |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 92 | uchar sec, min, hour, mday, wday, mon, year, ctl2; |
| 93 | uchar buf[16]; |
| 94 | |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 95 | if (dm_i2c_read(dev, 0, buf, sizeof(buf))) { |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 96 | printf("Error reading from RTC\n"); |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 97 | return -EIO; |
| 98 | } |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 99 | |
| 100 | sec = rtc_read(RTC_SEC_REG_ADDR); |
| 101 | min = rtc_read(RTC_MIN_REG_ADDR); |
| 102 | hour = rtc_read(RTC_HR_REG_ADDR); |
| 103 | wday = rtc_read(RTC_DAY_REG_ADDR); |
| 104 | mday = rtc_read(RTC_DATE_REG_ADDR); |
| 105 | mon = rtc_read(RTC_MON_REG_ADDR); |
| 106 | year = rtc_read(RTC_YR_REG_ADDR); |
| 107 | |
Heiko Schocher | f91fb72 | 2019-07-16 05:31:34 +0200 | [diff] [blame] | 108 | DEBUGR("Get RTC year: %02x mon: %02x mday: %02x wday: %02x " |
| 109 | "hr: %02x min: %02x sec: %02x\n", |
| 110 | year, mon, mday, wday, hour, min, sec); |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 111 | |
| 112 | /* dump status */ |
| 113 | ctl2 = rtc_read(RTC_CTL2_REG_ADDR); |
Yuri Tikhonov | b73a19e | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 114 | if (ctl2 & RTC_CTL2_BIT_PON) { |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 115 | printf("RTC: power-on detected\n"); |
Yuri Tikhonov | b73a19e | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 116 | rel = -1; |
| 117 | } |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 118 | |
Yuri Tikhonov | b73a19e | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 119 | if (ctl2 & RTC_CTL2_BIT_VDET) { |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 120 | printf("RTC: voltage drop detected\n"); |
Yuri Tikhonov | b73a19e | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 121 | rel = -1; |
| 122 | } |
Mathew McBride | 9ca4ae2 | 2021-09-17 06:46:02 +0000 | [diff] [blame^] | 123 | if (rx8025_is_osc_stopped(dev->driver_data, ctl2)) { |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 124 | printf("RTC: oscillator stop detected\n"); |
Yuri Tikhonov | b73a19e | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 125 | rel = -1; |
| 126 | } |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 127 | |
Heiko Schocher | f91fb72 | 2019-07-16 05:31:34 +0200 | [diff] [blame] | 128 | tmp->tm_sec = bcd2bin(sec & 0x7F); |
| 129 | tmp->tm_min = bcd2bin(min & 0x7F); |
Yuri Tikhonov | 5875d35 | 2008-08-15 15:42:09 +0200 | [diff] [blame] | 130 | if (rtc_read(RTC_CTL1_REG_ADDR) & RTC_CTL1_BIT_2412) |
Heiko Schocher | f91fb72 | 2019-07-16 05:31:34 +0200 | [diff] [blame] | 131 | tmp->tm_hour = bcd2bin(hour & 0x3F); |
Yuri Tikhonov | 5875d35 | 2008-08-15 15:42:09 +0200 | [diff] [blame] | 132 | else |
Heiko Schocher | f91fb72 | 2019-07-16 05:31:34 +0200 | [diff] [blame] | 133 | tmp->tm_hour = bcd2bin(hour & 0x1F) % 12 + |
Yuri Tikhonov | 5875d35 | 2008-08-15 15:42:09 +0200 | [diff] [blame] | 134 | ((hour & 0x20) ? 12 : 0); |
Heiko Schocher | f91fb72 | 2019-07-16 05:31:34 +0200 | [diff] [blame] | 135 | |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 136 | tmp->tm_mday = bcd2bin (mday & 0x3F); |
| 137 | tmp->tm_mon = bcd2bin (mon & 0x1F); |
| 138 | tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000); |
| 139 | tmp->tm_wday = bcd2bin (wday & 0x07); |
| 140 | tmp->tm_yday = 0; |
| 141 | tmp->tm_isdst= 0; |
| 142 | |
Heiko Schocher | f91fb72 | 2019-07-16 05:31:34 +0200 | [diff] [blame] | 143 | DEBUGR("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
| 144 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, |
| 145 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); |
Yuri Tikhonov | b73a19e | 2008-03-20 17:56:04 +0300 | [diff] [blame] | 146 | |
| 147 | return rel; |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 148 | } |
| 149 | |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 150 | /* |
| 151 | * Set the RTC |
| 152 | */ |
Mathew McBride | 152ef91 | 2021-09-17 06:46:01 +0000 | [diff] [blame] | 153 | static int rx8025_rtc_set(struct udevice *dev, const struct rtc_time *tmp) |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 154 | { |
Heiko Schocher | f91fb72 | 2019-07-16 05:31:34 +0200 | [diff] [blame] | 155 | DEBUGR("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", |
| 156 | tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, |
| 157 | tmp->tm_hour, tmp->tm_min, tmp->tm_sec); |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 158 | |
| 159 | if (tmp->tm_year < 1970 || tmp->tm_year > 2069) |
| 160 | printf("WARNING: year should be between 1970 and 2069!\n"); |
| 161 | |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 162 | if (rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100))) |
| 163 | return -EIO; |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 164 | |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 165 | if (rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon))) |
| 166 | return -EIO; |
Jean-Christophe PLAGNIOL-VILLARD | d1e2319 | 2008-09-01 23:06:23 +0200 | [diff] [blame] | 167 | |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 168 | if (rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday))) |
| 169 | return -EIO; |
| 170 | |
| 171 | if (rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday))) |
| 172 | return -EIO; |
| 173 | |
| 174 | if (rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour))) |
| 175 | return -EIO; |
| 176 | |
| 177 | if (rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min))) |
| 178 | return -EIO; |
| 179 | |
| 180 | if (rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec))) |
| 181 | return -EIO; |
| 182 | |
| 183 | return rtc_write(dev, RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412); |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 184 | } |
| 185 | |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 186 | /* |
Chris Packham | 402c8fd | 2018-03-21 15:40:37 +1300 | [diff] [blame] | 187 | * Reset the RTC |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 188 | */ |
Mathew McBride | 152ef91 | 2021-09-17 06:46:01 +0000 | [diff] [blame] | 189 | static int rx8025_rtc_reset(struct udevice *dev) |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 190 | { |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 191 | uchar buf[16]; |
| 192 | uchar ctl2; |
| 193 | |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 194 | if (dm_i2c_read(dev, 0, buf, sizeof(buf))) { |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 195 | printf("Error reading from RTC\n"); |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 196 | return -EIO; |
| 197 | } |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 198 | |
| 199 | ctl2 = rtc_read(RTC_CTL2_REG_ADDR); |
| 200 | ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET); |
Mathew McBride | 9ca4ae2 | 2021-09-17 06:46:02 +0000 | [diff] [blame^] | 201 | |
| 202 | if (dev->driver_data == model_rx_8035) |
| 203 | ctl2 &= ~(RTC_CTL2_BIT_XST); |
| 204 | else |
| 205 | ctl2 |= RTC_CTL2_BIT_XST; |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 206 | |
| 207 | return rtc_write(dev, RTC_CTL2_REG_ADDR, ctl2); |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 208 | } |
| 209 | |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 210 | /* |
| 211 | * Helper functions |
| 212 | */ |
Mathew McBride | 152ef91 | 2021-09-17 06:46:01 +0000 | [diff] [blame] | 213 | static int rtc_write(struct udevice *dev, uchar reg, uchar val) |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 214 | { |
| 215 | uchar buf[2]; |
| 216 | buf[0] = reg << 4; |
| 217 | buf[1] = val; |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 218 | |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 219 | if (dm_i2c_write(dev, 0, buf, 2)) { |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 220 | printf("Error writing to RTC\n"); |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 221 | return -EIO; |
| 222 | } |
| 223 | |
| 224 | return 0; |
Matthias Fuchs | 95c6bc7 | 2007-12-27 16:55:17 +0100 | [diff] [blame] | 225 | } |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 226 | |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 227 | static int rx8025_probe(struct udevice *dev) |
| 228 | { |
| 229 | uchar buf[16]; |
| 230 | int ret = 0; |
| 231 | |
| 232 | if (i2c_get_chip_offset_len(dev) != 1) |
| 233 | ret = i2c_set_chip_offset_len(dev, 1); |
| 234 | |
| 235 | if (ret) |
| 236 | return ret; |
| 237 | |
| 238 | return dm_i2c_read(dev, 0, buf, sizeof(buf)); |
| 239 | } |
| 240 | |
| 241 | static const struct rtc_ops rx8025_rtc_ops = { |
| 242 | .get = rx8025_rtc_get, |
| 243 | .set = rx8025_rtc_set, |
| 244 | .reset = rx8025_rtc_reset, |
| 245 | }; |
| 246 | |
| 247 | static const struct udevice_id rx8025_rtc_ids[] = { |
Mathew McBride | 9ca4ae2 | 2021-09-17 06:46:02 +0000 | [diff] [blame^] | 248 | { .compatible = "epson,rx8025", .data = model_rx_8025 }, |
| 249 | { .compatible = "epson,rx8035", .data = model_rx_8035 }, |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 250 | { } |
| 251 | }; |
| 252 | |
Mathew McBride | 9ca4ae2 | 2021-09-17 06:46:02 +0000 | [diff] [blame^] | 253 | U_BOOT_DRIVER(rx8025_rtc) = { |
Heiko Schocher | 0c4e81e | 2019-07-16 05:31:35 +0200 | [diff] [blame] | 254 | .name = "rx8025_rtc", |
| 255 | .id = UCLASS_RTC, |
| 256 | .probe = rx8025_probe, |
| 257 | .of_match = rx8025_rtc_ids, |
| 258 | .ops = &rx8025_rtc_ops, |
| 259 | }; |