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Vikas Manochae66c49f2016-02-11 15:47:20 -08001/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02002 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
3 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manochae66c49f2016-02-11 15:47:20 -08004 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Vikas Manochae66c49f2016-02-11 15:47:20 -080011#define CONFIG_SYS_FLASH_BASE 0x08000000
12#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
Vikas Manochab9747692017-05-28 12:55:10 -070013
14#ifdef CONFIG_SUPPORT_SPL
Vikas Manocha1a73bd82017-05-28 12:55:14 -070015#define CONFIG_SYS_TEXT_BASE 0x08008000
16#define CONFIG_SYS_LOAD_ADDR 0x08008000
Vikas Manochab9747692017-05-28 12:55:10 -070017#else
18#define CONFIG_SYS_TEXT_BASE CONFIG_SYS_FLASH_BASE
Vikas Manocha1a73bd82017-05-28 12:55:14 -070019#define CONFIG_SYS_LOAD_ADDR 0xC0400000
20#define CONFIG_LOADADDR 0xC0400000
Vikas Manochab9747692017-05-28 12:55:10 -070021#endif
Vikas Manochae66c49f2016-02-11 15:47:20 -080022
Vikas Manochae66c49f2016-02-11 15:47:20 -080023/*
24 * Configuration of the external SDRAM memory
25 */
26#define CONFIG_NR_DRAM_BANKS 1
Vikas Manochae66c49f2016-02-11 15:47:20 -080027
Vikas Manochaadcc90b2016-03-09 15:18:14 -080028#define CONFIG_SYS_MAX_FLASH_SECT 8
29#define CONFIG_SYS_MAX_FLASH_BANKS 1
Vikas Manochae66c49f2016-02-11 15:47:20 -080030
Vikas Manochae66c49f2016-02-11 15:47:20 -080031#define CONFIG_ENV_SIZE (8 << 10)
32
Vikas Manochaadcc90b2016-03-09 15:18:14 -080033#define CONFIG_STM32_FLASH
Vikas Manochae66c49f2016-02-11 15:47:20 -080034
Michael Kurzb20b70f2017-01-22 16:04:27 +010035#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
36#define CONFIG_DW_ALTDESCRIPTOR
37#define CONFIG_MII
Michael Kurzfc0d3db2017-01-22 16:04:29 +010038#define CONFIG_PHY_SMSC
Michael Kurzb20b70f2017-01-22 16:04:27 +010039
Toshifumi NISHINAGAba0a3c12016-07-08 01:02:24 +090040#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */
Vikas Manochae66c49f2016-02-11 15:47:20 -080041#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
42
43#define CONFIG_CMDLINE_TAG
44#define CONFIG_SETUP_MEMORY_TAGS
45#define CONFIG_INITRD_TAG
46#define CONFIG_REVISION_TAG
47
48#define CONFIG_SYS_CBSIZE 1024
Vikas Manochae66c49f2016-02-11 15:47:20 -080049
Michael Kurzb20b70f2017-01-22 16:04:27 +010050#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
Vikas Manochae66c49f2016-02-11 15:47:20 -080051
Vikas Manochae66c49f2016-02-11 15:47:20 -080052#define CONFIG_BOOTCOMMAND \
53 "run bootcmd_romfs"
54
Patrice Chotard4c82b032018-02-06 10:47:59 +010055#define CONFIG_ENV_VARS_UBOOT_CONFIG
Vikas Manochae66c49f2016-02-11 15:47:20 -080056#define CONFIG_EXTRA_ENV_SETTINGS \
57 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
58 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
59 "bootm 0x08044000 - 0x08042000\0"
60
Vikas Manochae66c49f2016-02-11 15:47:20 -080061
62/*
63 * Command line configuration.
64 */
65#define CONFIG_SYS_LONGHELP
Vikas Manochae66c49f2016-02-11 15:47:20 -080066#define CONFIG_AUTO_COMPLETE
67#define CONFIG_CMDLINE_EDITING
Vikas Manochadc11d832017-03-27 13:02:45 -070068#define CONFIG_CMD_CACHE
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070069#define CONFIG_BOARD_LATE_INIT
Vikas Manochaa241c242017-04-10 15:03:02 -070070#define CONFIG_DISPLAY_BOARDINFO
Vikas Manochab9747692017-05-28 12:55:10 -070071
72/* For SPL */
73#ifdef CONFIG_SUPPORT_SPL
74#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
75#define CONFIG_SPL_FRAMEWORK
Vikas Manochab9747692017-05-28 12:55:10 -070076#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
77#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
78#define CONFIG_SYS_SPL_LEN 0x00008000
Vikas Manocha1a73bd82017-05-28 12:55:14 -070079#define CONFIG_SYS_UBOOT_START 0x080083FD
Vikas Manochab9747692017-05-28 12:55:10 -070080#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
81 CONFIG_SYS_SPL_LEN)
Vikas Manocha55a3ef72017-05-28 12:55:13 -070082
Vikas Manocha55a3ef72017-05-28 12:55:13 -070083/* DT blob (fdt) address */
Vikas Manocha55a3ef72017-05-28 12:55:13 -070084#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
85 0x1C0000)
Vikas Manochab9747692017-05-28 12:55:10 -070086#endif
87/* For SPL ends */
88
Vikas Manochae66c49f2016-02-11 15:47:20 -080089#endif /* __CONFIG_H */