blob: ffd0d09ecee994a3a244dbcafde139ea46955571 [file] [log] [blame]
Dave Gerlach7cc98552020-08-05 22:44:29 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/dts-v1/;
7
8#include "k3-j7200-som-p0.dtsi"
9#include "k3-j7200-ddr-evm-lp4-1600.dtsi"
10#include "k3-j721e-ddr.dtsi"
11
12/ {
13 aliases {
14 remoteproc0 = &sysctrler;
15 remoteproc1 = &a72_0;
16 };
17
18 chosen {
19 stdout-path = &main_uart0;
20 tick-timer = &timer1;
21 };
22
23 a72_0: a72@0 {
24 compatible = "ti,am654-rproc";
25 reg = <0x0 0x00a90000 0x0 0x10>;
26 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
27 <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>;
28 resets = <&k3_reset 202 0>;
29 assigned-clocks = <&k3_clks 202 2>, <&k3_clks 61 1>;
30 assigned-clock-rates = <2000000000>, <200000000>;
31 ti,sci = <&dmsc>;
32 ti,sci-proc-id = <32>;
33 ti,sci-host-id = <10>;
34 u-boot,dm-spl;
35 };
36
37 clk_200mhz: dummy_clock_200mhz {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <200000000>;
41 u-boot,dm-spl;
42 };
43
44 clk_19_2mhz: dummy_clock_19_2mhz {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <19200000>;
48 u-boot,dm-spl;
49 };
50};
51
52&memorycontroller {
53 power-domains = <&k3_pds 8 TI_SCI_PD_SHARED>,
54 <&k3_pds 90 TI_SCI_PD_SHARED>;
55 clocks = <&k3_clks 8 5>, <&k3_clks 30 9>;
56};
57
58&cbass_mcu_wakeup {
59 mcu_secproxy: secproxy@2a380000 {
60 u-boot,dm-spl;
61 compatible = "ti,am654-secure-proxy";
62 reg = <0x0 0x2a380000 0x0 0x80000>,
63 <0x0 0x2a400000 0x0 0x80000>,
64 <0x0 0x2a480000 0x0 0x80000>;
65 reg-names = "rt", "scfg", "target_data";
66 #mbox-cells = <1>;
67 };
68
69 sysctrler: sysctrler {
70 u-boot,dm-spl;
71 compatible = "ti,am654-system-controller";
72 mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
73 mbox-names = "tx", "rx";
74 };
75};
76
77&dmsc {
78 mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
79 mbox-names = "tx", "rx", "notify";
80 ti,host-id = <4>;
81 ti,secure-host;
82};
83
84&wkup_pmx0 {
85 u-boot,dm-spl;
86 wkup_uart0_pins_default: wkup_uart0_pins_default {
87 u-boot,dm-spl;
88 pinctrl-single,pins = <
89 J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 0) /* (B14) WKUP_UART0_RXD */
90 J721E_WKUP_IOPAD(0xb4, PIN_OUTPUT, 0) /* (A14) WKUP_UART0_TXD */
91 >;
92 };
93
94 mcu_uart0_pins_default: mcu_uart0_pins_default {
95 u-boot,dm-spl;
96 pinctrl-single,pins = <
97 J721E_WKUP_IOPAD(0xf4, PIN_INPUT, 0) /* (D20) WKUP_GPIO0_13.MCU_UART0_RXD */
98 J721E_WKUP_IOPAD(0xf0, PIN_OUTPUT, 0) /* (D19) WKUP_GPIO0_12.MCU_UART0_TXD */
99 J721E_WKUP_IOPAD(0xf8, PIN_INPUT, 0) /* (E20) WKUP_GPIO0_14.MCU_UART0_CTSn */
100 J721E_WKUP_IOPAD(0xfc, PIN_OUTPUT, 0) /* (E21) WKUP_GPIO0_15.MCU_UART0_RTSn */
101 >;
102 };
103
104 wkup_i2c0_pins_default: wkup-i2c0-pins-default {
105 pinctrl-single,pins = <
106 J721E_WKUP_IOPAD(0x100, PIN_INPUT_PULLUP, 0) /* (F20) WKUP_I2C0_SCL */
107 J721E_WKUP_IOPAD(0x104, PIN_INPUT_PULLUP, 0) /* (H21) WKUP_I2C0_SDA */
108 >;
109 };
110};
111
112&main_pmx0 {
113 u-boot,dm-spl;
114
115 main_uart0_pins_default: main_uart0_pins_default {
116 u-boot,dm-spl;
117 pinctrl-single,pins = <
118 J721E_IOPAD(0xb0, PIN_INPUT, 0) /* (T16) UART0_RXD */
119 J721E_IOPAD(0xb4, PIN_OUTPUT, 0) /* (T17) UART0_TXD */
120 J721E_IOPAD(0xc0, PIN_INPUT, 2) /* (W3) SPI0_CS0.UART0_CTSn */
121 J721E_IOPAD(0xc4, PIN_OUTPUT, 2) /* (U5) SPI0_CS1.UART0_RTSn */
122 >;
123 };
124
125 main_i2c0_pins_default: main-i2c0-pins-default {
126 u-boot,dm-spl;
127 pinctrl-single,pins = <
128 J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */
129 J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */
130 >;
131 };
132};
133
134&wkup_uart0 {
135 u-boot,dm-spl;
136 pinctrl-names = "default";
137 pinctrl-0 = <&wkup_uart0_pins_default>;
138 status = "okay";
139};
140
141&mcu_uart0 {
142 /delete-property/ power-domains;
143 /delete-property/ clocks;
144 /delete-property/ clock-names;
145 pinctrl-names = "default";
146 pinctrl-0 = <&mcu_uart0_pins_default>;
147 status = "okay";
148 clock-frequency = <96000000>;
149};
150
151&main_uart0 {
152 status = "okay";
153 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
154 pinctrl-names = "default";
155 pinctrl-0 = <&main_uart0_pins_default>;
156 status = "okay";
157};
158
159&main_sdhci0 {
160 /delete-property/ power-domains;
161 /delete-property/ assigned-clocks;
162 /delete-property/ assigned-clock-parents;
163 clock-names = "clk_xin";
164 clocks = <&clk_200mhz>;
165 ti,driver-strength-ohm = <50>;
166 non-removable;
167 bus-width = <8>;
168};
169
170&main_sdhci1 {
171 /delete-property/ power-domains;
172 /delete-property/ assigned-clocks;
173 /delete-property/ assigned-clock-parents;
174 clock-names = "clk_xin";
175 clocks = <&clk_200mhz>;
176 ti,driver-strength-ohm = <50>;
177};
178
179&main_i2c0 {
180 pinctrl-names = "default";
181 pinctrl-0 = <&main_i2c0_pins_default>;
182 clock-frequency = <400000>;
183
184 exp1: gpio@20 {
185 compatible = "ti,tca6416";
186 reg = <0x20>;
187 gpio-controller;
188 #gpio-cells = <2>;
189 };
190
191 exp2: gpio@22 {
192 compatible = "ti,tca6424";
193 reg = <0x22>;
194 gpio-controller;
195 #gpio-cells = <2>;
196 };
197};
198
199#include "k3-j7200-common-proc-board-u-boot.dtsi"