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Kumar Gala44a23cf2008-01-16 22:33:22 -06001/*
Kumar Galad30f9042009-09-11 11:27:00 -05002 * Copyright 2008-2009 Freescale Semiconductor, Inc.
Kumar Gala44a23cf2008-01-16 22:33:22 -06003 *
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <common.h>
27#include <asm/processor.h>
28#include <asm/mmu.h>
Kumar Galaecf5b982008-12-16 14:59:20 -060029#ifdef CONFIG_ADDR_MAP
30#include <addr_map.h>
31#endif
32
33DECLARE_GLOBAL_DATA_PTR;
Kumar Gala44a23cf2008-01-16 22:33:22 -060034
Kumar Galab2eec282009-09-11 12:32:01 -050035void invalidate_tlb(u8 tlb)
36{
37 if (tlb == 0)
38 mtspr(MMUCSR0, 0x4);
39 if (tlb == 1)
40 mtspr(MMUCSR0, 0x2);
41}
42
43void init_tlbs(void)
44{
45 int i;
46
47 for (i = 0; i < num_tlb_entries; i++) {
48 write_tlb(tlb_table[i].mas0,
49 tlb_table[i].mas1,
50 tlb_table[i].mas2,
51 tlb_table[i].mas3,
52 tlb_table[i].mas7);
53 }
54
55 return ;
56}
57
Kumar Gala44a23cf2008-01-16 22:33:22 -060058void set_tlb(u8 tlb, u32 epn, u64 rpn,
59 u8 perms, u8 wimge,
60 u8 ts, u8 esel, u8 tsize, u8 iprot)
61{
62 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
63
64 _mas0 = FSL_BOOKE_MAS0(tlb, esel, 0);
65 _mas1 = FSL_BOOKE_MAS1(1, iprot, 0, ts, tsize);
66 _mas2 = FSL_BOOKE_MAS2(epn, wimge);
67 _mas3 = FSL_BOOKE_MAS3(rpn, 0, perms);
Kumar Galad30f9042009-09-11 11:27:00 -050068 _mas7 = FSL_BOOKE_MAS7(rpn);
Kumar Gala44a23cf2008-01-16 22:33:22 -060069
Kumar Galad30f9042009-09-11 11:27:00 -050070 write_tlb(_mas0, _mas1, _mas2, _mas3, _mas7);
Kumar Galaecf5b982008-12-16 14:59:20 -060071
72#ifdef CONFIG_ADDR_MAP
73 if ((tlb == 1) && (gd->flags & GD_FLG_RELOC))
74 addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), esel);
75#endif
Kumar Gala44a23cf2008-01-16 22:33:22 -060076}
77
78void disable_tlb(u8 esel)
79{
80 u32 _mas0, _mas1, _mas2, _mas3, _mas7;
81
82 _mas0 = FSL_BOOKE_MAS0(1, esel, 0);
83 _mas1 = 0;
84 _mas2 = 0;
85 _mas3 = 0;
86 _mas7 = 0;
87
88 mtspr(MAS0, _mas0);
89 mtspr(MAS1, _mas1);
90 mtspr(MAS2, _mas2);
91 mtspr(MAS3, _mas3);
92#ifdef CONFIG_ENABLE_36BIT_PHYS
93 mtspr(MAS7, _mas7);
94#endif
95 asm volatile("isync;msync;tlbwe;isync");
Kumar Galaecf5b982008-12-16 14:59:20 -060096
97#ifdef CONFIG_ADDR_MAP
98 if (gd->flags & GD_FLG_RELOC)
99 addrmap_set_entry(0, 0, 0, esel);
100#endif
Kumar Gala44a23cf2008-01-16 22:33:22 -0600101}
102
Kumar Galac2287af2009-09-03 08:20:24 -0500103static void tlbsx (const volatile unsigned *addr)
104{
105 __asm__ __volatile__ ("tlbsx 0,%0" : : "r" (addr), "m" (*addr));
106}
107
108/* return -1 if we didn't find anything */
109int find_tlb_idx(void *addr, u8 tlbsel)
110{
111 u32 _mas0, _mas1;
112
113 /* zero out Search PID, AS */
114 mtspr(MAS6, 0);
115
116 tlbsx(addr);
117
118 _mas0 = mfspr(MAS0);
119 _mas1 = mfspr(MAS1);
120
121 /* we found something, and its in the TLB we expect */
122 if ((MAS1_VALID & _mas1) &&
123 (MAS0_TLBSEL(tlbsel) == (_mas0 & MAS0_TLBSEL_MSK))) {
124 return ((_mas0 & MAS0_ESEL_MSK) >> 16);
125 }
126
127 return -1;
128}
129
Kumar Galaecf5b982008-12-16 14:59:20 -0600130#ifdef CONFIG_ADDR_MAP
131void init_addr_map(void)
132{
133 int i;
Kumar Galae393e2e2009-08-14 16:43:22 -0500134 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff;
Kumar Galaecf5b982008-12-16 14:59:20 -0600135
Kumar Galae393e2e2009-08-14 16:43:22 -0500136 /* walk all the entries */
137 for (i = 0; i < max_cam; i++) {
138 unsigned long epn;
Wolfgang Denk963f2f62009-08-22 23:27:26 +0200139 u32 tsize, _mas1;
Kumar Galae393e2e2009-08-14 16:43:22 -0500140 phys_addr_t rpn;
141
142 mtspr(MAS0, FSL_BOOKE_MAS0(1, i, 0));
143
144 asm volatile("tlbre;isync");
145 _mas1 = mfspr(MAS1);
146
147 /* if the entry isn't valid skip it */
148 if (!(_mas1 & MAS1_VALID))
Kumar Galaecf5b982008-12-16 14:59:20 -0600149 continue;
150
Kumar Galae393e2e2009-08-14 16:43:22 -0500151 tsize = (_mas1 >> 8) & 0xf;
152 epn = mfspr(MAS2) & MAS2_EPN;
153 rpn = mfspr(MAS3) & MAS3_RPN;
154#ifdef CONFIG_ENABLE_36BIT_PHYS
155 rpn |= ((phys_addr_t)mfspr(MAS7)) << 32;
156#endif
157
158 addrmap_set_entry(epn, rpn, (1UL << ((tsize * 2) + 10)), i);
Kumar Galaecf5b982008-12-16 14:59:20 -0600159 }
160
161 return ;
162}
163#endif
164
Haiying Wang95026432009-01-13 16:29:22 -0500165#ifndef CONFIG_SYS_DDR_TLB_START
166#define CONFIG_SYS_DDR_TLB_START 8
167#endif
168
Kumar Gala6fb1b732008-06-09 11:07:46 -0500169unsigned int setup_ddr_tlbs(unsigned int memsize_in_meg)
170{
171 unsigned int tlb_size;
Kumar Galaf8523cb2009-02-06 09:56:35 -0600172 unsigned int ram_tlb_index = CONFIG_SYS_DDR_TLB_START;
173 unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE;
Fredrik Arnerup90d13b82009-06-02 16:27:10 -0500174 unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf;
Kumar Galaf8523cb2009-02-06 09:56:35 -0600175 u64 size, memsize = (u64)memsize_in_meg << 20;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500176
Kumar Galaf8523cb2009-02-06 09:56:35 -0600177 size = min(memsize, CONFIG_MAX_MEM_MAPPED);
Kumar Gala6fb1b732008-06-09 11:07:46 -0500178
Kumar Galaf8523cb2009-02-06 09:56:35 -0600179 /* Convert (4^max) kB to (2^max) bytes */
180 max_cam = max_cam * 2 + 10;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500181
Kumar Galaf8523cb2009-02-06 09:56:35 -0600182 for (; size && ram_tlb_index < 16; ram_tlb_index++) {
183 u32 camsize = __ilog2_u64(size) & ~1U;
184 u32 align = __ilog2(ram_tlb_address) & ~1U;
185
186 if (align == -2) align = max_cam;
187 if (camsize > align)
188 camsize = align;
189
190 if (camsize > max_cam)
191 camsize = max_cam;
192
193 tlb_size = (camsize - 10) / 2;
194
Kumar Gala6fb1b732008-06-09 11:07:46 -0500195 set_tlb(1, ram_tlb_address, ram_tlb_address,
196 MAS3_SX|MAS3_SW|MAS3_SR, 0,
197 0, ram_tlb_index, tlb_size, 1);
198
Kumar Galaf8523cb2009-02-06 09:56:35 -0600199 size -= 1ULL << camsize;
200 memsize -= 1ULL << camsize;
201 ram_tlb_address += 1UL << camsize;
Kumar Gala6fb1b732008-06-09 11:07:46 -0500202 }
203
Kumar Galaf8523cb2009-02-06 09:56:35 -0600204 if (memsize)
Kumar Galad4b130d2009-06-11 23:40:34 -0500205 print_size(memsize, " left unmapped\n");
Kumar Galaf8523cb2009-02-06 09:56:35 -0600206
Kumar Gala6fb1b732008-06-09 11:07:46 -0500207 /*
208 * Confirm that the requested amount of memory was mapped.
209 */
210 return memsize_in_meg;
211}