| Jagannadha Sutradharudu Teki | 9e0802b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Xilinx ZC770 XM012 board DTS | ||||
| 3 | * | ||||
| Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 4 | * Copyright (C) 2013 - 2015 Xilinx, Inc. |
| Jagannadha Sutradharudu Teki | 9e0802b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ | ||||
| 7 | */ | ||||
| 8 | /dts-v1/; | ||||
| 9 | #include "zynq-7000.dtsi" | ||||
| 10 | |||||
| 11 | / { | ||||
| Jagannadha Sutradharudu Teki | 9e0802b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 12 | compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000"; |
| Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 13 | model = "Xilinx Zynq"; |
| Masahiro Yamada | 7d34c5d | 2014-05-15 20:37:54 +0900 | [diff] [blame] | 14 | |
| Masahiro Yamada | 9f9d41b | 2014-05-15 20:37:55 +0900 | [diff] [blame] | 15 | aliases { |
| Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 16 | i2c0 = &i2c0; |
| 17 | i2c1 = &i2c1; | ||||
| Masahiro Yamada | 9f9d41b | 2014-05-15 20:37:55 +0900 | [diff] [blame] | 18 | serial0 = &uart1; |
| Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 19 | spi0 = &spi1; |
| Masahiro Yamada | 9f9d41b | 2014-05-15 20:37:55 +0900 | [diff] [blame] | 20 | }; |
| 21 | |||||
| Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 22 | chosen { |
| Michal Simek | 4691941 | 2016-01-12 13:56:44 +0100 | [diff] [blame] | 23 | bootargs = "root=/dev/ram rw earlyprintk"; |
| 24 | stdout-path = "serial0:115200n8"; | ||||
| Masahiro Yamada | 7d34c5d | 2014-05-15 20:37:54 +0900 | [diff] [blame] | 25 | }; |
| Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 26 | |
| Michal Simek | f0600af | 2015-08-12 11:25:05 +0200 | [diff] [blame] | 27 | memory { |
| Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 28 | device_type = "memory"; |
| 29 | reg = <0x0 0x40000000>; | ||||
| 30 | }; | ||||
| 31 | }; | ||||
| 32 | |||||
| 33 | &spi1 { | ||||
| 34 | status = "okay"; | ||||
| 35 | num-cs = <4>; | ||||
| 36 | is-decoded-cs = <0>; | ||||
| 37 | }; | ||||
| 38 | |||||
| 39 | &can1 { | ||||
| 40 | status = "okay"; | ||||
| 41 | }; | ||||
| 42 | |||||
| 43 | &i2c0 { | ||||
| 44 | status = "okay"; | ||||
| 45 | clock-frequency = <400000>; | ||||
| 46 | |||||
| 47 | m24c02_eeprom@52 { | ||||
| 48 | compatible = "at,24c02"; | ||||
| 49 | reg = <0x52>; | ||||
| 50 | }; | ||||
| 51 | }; | ||||
| 52 | |||||
| 53 | &i2c1 { | ||||
| 54 | status = "okay"; | ||||
| 55 | clock-frequency = <400000>; | ||||
| 56 | |||||
| 57 | m24c02_eeprom@52 { | ||||
| 58 | compatible = "at,24c02"; | ||||
| 59 | reg = <0x52>; | ||||
| 60 | }; | ||||
| 61 | }; | ||||
| 62 | |||||
| 63 | &uart1 { | ||||
| Simon Glass | 035c6b2 | 2015-10-17 19:41:24 -0600 | [diff] [blame] | 64 | u-boot,dm-pre-reloc; |
| Michal Simek | 5c45b16 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 65 | status = "okay"; |
| Jagannadha Sutradharudu Teki | 9e0802b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 66 | }; |