blob: e892b59311adaea8a9aa2e18b185ddf9b0761ab6 [file] [log] [blame]
HeungJun, Kim89f95492012-01-16 21:13:05 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 * Heungjun Kim <riverful.kim@samsung.com>
4 *
5 * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
HeungJun, Kim89f95492012-01-16 21:13:05 +00008 */
9
Piotr Wilczekfe601642014-03-07 14:59:48 +010010#ifndef __CONFIG_TRATS_H
11#define __CONFIG_TRATS_H
HeungJun, Kim89f95492012-01-16 21:13:05 +000012
Simon Glass4c7bb1d2014-10-07 22:01:44 -060013#include <configs/exynos4-common.h>
HeungJun, Kim89f95492012-01-16 21:13:05 +000014
Piotr Wilczekfe601642014-03-07 14:59:48 +010015#define CONFIG_TRATS
16
Piotr Wilczekfe601642014-03-07 14:59:48 +010017#define CONFIG_TIZEN /* TIZEN lib */
HeungJun, Kim89f95492012-01-16 21:13:05 +000018
Łukasz Majewskic4e96db2014-01-14 08:02:26 +010019#define CONFIG_SYS_L2CACHE_OFF
Łukasz Majewskid0460b02012-08-07 05:42:14 +000020#ifndef CONFIG_SYS_L2CACHE_OFF
21#define CONFIG_SYS_L2_PL310
22#define CONFIG_SYS_PL310_BASE 0x10502000
23#endif
HeungJun, Kim89f95492012-01-16 21:13:05 +000024
Piotr Wilczekfe601642014-03-07 14:59:48 +010025/* TRATS has 4 banks of DRAM */
26#define CONFIG_NR_DRAM_BANKS 4
HeungJun, Kim89f95492012-01-16 21:13:05 +000027#define CONFIG_SYS_SDRAM_BASE 0x40000000
Piotr Wilczekfe601642014-03-07 14:59:48 +010028#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
Piotr Wilczekfe601642014-03-07 14:59:48 +010029#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
HeungJun, Kim89f95492012-01-16 21:13:05 +000030
Piotr Wilczekfe601642014-03-07 14:59:48 +010031/* memtest works on */
32#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
33#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
34#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
HeungJun, Kim89f95492012-01-16 21:13:05 +000035
HeungJun, Kim89f95492012-01-16 21:13:05 +000036/* select serial console configuration */
Piotr Wilczekfe601642014-03-07 14:59:48 +010037#define CONFIG_SERIAL2
HeungJun, Kim89f95492012-01-16 21:13:05 +000038
Piotr Wilczekfe601642014-03-07 14:59:48 +010039#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
HeungJun, Kim89f95492012-01-16 21:13:05 +000040
Łukasz Majewski0a1387b2015-04-01 12:34:29 +020041#define CONFIG_BOOTCOMMAND "run autoboot"
Dongjin Kim232ed3c2017-10-28 00:22:27 -040042#define CONFIG_DEFAULT_CONSOLE "ttySAC2,115200n8"
HeungJun, Kim89f95492012-01-16 21:13:05 +000043
Piotr Wilczekfe601642014-03-07 14:59:48 +010044#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
45 - GENERATED_GBL_DATA_SIZE)
46
47#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
48
49#define CONFIG_SYS_MONITOR_BASE 0x00000000
50
HeungJun, Kim89f95492012-01-16 21:13:05 +000051#define CONFIG_BOOTBLOCK "10"
52#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
53
Piotr Wilczekfe601642014-03-07 14:59:48 +010054#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
55#define CONFIG_ENV_SIZE 4096
56#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
57
58#define CONFIG_ENV_OVERWRITE
59
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010060/* Tizen - partitions definitions */
61#define PARTS_CSA "csa-mmc"
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010062#define PARTS_BOOT "boot"
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010063#define PARTS_QBOOT "qboot"
64#define PARTS_CSC "csc"
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010065#define PARTS_ROOT "platform"
66#define PARTS_DATA "data"
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010067#define PARTS_UMS "ums"
68
69#define PARTS_DEFAULT \
70 "uuid_disk=${uuid_gpt_disk};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010071 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
72 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
73 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010074 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010075 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
76 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010077 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
78
Lukasz Majewski93a1ab52012-08-06 14:41:11 +020079#define CONFIG_DFU_ALT \
Mateusz Zalegab7d42592014-04-28 21:13:25 +020080 "u-boot raw 0x80 0x400;" \
Łukasz Majewskidcb7eb62014-07-22 10:17:06 +020081 "/uImage ext4 0 2;" \
82 "/modem.bin ext4 0 2;" \
83 "/exynos4210-trats.dtb ext4 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010084 ""PARTS_CSA" part 0 1;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +010085 ""PARTS_BOOT" part 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010086 ""PARTS_QBOOT" part 0 3;" \
87 ""PARTS_CSC" part 0 4;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +010088 ""PARTS_ROOT" part 0 5;" \
89 ""PARTS_DATA" part 0 6;" \
Przemyslaw Marczaka0afc6f2014-01-22 12:02:47 +010090 ""PARTS_UMS" part 0 7;" \
Łukasz Majewski0a1387b2015-04-01 12:34:29 +020091 "params.bin raw 0x38 0x8;" \
92 "/Image.itb ext4 0 2\0"
Lukasz Majewski93a1ab52012-08-06 14:41:11 +020093
HeungJun, Kim89f95492012-01-16 21:13:05 +000094#define CONFIG_EXTRA_ENV_SETTINGS \
95 "bootk=" \
Piotr Wilczek425e26d2014-01-22 15:54:37 +010096 "run loaduimage;" \
97 "if run loaddtb; then " \
98 "bootm 0x40007FC0 - ${fdtaddr};" \
99 "fi;" \
100 "bootm 0x40007FC0;\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000101 "updatebackup=" \
Jaehoon Chung188c42b2014-04-30 09:09:15 +0900102 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
103 "mmc dev 0 0\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000104 "updatebootb=" \
105 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
106 "lpj=lpj=3981312\0" \
107 "nfsboot=" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000108 "setenv bootargs root=/dev/nfs rw " \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000109 "nfsroot=${nfsroot},nolock,tcp " \
110 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
111 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
112 "; run bootk\0" \
113 "ramfsboot=" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000114 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000115 "${console} ${meminfo} " \
116 "initrd=0x43000000,8M ramdisk=8192\0" \
117 "mmcboot=" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000118 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000119 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
Piotr Wilczek425e26d2014-01-22 15:54:37 +0100120 "run bootk\0" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000121 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000122 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
123 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
124 "verify=n\0" \
125 "rootfstype=ext4\0" \
Dongjin Kim232ed3c2017-10-28 00:22:27 -0400126 "console=" CONFIG_DEFAULT_CONSOLE "\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000127 "meminfo=crashkernel=32M@0x50000000\0" \
128 "nfsroot=/nfsroot/arm\0" \
129 "bootblock=" CONFIG_BOOTBLOCK "\0" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000130 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
Łukasz Majewski4ef400b2013-07-18 13:14:22 +0200131 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200132 "${fdtfile}\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000133 "mmcdev=0\0" \
134 "mmcbootpart=2\0" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000135 "mmcrootpart=5\0" \
Lukasz Majewski93a1ab52012-08-06 14:41:11 +0200136 "opts=always_resume=1\0" \
Lukasz Majewski9960d9a2012-12-11 11:09:48 +0100137 "partitions=" PARTS_DEFAULT \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000138 "dfu_alt_info=" CONFIG_DFU_ALT \
139 "spladdr=0x40000100\0" \
140 "splsize=0x200\0" \
141 "splfile=falcon.bin\0" \
142 "spl_export=" \
143 "setexpr spl_imgsize ${splsize} + 8 ;" \
Przemyslaw Marczakdc993a62013-03-12 03:41:49 +0000144 "setenv spl_imgsize 0x${spl_imgsize};" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000145 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
146 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
147 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
148 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
149 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
150 "spl export atags 0x40007FC0;" \
151 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
152 "mw.l ${spl_addr_tmp} ${splsize};" \
153 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
154 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
155 "setenv spl_imgsize;" \
156 "setenv spl_imgaddr;" \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200157 "setenv spl_addr_tmp;\0" \
Łukasz Majewski0a1387b2015-04-01 12:34:29 +0200158 CONFIG_EXTRA_ENV_ITB \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200159 "fdtaddr=40800000\0" \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200160
Łukasz Majewski35777e22013-01-02 06:06:02 +0000161/* Falcon mode definitions */
Piotr Wilczekfe601642014-03-07 14:59:48 +0100162#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
HeungJun, Kim89f95492012-01-16 21:13:05 +0000163
Lukasz Majewski9960d9a2012-12-11 11:09:48 +0100164/* GPT */
Lukasz Majewski9960d9a2012-12-11 11:09:48 +0100165
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100166/* Security subsystem - enable hw_rand() */
167#define CONFIG_EXYNOS_ACE_SHA
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100168
Przemyslaw Marczak679549d2014-01-22 11:24:12 +0100169/* Common misc for Samsung */
170#define CONFIG_MISC_COMMON
171
172#define CONFIG_MISC_INIT_R
173
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100174/* Download menu - Samsung common */
175#define CONFIG_LCD_MENU
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100176
177/* Download menu - definitions for check keys */
178#ifndef __ASSEMBLY__
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100179
180#define KEY_PWR_PMIC_NAME "MAX8997_PMIC"
181#define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1
182#define KEY_PWR_STATUS_MASK (1 << 0)
183#define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1
184#define KEY_PWR_INTERRUPT_MASK (1 << 0)
185
Akshay Saraswat9b97b722014-05-13 10:30:15 +0530186#define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20
187#define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100188#endif /* __ASSEMBLY__ */
189
190/* LCD console */
191#define LCD_BPP LCD_COLOR16
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100192
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000193/* LCD */
Przemyslaw Marczak2df21cb2014-01-22 11:24:16 +0100194#define CONFIG_BMP_16BPP
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000195#define CONFIG_FB_ADDR 0x52504000
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000196#define CONFIG_EXYNOS_MIPI_DSIM
Donghwa Lee90464972012-05-09 19:23:46 +0000197#define CONFIG_VIDEO_BMP_GZIP
Przemyslaw Marczak903afe12013-11-29 18:30:43 +0100198#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000199
HeungJun, Kim89f95492012-01-16 21:13:05 +0000200#endif /* __CONFIG_H */