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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Soeren Moch05d492a2014-11-03 13:57:01 +01002/*
3 * Copyright (C) 2014 Soeren Moch <smoch@web.de>
4 *
5 * Configuration settings for the TBS2910 MatrixARM board.
Soeren Moch05d492a2014-11-03 13:57:01 +01006 */
7
8#ifndef __TBS2910_CONFIG_H
9#define __TBS2910_CONFIG_H
10
11#include "mx6_common.h"
Soeren Moch05d492a2014-11-03 13:57:01 +010012
13/* General configuration */
Soeren Moch05d492a2014-11-03 13:57:01 +010014
15#define CONFIG_MACH_TYPE 3980
16
Soeren Moch05d492a2014-11-03 13:57:01 +010017#define CONFIG_SYS_HZ 1000
18
Adrian Alonso1368f992015-09-02 13:54:13 -050019#define CONFIG_IMX_THERMAL
Soeren Mochfbd18aa2015-05-29 20:32:41 +020020
Soeren Moch05d492a2014-11-03 13:57:01 +010021/* Physical Memory Map */
Soeren Moch05d492a2014-11-03 13:57:01 +010022#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
23
24#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
25#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
26#define CONFIG_SYS_INIT_SP_OFFSET \
27 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
28#define CONFIG_SYS_INIT_SP_ADDR \
29 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
30
31#define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
32
33#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
34#define CONFIG_SYS_MEMTEST_END \
35 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
36
Soeren Moch29138c62016-09-21 13:16:21 +020037#define CONFIG_SYS_BOOTMAPSZ 0x10000000
Soeren Moch05d492a2014-11-03 13:57:01 +010038
39/* Serial console */
40#define CONFIG_MXC_UART
41#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */
Soeren Moch05d492a2014-11-03 13:57:01 +010042
Soeren Moch05d492a2014-11-03 13:57:01 +010043/* Filesystems / image support */
Soeren Moch05d492a2014-11-03 13:57:01 +010044
45/* MMC */
Soeren Moch05d492a2014-11-03 13:57:01 +010046#define CONFIG_SYS_FSL_USDHC_NUM 3
47#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
Soeren Moch9927d602015-05-05 23:09:21 +020048#define CONFIG_SUPPORT_EMMC_BOOT
Soeren Moch05d492a2014-11-03 13:57:01 +010049
50/* Ethernet */
51#define CONFIG_FEC_MXC
Soeren Moch05d492a2014-11-03 13:57:01 +010052#define CONFIG_FEC_MXC
Soeren Moch05d492a2014-11-03 13:57:01 +010053#define IMX_FEC_BASE ENET_BASE_ADDR
54#define CONFIG_FEC_XCV_TYPE RGMII
55#define CONFIG_ETHPRIME "FEC"
56#define CONFIG_FEC_MXC_PHYADDR 4
Soeren Moch05d492a2014-11-03 13:57:01 +010057#define CONFIG_PHY_ATHEROS
58
59/* Framebuffer */
Soeren Moch05d492a2014-11-03 13:57:01 +010060#ifdef CONFIG_VIDEO
61#define CONFIG_VIDEO_IPUV3
Soeren Moch05d492a2014-11-03 13:57:01 +010062#define CONFIG_VIDEO_BMP_RLE8
63#define CONFIG_IMX_HDMI
64#define CONFIG_IMX_VIDEO_SKIP
Soeren Moch05d492a2014-11-03 13:57:01 +010065#endif
66
67/* PCI */
Soeren Moch05d492a2014-11-03 13:57:01 +010068#ifdef CONFIG_CMD_PCI
Soeren Moch05d492a2014-11-03 13:57:01 +010069#define CONFIG_PCI_SCAN_SHOW
70#define CONFIG_PCIE_IMX
71#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
72#endif
73
74/* SATA */
Soeren Moch05d492a2014-11-03 13:57:01 +010075#ifdef CONFIG_CMD_SATA
Soeren Moch05d492a2014-11-03 13:57:01 +010076#define CONFIG_SYS_SATA_MAX_DEVICE 1
77#define CONFIG_DWC_AHSATA_PORT_ID 0
78#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
79#define CONFIG_LBA48
Soeren Moch05d492a2014-11-03 13:57:01 +010080#endif
81
82/* USB */
Soeren Moch05d492a2014-11-03 13:57:01 +010083#ifdef CONFIG_CMD_USB
Soeren Moch05d492a2014-11-03 13:57:01 +010084#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
Soeren Mochd8962762015-05-05 23:09:18 +020085#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Soeren Moch05d492a2014-11-03 13:57:01 +010086#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
Soeren Moch6628aa52015-02-26 19:50:02 +010087#ifdef CONFIG_CMD_USB_MASS_STORAGE
Soeren Moch6628aa52015-02-26 19:50:02 +010088#define CONFIG_USBD_HS
Soeren Moch6628aa52015-02-26 19:50:02 +010089#endif /* CONFIG_CMD_USB_MASS_STORAGE */
Soeren Moch05d492a2014-11-03 13:57:01 +010090#ifdef CONFIG_USB_KEYBOARD
Soeren Moch54ca1832015-05-05 23:09:19 +020091#define CONFIG_PREBOOT \
Soeren Moch8741a372016-07-27 16:07:16 +020092 "usb start; " \
Soeren Moch54ca1832015-05-05 23:09:19 +020093 "if hdmidet; then " \
Soeren Moch8741a372016-07-27 16:07:16 +020094 "run set_con_hdmi; " \
Soeren Moch54ca1832015-05-05 23:09:19 +020095 "else " \
96 "run set_con_serial; " \
97 "fi;"
Soeren Moch05d492a2014-11-03 13:57:01 +010098#endif /* CONFIG_USB_KEYBOARD */
99#endif /* CONFIG_CMD_USB */
100
101/* RTC */
Soeren Moch05d492a2014-11-03 13:57:01 +0100102#ifdef CONFIG_CMD_DATE
Soeren Moch05d492a2014-11-03 13:57:01 +0100103#define CONFIG_RTC_DS1307
104#define CONFIG_SYS_RTC_BUS_NUM 2
105#endif
106
107/* I2C */
Soeren Moch05d492a2014-11-03 13:57:01 +0100108#ifdef CONFIG_CMD_I2C
109#define CONFIG_SYS_I2C
110#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +0200111#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
112#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -0700113#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Soeren Moch05d492a2014-11-03 13:57:01 +0100114#define CONFIG_SYS_I2C_SPEED 100000
115#define CONFIG_I2C_EDID
116#endif
117
Peter Robinson056845c2015-05-22 17:30:45 +0100118/* Environment organization */
Soeren Mocha6684362016-02-04 14:41:16 +0100119#define CONFIG_SYS_MMC_ENV_DEV 2 /* overwritten on SD boot */
120#define CONFIG_SYS_MMC_ENV_PART 1 /* overwritten on SD boot */
Soeren Moch05d492a2014-11-03 13:57:01 +0100121#define CONFIG_ENV_SIZE (8 * 1024)
122#define CONFIG_ENV_OFFSET (384 * 1024)
123#define CONFIG_ENV_OVERWRITE
124
Soeren Mochb82c7c32019-01-05 09:31:17 +0100125#define CONFIG_BOARD_SIZE_LIMIT 392192 /* (CONFIG_ENV_OFFSET - 1024) */
126
Soeren Moch05d492a2014-11-03 13:57:01 +0100127#define CONFIG_EXTRA_ENV_SETTINGS \
128 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
129 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
130 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
131 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
132 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
133 "${bootargs_mmc3}\0" \
134 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
135 "rdinit=/sbin/init enable_wait_mode=off\0" \
136 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
Soeren Mochb9a16092015-10-01 22:48:04 +0200137 "mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
Soeren Moch05d492a2014-11-03 13:57:01 +0100138 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
139 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
140 "run bootargs_upd; " \
141 "bootm 0x10800000 0x10d00000\0" \
142 "console=ttymxc0\0" \
143 "fan=gpio set 92\0" \
Soeren Moch8741a372016-07-27 16:07:16 +0200144 "set_con_serial=setenv stdout serial; " \
Soeren Moch54ca1832015-05-05 23:09:19 +0200145 "setenv stderr serial;\0" \
Soeren Moch8741a372016-07-27 16:07:16 +0200146 "set_con_hdmi=setenv stdout serial,vga; " \
147 "setenv stderr serial,vga;\0" \
Soeren Moch8ce747f2016-07-27 16:07:17 +0200148 "stderr=serial,vga;\0" \
149 "stdin=serial,usbkbd;\0" \
150 "stdout=serial,vga;\0"
Soeren Moch05d492a2014-11-03 13:57:01 +0100151
152#define CONFIG_BOOTCOMMAND \
153 "mmc rescan; " \
154 "if run bootcmd_up1; then " \
155 "run bootcmd_up2; " \
156 "else " \
157 "run bootcmd_mmc; " \
158 "fi"
159
160#endif /* __TBS2910_CONFIG_H * */