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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Hans de Goede1d624a42015-04-25 14:07:37 +02002/*
3 * (C) Copyright 2015 Hans de Goede <hdegoede@redhat.com>
4 *
5 * Sunxi PMIC bus access helpers
6 *
7 * The axp152 & axp209 use an i2c bus, the axp221 uses the p2wi bus and the
8 * axp223 uses the rsb bus, these functions abstract this.
Hans de Goede1d624a42015-04-25 14:07:37 +02009 */
10
Samuel Holland104950a2021-10-08 00:17:20 -050011#include <axp_pmic.h>
Hans de Goede1d624a42015-04-25 14:07:37 +020012#include <common.h>
Samuel Holland8b0eacd2021-10-08 00:17:23 -050013#include <dm.h>
Hans de Goede1d624a42015-04-25 14:07:37 +020014#include <asm/arch/p2wi.h>
15#include <asm/arch/rsb.h>
Hans de Goedea5360772015-04-25 22:18:09 +020016#include <i2c.h>
Samuel Holland8b0eacd2021-10-08 00:17:23 -050017#include <power/pmic.h>
Hans de Goede1d624a42015-04-25 14:07:37 +020018#include <asm/arch/pmic_bus.h>
19
Hans de Goedea5360772015-04-25 22:18:09 +020020#define AXP152_I2C_ADDR 0x30
21
22#define AXP209_I2C_ADDR 0x34
23
Jernej Skrabecfbd37d82021-01-11 21:11:33 +010024#define AXP305_I2C_ADDR 0x36
25
Hans de Goede1d624a42015-04-25 14:07:37 +020026#define AXP221_CHIP_ADDR 0x68
Hans de Goede1d624a42015-04-25 14:07:37 +020027
Samuel Holland8b0eacd2021-10-08 00:17:23 -050028#if CONFIG_IS_ENABLED(PMIC_AXP)
29static struct udevice *pmic;
30#else
Samuel Hollandd3b02982021-10-08 00:17:22 -050031static int pmic_i2c_address(void)
32{
33 if (IS_ENABLED(CONFIG_AXP152_POWER))
34 return AXP152_I2C_ADDR;
35 if (IS_ENABLED(CONFIG_AXP305_POWER))
36 return AXP305_I2C_ADDR;
37
38 /* Other AXP2xx and AXP8xx variants */
39 return AXP209_I2C_ADDR;
40}
Samuel Holland8b0eacd2021-10-08 00:17:23 -050041#endif
Samuel Hollandd3b02982021-10-08 00:17:22 -050042
Hans de Goede1d624a42015-04-25 14:07:37 +020043int pmic_bus_init(void)
44{
45 /* This cannot be 0 because it is used in SPL before BSS is ready */
46 static int needs_init = 1;
Samuel Hollandd3b02982021-10-08 00:17:22 -050047 int ret = 0;
Hans de Goede1d624a42015-04-25 14:07:37 +020048
49 if (!needs_init)
50 return 0;
51
Samuel Holland8b0eacd2021-10-08 00:17:23 -050052#if CONFIG_IS_ENABLED(PMIC_AXP)
53 ret = uclass_get_device_by_driver(UCLASS_PMIC, DM_DRIVER_GET(axp_pmic),
54 &pmic);
55#else
Samuel Hollandd3b02982021-10-08 00:17:22 -050056 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI)) {
57 p2wi_init();
58 ret = p2wi_change_to_p2wi_mode(AXP221_CHIP_ADDR,
59 AXP_PMIC_MODE_REG,
60 AXP_PMIC_MODE_P2WI);
61 } else if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB)) {
62 ret = rsb_init();
63 if (ret)
64 return ret;
Hans de Goede1d624a42015-04-25 14:07:37 +020065
Samuel Hollandd3b02982021-10-08 00:17:22 -050066 ret = rsb_set_device_address(AXP_PMIC_PRI_DEVICE_ADDR,
67 AXP_PMIC_PRI_RUNTIME_ADDR);
68 }
Samuel Holland8b0eacd2021-10-08 00:17:23 -050069#endif
Hans de Goede1d624a42015-04-25 14:07:37 +020070
Samuel Hollandd3b02982021-10-08 00:17:22 -050071 needs_init = ret;
72
73 return ret;
Hans de Goede1d624a42015-04-25 14:07:37 +020074}
75
76int pmic_bus_read(u8 reg, u8 *data)
77{
Samuel Holland8b0eacd2021-10-08 00:17:23 -050078#if CONFIG_IS_ENABLED(PMIC_AXP)
79 return pmic_read(pmic, reg, data, 1);
80#else
Samuel Hollandd3b02982021-10-08 00:17:22 -050081 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
82 return p2wi_read(reg, data);
83 if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
84 return rsb_read(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
85
86 return i2c_read(pmic_i2c_address(), reg, 1, data, 1);
Samuel Holland8b0eacd2021-10-08 00:17:23 -050087#endif
Hans de Goede1d624a42015-04-25 14:07:37 +020088}
89
90int pmic_bus_write(u8 reg, u8 data)
91{
Samuel Holland8b0eacd2021-10-08 00:17:23 -050092#if CONFIG_IS_ENABLED(PMIC_AXP)
93 return pmic_write(pmic, reg, &data, 1);
94#else
Samuel Hollandd3b02982021-10-08 00:17:22 -050095 if (IS_ENABLED(CONFIG_SYS_I2C_SUN6I_P2WI))
96 return p2wi_write(reg, data);
97 if (IS_ENABLED(CONFIG_SYS_I2C_SUN8I_RSB))
98 return rsb_write(AXP_PMIC_PRI_RUNTIME_ADDR, reg, data);
99
100 return i2c_write(pmic_i2c_address(), reg, 1, &data, 1);
Samuel Holland8b0eacd2021-10-08 00:17:23 -0500101#endif
Hans de Goede1d624a42015-04-25 14:07:37 +0200102}
103
104int pmic_bus_setbits(u8 reg, u8 bits)
105{
106 int ret;
107 u8 val;
108
109 ret = pmic_bus_read(reg, &val);
110 if (ret)
111 return ret;
112
Olliver Schinaglc970e892018-11-21 20:05:26 +0200113 if ((val & bits) == bits)
114 return 0;
115
Hans de Goede1d624a42015-04-25 14:07:37 +0200116 val |= bits;
117 return pmic_bus_write(reg, val);
118}
119
120int pmic_bus_clrbits(u8 reg, u8 bits)
121{
122 int ret;
123 u8 val;
124
125 ret = pmic_bus_read(reg, &val);
126 if (ret)
127 return ret;
128
Olliver Schinaglc970e892018-11-21 20:05:26 +0200129 if (!(val & bits))
130 return 0;
131
Hans de Goede1d624a42015-04-25 14:07:37 +0200132 val &= ~bits;
133 return pmic_bus_write(reg, val);
134}