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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenk507bbe32004-04-18 21:13:41 +00002/*
Michal Simek93768392015-12-01 14:24:20 +01003 * (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu>
Michal Simek53ea9812008-07-11 10:10:31 +02004 * Clean driver and add xilinx constant from header file
wdenk507bbe32004-04-18 21:13:41 +00005 *
Michal Simek53ea9812008-07-11 10:10:31 +02006 * (C) Copyright 2004 Atmark Techno, Inc.
wdenk507bbe32004-04-18 21:13:41 +00007 * Yasushi SHOJI <yashi@atmark-techno.com>
wdenk507bbe32004-04-18 21:13:41 +00008 */
9
10#include <config.h>
Michal Simek49a23e42011-09-25 21:03:08 +000011#include <common.h>
Michal Simek93768392015-12-01 14:24:20 +010012#include <dm.h>
Michal Simek53ea9812008-07-11 10:10:31 +020013#include <asm/io.h>
Simon Glasscd93d622020-05-10 11:40:13 -060014#include <linux/bitops.h>
Michal Simek49a23e42011-09-25 21:03:08 +000015#include <linux/compiler.h>
16#include <serial.h>
wdenk507bbe32004-04-18 21:13:41 +000017
Michal Simek93768392015-12-01 14:24:20 +010018#define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */
19#define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */
20#define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */
21#define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */
wdenk507bbe32004-04-18 21:13:41 +000022
Michal Simek8c3bd6b2014-01-21 07:29:47 +010023#define ULITE_CONTROL_RST_TX 0x01
24#define ULITE_CONTROL_RST_RX 0x02
25
Michal Simek49a23e42011-09-25 21:03:08 +000026struct uartlite {
27 unsigned int rx_fifo;
28 unsigned int tx_fifo;
29 unsigned int status;
Michal Simek8c3bd6b2014-01-21 07:29:47 +010030 unsigned int control;
Michal Simek49a23e42011-09-25 21:03:08 +000031};
wdenk507bbe32004-04-18 21:13:41 +000032
Michal Simek93768392015-12-01 14:24:20 +010033struct uartlite_platdata {
34 struct uartlite *regs;
Michal Simek49a23e42011-09-25 21:03:08 +000035};
36
Michal Simek93768392015-12-01 14:24:20 +010037static int uartlite_serial_putc(struct udevice *dev, const char ch)
Michal Simek49a23e42011-09-25 21:03:08 +000038{
Michal Simek93768392015-12-01 14:24:20 +010039 struct uartlite_platdata *plat = dev_get_platdata(dev);
40 struct uartlite *regs = plat->regs;
Michal Simek49a23e42011-09-25 21:03:08 +000041
Michal Simek93768392015-12-01 14:24:20 +010042 if (in_be32(&regs->status) & SR_TX_FIFO_FULL)
43 return -EAGAIN;
Michal Simek49a23e42011-09-25 21:03:08 +000044
Michal Simek93768392015-12-01 14:24:20 +010045 out_be32(&regs->tx_fifo, ch & 0xff);
46
47 return 0;
Michal Simek49a23e42011-09-25 21:03:08 +000048}
49
Michal Simek93768392015-12-01 14:24:20 +010050static int uartlite_serial_getc(struct udevice *dev)
Michal Simek49a23e42011-09-25 21:03:08 +000051{
Michal Simek93768392015-12-01 14:24:20 +010052 struct uartlite_platdata *plat = dev_get_platdata(dev);
53 struct uartlite *regs = plat->regs;
Michal Simek49a23e42011-09-25 21:03:08 +000054
Michal Simek93768392015-12-01 14:24:20 +010055 if (!(in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA))
56 return -EAGAIN;
Michal Simek49a23e42011-09-25 21:03:08 +000057
Michal Simek49a23e42011-09-25 21:03:08 +000058 return in_be32(&regs->rx_fifo) & 0xff;
59}
60
Michal Simek93768392015-12-01 14:24:20 +010061static int uartlite_serial_pending(struct udevice *dev, bool input)
Michal Simek49a23e42011-09-25 21:03:08 +000062{
Michal Simek93768392015-12-01 14:24:20 +010063 struct uartlite_platdata *plat = dev_get_platdata(dev);
64 struct uartlite *regs = plat->regs;
Michal Simek49a23e42011-09-25 21:03:08 +000065
Michal Simek93768392015-12-01 14:24:20 +010066 if (input)
67 return in_be32(&regs->status) & SR_RX_FIFO_VALID_DATA;
68
69 return !(in_be32(&regs->status) & SR_TX_FIFO_EMPTY);
Michal Simek49a23e42011-09-25 21:03:08 +000070}
71
Michal Simek93768392015-12-01 14:24:20 +010072static int uartlite_serial_probe(struct udevice *dev)
Michal Simek25239e12012-07-02 10:32:18 +020073{
Michal Simek93768392015-12-01 14:24:20 +010074 struct uartlite_platdata *plat = dev_get_platdata(dev);
75 struct uartlite *regs = plat->regs;
Michal Simek8c3bd6b2014-01-21 07:29:47 +010076
Michal Simek93768392015-12-01 14:24:20 +010077 out_be32(&regs->control, 0);
78 out_be32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
79 in_be32(&regs->control);
Michal Simek8c3bd6b2014-01-21 07:29:47 +010080
Michal Simek93768392015-12-01 14:24:20 +010081 return 0;
Michal Simek25239e12012-07-02 10:32:18 +020082}
83
Michal Simek93768392015-12-01 14:24:20 +010084static int uartlite_serial_ofdata_to_platdata(struct udevice *dev)
Michal Simek49a23e42011-09-25 21:03:08 +000085{
Michal Simek93768392015-12-01 14:24:20 +010086 struct uartlite_platdata *plat = dev_get_platdata(dev);
Michal Simek25239e12012-07-02 10:32:18 +020087
Masahiro Yamada8613c8d2020-07-17 14:36:46 +090088 plat->regs = dev_read_addr_ptr(dev);
Michal Simek93768392015-12-01 14:24:20 +010089
90 return 0;
Michal Simek49a23e42011-09-25 21:03:08 +000091}
Marek Vasut87d69222012-09-12 19:45:58 +020092
Michal Simek93768392015-12-01 14:24:20 +010093static const struct dm_serial_ops uartlite_serial_ops = {
94 .putc = uartlite_serial_putc,
95 .pending = uartlite_serial_pending,
96 .getc = uartlite_serial_getc,
97};
98
99static const struct udevice_id uartlite_serial_ids[] = {
100 { .compatible = "xlnx,opb-uartlite-1.00.b", },
101 { .compatible = "xlnx,xps-uartlite-1.00.a" },
102 { }
103};
104
105U_BOOT_DRIVER(serial_uartlite) = {
106 .name = "serial_uartlite",
107 .id = UCLASS_SERIAL,
108 .of_match = uartlite_serial_ids,
109 .ofdata_to_platdata = uartlite_serial_ofdata_to_platdata,
110 .platdata_auto_alloc_size = sizeof(struct uartlite_platdata),
111 .probe = uartlite_serial_probe,
112 .ops = &uartlite_serial_ops,
Michal Simek93768392015-12-01 14:24:20 +0100113};
Michal Simek4166ba32015-12-14 16:55:10 +0100114
115#ifdef CONFIG_DEBUG_UART_UARTLITE
116
117#include <debug_uart.h>
118
119static inline void _debug_uart_init(void)
120{
121 struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
122
123 out_be32(&regs->control, 0);
124 out_be32(&regs->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
125 in_be32(&regs->control);
126}
127
128static inline void _debug_uart_putc(int ch)
129{
130 struct uartlite *regs = (struct uartlite *)CONFIG_DEBUG_UART_BASE;
131
132 while (in_be32(&regs->status) & SR_TX_FIFO_FULL)
133 ;
134
135 out_be32(&regs->tx_fifo, ch & 0xff);
136}
137
138DEBUG_UART_FUNCS
139#endif