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Steve Sakomand34efc72010-06-08 13:07:46 -07001/*
2 *
Sricharan508a58f2011-11-15 09:49:55 -05003 * Common functions for OMAP4/5 based boards
Steve Sakomand34efc72010-06-08 13:07:46 -07004 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 *
8 * Author :
9 * Aneesh V <aneesh@ti.com>
10 * Steve Sakoman <steve@sakoman.com>
11 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Steve Sakomand34efc72010-06-08 13:07:46 -070013 */
14#include <common.h>
Tom Rini47f7bca2012-08-13 12:03:19 -070015#include <spl.h>
Steve Sakomand34efc72010-06-08 13:07:46 -070016#include <asm/arch/sys_proto.h>
Alexey Brodkin1ace4022014-02-26 17:47:58 +040017#include <linux/sizes.h>
Sricharanbb772a52011-11-15 09:50:00 -050018#include <asm/emif.h>
SRICHARAN R01b753f2013-02-04 04:22:00 +000019#include <asm/omap_common.h>
Lokesh Vutlad4d986e2013-02-12 01:33:45 +000020#include <linux/compiler.h>
R Sricharande63ac22013-03-04 20:04:45 +000021#include <asm/system.h>
22
Nishanth Menon93e35682010-11-19 11:19:40 -050023DECLARE_GLOBAL_DATA_PTR;
24
Aneesh V469ec1e2011-07-21 09:10:01 -040025void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
26{
27 int i;
28 struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
29
30 for (i = 0; i < size; i++, pad++)
31 writew(pad->val, base + pad->offset);
32}
33
Aneesh V469ec1e2011-07-21 09:10:01 -040034static void set_mux_conf_regs(void)
35{
Sricharan508a58f2011-11-15 09:49:55 -050036 switch (omap_hw_init_context()) {
Aneesh V469ec1e2011-07-21 09:10:01 -040037 case OMAP_INIT_CONTEXT_SPL:
Paul Kocialkowski3ef56e62016-02-27 19:18:56 +010038 set_muxconf_regs();
Aneesh V469ec1e2011-07-21 09:10:01 -040039 break;
40 case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
Aneesh V469ec1e2011-07-21 09:10:01 -040041 break;
42 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
43 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
Paul Kocialkowski3ef56e62016-02-27 19:18:56 +010044 set_muxconf_regs();
Aneesh V469ec1e2011-07-21 09:10:01 -040045 break;
46 }
47}
48
Sricharan508a58f2011-11-15 09:49:55 -050049u32 cortex_rev(void)
Aneesh Vad577c82011-07-21 09:10:04 -040050{
51
52 unsigned int rev;
53
54 /* Read Main ID Register (MIDR) */
55 asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
56
57 return rev;
58}
59
Tom Rini0ac6db22013-05-31 10:44:23 -040060static void omap_rev_string(void)
Aneesh Vad577c82011-07-21 09:10:04 -040061{
Sricharan508a58f2011-11-15 09:49:55 -050062 u32 omap_rev = omap_revision();
Lokesh Vutlade626882013-02-12 21:29:03 +000063 u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
Sricharan508a58f2011-11-15 09:49:55 -050064 u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
65 u32 major_rev = (omap_rev & 0x00000F00) >> 8;
66 u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
Aneesh Vad577c82011-07-21 09:10:04 -040067
Daniel Allred47c331e2016-05-19 19:10:52 -050068 const char *sec_s;
69
70 switch (get_device_type()) {
71 case TST_DEVICE:
72 sec_s = "TST";
73 break;
74 case EMU_DEVICE:
75 sec_s = "EMU";
76 break;
77 case HS_DEVICE:
78 sec_s = "HS";
79 break;
80 case GP_DEVICE:
81 sec_s = "GP";
82 break;
83 default:
84 sec_s = "?";
85 }
86
Lokesh Vutlade626882013-02-12 21:29:03 +000087 if (soc_variant)
88 printf("OMAP");
89 else
90 printf("DRA");
Daniel Allred47c331e2016-05-19 19:10:52 -050091 printf("%x-%s ES%x.%x\n", omap_variant, sec_s, major_rev, minor_rev);
Aneesh Vad577c82011-07-21 09:10:04 -040092}
93
Sricharan78f455c2011-11-15 09:50:03 -050094#ifdef CONFIG_SPL_BUILD
Tom Rini861a86f2012-08-13 11:37:56 -070095void spl_display_print(void)
96{
97 omap_rev_string();
98}
Sricharan78f455c2011-11-15 09:50:03 -050099#endif
100
Lokesh Vutlad4d986e2013-02-12 01:33:45 +0000101void __weak srcomp_enable(void)
102{
103}
104
Kipisz, Stevend88d6c82016-02-24 12:30:57 -0600105/**
106 * do_board_detect() - Detect board description
107 *
108 * Function to detect board description. This is expected to be
109 * overridden in the SoC family board file where desired.
110 */
111void __weak do_board_detect(void)
112{
113}
114
Keerthy61462cd2016-05-24 11:45:05 +0530115/**
116 * vcores_init() - Assign omap_vcores based on board
117 *
118 * Function to pick the vcores based on board. This is expected to be
119 * overridden in the SoC family board file where desired.
120 */
121void __weak vcores_init(void)
122{
123}
124
Lokesh Vutlae850ed82016-03-07 14:49:54 +0530125void s_init(void)
126{
127}
128
129/**
130 * early_system_init - Does Early system initialization.
131 *
132 * Does early system init of watchdog, muxing, andclocks
Aneesh V469ec1e2011-07-21 09:10:01 -0400133 * Watchdog disable is done always. For the rest what gets done
Lokesh Vutlae850ed82016-03-07 14:49:54 +0530134 * depends on the boot mode in which this function is executed when
135 * 1. SPL running from SRAM
136 * 2. U-Boot running from FLASH
137 * 3. U-Boot loaded to SDRAM by SPL
138 * 4. U-Boot loaded to SDRAM by ROM code using the
Aneesh V469ec1e2011-07-21 09:10:01 -0400139 * Configuration Header feature
140 * Please have a look at the respective functions to see what gets
141 * done in each of these cases
142 * This function is called with SRAM stack.
Steve Sakomand34efc72010-06-08 13:07:46 -0700143 */
Lokesh Vutlae850ed82016-03-07 14:49:54 +0530144void early_system_init(void)
Steve Sakomand34efc72010-06-08 13:07:46 -0700145{
Sricharan508a58f2011-11-15 09:49:55 -0500146 init_omap_revision();
SRICHARAN R01b753f2013-02-04 04:22:00 +0000147 hw_data_init();
148
Lokesh Vutla38f25b12012-05-29 19:26:43 +0000149#ifdef CONFIG_SPL_BUILD
Lokesh Vutla663f6fc2016-07-12 14:47:41 +0530150 if (warm_reset())
Lokesh Vutla38f25b12012-05-29 19:26:43 +0000151 force_emif_self_refresh();
152#endif
Steve Sakomand34efc72010-06-08 13:07:46 -0700153 watchdog_init();
Aneesh V469ec1e2011-07-21 09:10:01 -0400154 set_mux_conf_regs();
Aneesh Vbcae7212011-07-21 09:10:21 -0400155#ifdef CONFIG_SPL_BUILD
Lokesh Vutlad4d986e2013-02-12 01:33:45 +0000156 srcomp_enable();
Aneesh V4ecfcfa2011-09-08 11:05:56 -0400157 do_io_settings();
Aneesh Vbcae7212011-07-21 09:10:21 -0400158#endif
Kipisz, Steven93e62532016-02-24 12:30:52 -0600159 setup_early_clocks();
Kipisz, Stevend88d6c82016-02-24 12:30:57 -0600160 do_board_detect();
Keerthy61462cd2016-05-24 11:45:05 +0530161 vcores_init();
Aneesh V37768012011-07-21 09:10:07 -0400162 prcm_init();
Simon Glass7ae83502015-03-03 08:03:02 -0700163}
164
Aneesh Vbcae7212011-07-21 09:10:21 -0400165#ifdef CONFIG_SPL_BUILD
Simon Glass7ae83502015-03-03 08:03:02 -0700166void board_init_f(ulong dummy)
167{
Lokesh Vutlae850ed82016-03-07 14:49:54 +0530168 early_system_init();
Lokesh Vutla7b922522014-08-04 19:42:24 +0530169#ifdef CONFIG_BOARD_EARLY_INIT_F
170 board_early_init_f();
171#endif
Aneesh Vbcae7212011-07-21 09:10:21 -0400172 /* For regular u-boot sdram_init() is called from dram_init() */
173 sdram_init();
Steve Sakomand34efc72010-06-08 13:07:46 -0700174}
Simon Glass7ae83502015-03-03 08:03:02 -0700175#endif
Steve Sakomand34efc72010-06-08 13:07:46 -0700176
Lokesh Vutlae850ed82016-03-07 14:49:54 +0530177int arch_cpu_init_dm(void)
178{
179 early_system_init();
180 return 0;
181}
182
Steve Sakomand34efc72010-06-08 13:07:46 -0700183/*
184 * Routine: wait_for_command_complete
185 * Description: Wait for posting to finish on watchdog
186 */
187void wait_for_command_complete(struct watchdog *wd_base)
188{
189 int pending = 1;
190 do {
191 pending = readl(&wd_base->wwps);
192 } while (pending);
193}
194
195/*
196 * Routine: watchdog_init
197 * Description: Shut down watch dogs
198 */
199void watchdog_init(void)
200{
201 struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
202
203 writel(WD_UNLOCK1, &wd2_base->wspr);
204 wait_for_command_complete(wd2_base);
205 writel(WD_UNLOCK2, &wd2_base->wspr);
206}
207
Aneesh V7ca3f9c2010-09-12 10:32:55 +0530208
209/*
210 * This function finds the SDRAM size available in the system
211 * based on DMM section configurations
212 * This is needed because the size of memory installed may be
213 * different on different versions of the board
214 */
Sricharan508a58f2011-11-15 09:49:55 -0500215u32 omap_sdram_size(void)
Aneesh V7ca3f9c2010-09-12 10:32:55 +0530216{
SRICHARAN Re06e9142012-05-17 00:12:06 +0000217 u32 section, i, valid;
218 u64 sdram_start = 0, sdram_end = 0, addr,
Lokesh Vutlad7630da2014-05-12 13:49:33 +0530219 size, total_size = 0, trap_size = 0, trap_start = 0;
Sricharanbb772a52011-11-15 09:50:00 -0500220
Aneesh V7ca3f9c2010-09-12 10:32:55 +0530221 for (i = 0; i < 4; i++) {
Sricharanbb772a52011-11-15 09:50:00 -0500222 section = __raw_readl(DMM_BASE + i*4);
SRICHARAN Re06e9142012-05-17 00:12:06 +0000223 valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
224 (EMIF_SDRC_ADDRSPC_SHIFT);
Sricharanbb772a52011-11-15 09:50:00 -0500225 addr = section & EMIF_SYS_ADDR_MASK;
SRICHARAN Re06e9142012-05-17 00:12:06 +0000226
Aneesh V7ca3f9c2010-09-12 10:32:55 +0530227 /* See if the address is valid */
Tom Rini939911a2014-05-16 13:02:24 -0400228 if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
229 (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
Sricharanbb772a52011-11-15 09:50:00 -0500230 size = ((section & EMIF_SYS_SIZE_MASK) >>
231 EMIF_SYS_SIZE_SHIFT);
232 size = 1 << size;
233 size *= SZ_16M;
SRICHARAN Re06e9142012-05-17 00:12:06 +0000234
235 if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
236 if (!sdram_start || (addr < sdram_start))
237 sdram_start = addr;
238 if (!sdram_end || ((addr + size) > sdram_end))
239 sdram_end = addr + size;
240 } else {
241 trap_size = size;
Lokesh Vutlad7630da2014-05-12 13:49:33 +0530242 trap_start = addr;
SRICHARAN Re06e9142012-05-17 00:12:06 +0000243 }
Aneesh V7ca3f9c2010-09-12 10:32:55 +0530244 }
245 }
Lokesh Vutlad7630da2014-05-12 13:49:33 +0530246
247 if ((trap_start >= sdram_start) && (trap_start < sdram_end))
248 total_size = (sdram_end - sdram_start) - (trap_size);
249 else
250 total_size = sdram_end - sdram_start;
Sricharanbb772a52011-11-15 09:50:00 -0500251
Aneesh V7ca3f9c2010-09-12 10:32:55 +0530252 return total_size;
253}
254
255
Steve Sakomand34efc72010-06-08 13:07:46 -0700256/*
257 * Routine: dram_init
258 * Description: sets uboots idea of sdram size
259 */
260int dram_init(void)
261{
Aneesh V2ae610f2011-07-21 09:10:09 -0400262 sdram_init();
Sricharan508a58f2011-11-15 09:49:55 -0500263 gd->ram_size = omap_sdram_size();
Steve Sakomand34efc72010-06-08 13:07:46 -0700264 return 0;
265}
266
267/*
268 * Print board information
269 */
270int checkboard(void)
271{
272 puts(sysinfo.board_string);
273 return 0;
274}
275
Steve Sakoman2ad853c2010-07-15 13:43:10 -0700276/*
Sricharan508a58f2011-11-15 09:49:55 -0500277 * get_device_type(): tell if GP/HS/EMU/TST
278 */
279u32 get_device_type(void)
Aneesh V8b457fa2011-06-16 23:30:52 +0000280{
Lokesh Vutlac43c8332013-02-04 04:22:04 +0000281 return (readl((*ctrl)->control_status) &
SRICHARAN Rc1fa3c32012-03-12 02:25:43 +0000282 (DEVICE_TYPE_MASK)) >> DEVICE_TYPE_SHIFT;
Aneesh V8b457fa2011-06-16 23:30:52 +0000283}
284
Masahiro Yamada365475e2014-02-13 18:30:26 +0900285#if defined(CONFIG_DISPLAY_CPUINFO)
Sricharan508a58f2011-11-15 09:49:55 -0500286/*
287 * Print CPU information
288 */
289int print_cpuinfo(void)
Aneesh V8b457fa2011-06-16 23:30:52 +0000290{
Andreas Müller761ca312012-01-04 15:26:24 +0000291 puts("CPU : ");
292 omap_rev_string();
Sricharan508a58f2011-11-15 09:49:55 -0500293
294 return 0;
295}
Masahiro Yamada365475e2014-02-13 18:30:26 +0900296#endif