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wdenk3d3befa2004-03-14 15:06:13 +00001/*
2 * (C) Copyright 2001
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2001-2004
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2003
9 * Texas Instruments, <www.ti.com>
10 * Kshitij Gupta <Kshitij@ti.com>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
32#include <linux/byteorder/swab.h>
33
34#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
35flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
36
37/* Board support for 1 or 2 flash devices */
38#undef FLASH_PORT_WIDTH32
39#define FLASH_PORT_WIDTH16
40
41#ifdef FLASH_PORT_WIDTH16
42#define FLASH_PORT_WIDTH ushort
43#define FLASH_PORT_WIDTHV vu_short
44#define SWAP(x) __swab16(x)
45#else
46#define FLASH_PORT_WIDTH ulong
47#define FLASH_PORT_WIDTHV vu_long
48#define SWAP(x) __swab32(x)
49#endif
50
51#define FPW FLASH_PORT_WIDTH
52#define FPWV FLASH_PORT_WIDTHV
53
54#define mb() __asm__ __volatile__ ("" : : : "memory")
55
56
57/* Flash Organization Structure */
58typedef struct OrgDef {
59 unsigned int sector_number;
60 unsigned int sector_size;
61} OrgDef;
62
63
64/* Flash Organizations */
65OrgDef OrgIntel_28F256L18T[] = {
66 {4, 32 * 1024}, /* 4 * 32kBytes sectors */
67 {255, 128 * 1024}, /* 255 * 128kBytes sectors */
68};
69
70
71/*-----------------------------------------------------------------------
72 * Functions
73 */
74unsigned long flash_init (void);
75static ulong flash_get_size (FPW * addr, flash_info_t * info);
76static int write_data (flash_info_t * info, ulong dest, FPW data);
77static void flash_get_offsets (ulong base, flash_info_t * info);
78void inline spin_wheel (void);
79void flash_print_info (flash_info_t * info);
80void flash_unprotect_sectors (FPWV * addr);
81int flash_erase (flash_info_t * info, int s_first, int s_last);
82int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
83
84/*-----------------------------------------------------------------------
85 */
86
87unsigned long flash_init (void)
88{
89 int i;
90 ulong size = 0;
91 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
92 switch (i) {
93 case 0:
94 flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
95 flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
96 break;
97 default:
98 panic ("configured too many flash banks!\n");
99 break;
100 }
101 size += flash_info[i].size;
102 }
103
104 /* Protect monitor and environment sectors
105 */
106 flash_protect (FLAG_PROTECT_SET,
107 CFG_FLASH_BASE,
108 CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
109
110 return size;
111}
112
113/*-----------------------------------------------------------------------
114 */
115static void flash_get_offsets (ulong base, flash_info_t * info)
116{
117 int i;
118 OrgDef *pOrgDef;
119
120 pOrgDef = OrgIntel_28F256L18T;
121 if (info->flash_id == FLASH_UNKNOWN) {
122 return;
123 }
124
125 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
126 for (i = 0; i < info->sector_count; i++) {
127 if (i > 255) {
128 info->start[i] = base + (i * 0x8000);
129 info->protect[i] = 0;
130 } else {
131 info->start[i] = base +
132 (i * PHYS_FLASH_SECT_SIZE);
133 info->protect[i] = 0;
134 }
135 }
136 }
137}
138
139/*-----------------------------------------------------------------------
140 */
141void flash_print_info (flash_info_t * info)
142{
143 int i;
144
145 if (info->flash_id == FLASH_UNKNOWN) {
146 printf ("missing or unknown FLASH type\n");
147 return;
148 }
149
150 switch (info->flash_id & FLASH_VENDMASK) {
151 case FLASH_MAN_INTEL:
152 printf ("INTEL ");
153 break;
154 default:
155 printf ("Unknown Vendor ");
156 break;
157 }
158
159 switch (info->flash_id & FLASH_TYPEMASK) {
160 case FLASH_28F256L18T:
161 printf ("FLASH 28F256L18T\n");
162 break;
163 default:
164 printf ("Unknown Chip Type\n");
165 break;
166 }
167
168 printf (" Size: %ld MB in %d Sectors\n",
169 info->size >> 20, info->sector_count);
170
171 printf (" Sector Start Addresses:");
172 for (i = 0; i < info->sector_count; ++i) {
173 if ((i % 5) == 0)
174 printf ("\n ");
175 printf (" %08lX%s",
176 info->start[i], info->protect[i] ? " (RO)" : " ");
177 }
178 printf ("\n");
179 return;
180}
181
182/*
183 * The following code cannot be run from FLASH!
184 */
185static ulong flash_get_size (FPW * addr, flash_info_t * info)
186{
187 volatile FPW value;
188
189 /* Write auto select command: read Manufacturer ID */
190 addr[0x5555] = (FPW) 0x00AA00AA;
191 addr[0x2AAA] = (FPW) 0x00550055;
192 addr[0x5555] = (FPW) 0x00900090;
193
194 mb ();
195 value = addr[0];
196
197 switch (value) {
198
199 case (FPW) INTEL_MANUFACT:
200 info->flash_id = FLASH_MAN_INTEL;
201 break;
202
203 default:
204 info->flash_id = FLASH_UNKNOWN;
205 info->sector_count = 0;
206 info->size = 0;
207 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
208 return (0); /* no or unknown flash */
209 }
210
211 mb ();
212 value = addr[1]; /* device ID */
213 switch (value) {
214
215 case (FPW) (INTEL_ID_28F256L18T):
216 info->flash_id += FLASH_28F256L18T;
217 info->sector_count = 259;
218 info->size = 0x02000000;
219 break; /* => 32 MB */
220
221 default:
222 info->flash_id = FLASH_UNKNOWN;
223 break;
224 }
225
226 if (info->sector_count > CFG_MAX_FLASH_SECT) {
227 printf ("** ERROR: sector count %d > max (%d) **\n",
228 info->sector_count, CFG_MAX_FLASH_SECT);
229 info->sector_count = CFG_MAX_FLASH_SECT;
230 }
231
232 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
233
234 return (info->size);
235}
236
237
238/* unprotects a sector for write and erase
239 * on some intel parts, this unprotects the entire chip, but it
240 * wont hurt to call this additional times per sector...
241 */
242void flash_unprotect_sectors (FPWV * addr)
243{
244#define PD_FINTEL_WSMS_READY_MASK 0x0080
245
246 *addr = (FPW) 0x00500050; /* clear status register */
247
248 /* this sends the clear lock bit command */
249 *addr = (FPW) 0x00600060;
250 *addr = (FPW) 0x00D000D0;
251}
252
253
254/*-----------------------------------------------------------------------
255 */
256
257int flash_erase (flash_info_t * info, int s_first, int s_last)
258{
259 int flag, prot, sect;
260 ulong type, start, last;
261 int rcode = 0;
262
263 if ((s_first < 0) || (s_first > s_last)) {
264 if (info->flash_id == FLASH_UNKNOWN) {
265 printf ("- missing\n");
266 } else {
267 printf ("- no sectors to erase\n");
268 }
269 return 1;
270 }
271
272 type = (info->flash_id & FLASH_VENDMASK);
273 if ((type != FLASH_MAN_INTEL)) {
274 printf ("Can't erase unknown flash type %08lx - aborted\n",
275 info->flash_id);
276 return 1;
277 }
278
279 prot = 0;
280 for (sect = s_first; sect <= s_last; ++sect) {
281 if (info->protect[sect]) {
282 prot++;
283 }
284 }
285
286 if (prot) {
287 printf ("- Warning: %d protected sectors will not be erased!\n",
288 prot);
289 } else {
290 printf ("\n");
291 }
292
293
294 start = get_timer (0);
295 last = start;
296
297 /* Disable interrupts which might cause a timeout here */
298 flag = disable_interrupts ();
299
300 /* Start erase on unprotected sectors */
301 for (sect = s_first; sect <= s_last; sect++) {
302 if (info->protect[sect] == 0) { /* not protected */
303 FPWV *addr = (FPWV *) (info->start[sect]);
304 FPW status;
305
306 printf ("Erasing sector %2d ... ", sect);
307
308 flash_unprotect_sectors (addr);
309
310 /* arm simple, non interrupt dependent timer */
311 reset_timer_masked ();
312
313 *addr = (FPW) 0x00500050;/* clear status register */
314 *addr = (FPW) 0x00200020;/* erase setup */
315 *addr = (FPW) 0x00D000D0;/* erase confirm */
316
317 while (((status =
318 *addr) & (FPW) 0x00800080) !=
319 (FPW) 0x00800080) {
320 if (get_timer_masked () >
321 CFG_FLASH_ERASE_TOUT) {
322 printf ("Timeout\n");
323 /* suspend erase */
324 *addr = (FPW) 0x00B000B0;
325 /* reset to read mode */
326 *addr = (FPW) 0x00FF00FF;
327 rcode = 1;
328 break;
329 }
330 }
331
332 /* clear status register cmd. */
333 *addr = (FPW) 0x00500050;
334 *addr = (FPW) 0x00FF00FF;/* resest to read mode */
335 printf (" done\n");
336 }
337 }
338 return rcode;
339}
340
341/*-----------------------------------------------------------------------
342 * Copy memory to flash, returns:
343 * 0 - OK
344 * 1 - write timeout
345 * 2 - Flash not erased
346 * 4 - Flash not identified
347 */
348
349int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
350{
351 ulong cp, wp;
352 FPW data;
353 int count, i, l, rc, port_width;
354
355 if (info->flash_id == FLASH_UNKNOWN) {
356 return 4;
357 }
358/* get lower word aligned address */
359#ifdef FLASH_PORT_WIDTH16
360 wp = (addr & ~1);
361 port_width = 2;
362#else
363 wp = (addr & ~3);
364 port_width = 4;
365#endif
366
367 /*
368 * handle unaligned start bytes
369 */
370 if ((l = addr - wp) != 0) {
371 data = 0;
372 for (i = 0, cp = wp; i < l; ++i, ++cp) {
373 data = (data << 8) | (*(uchar *) cp);
374 }
375 for (; i < port_width && cnt > 0; ++i) {
376 data = (data << 8) | *src++;
377 --cnt;
378 ++cp;
379 }
380 for (; cnt == 0 && i < port_width; ++i, ++cp) {
381 data = (data << 8) | (*(uchar *) cp);
382 }
383
384 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
385 return (rc);
386 }
387 wp += port_width;
388 }
389
390 /*
391 * handle word aligned part
392 */
393 count = 0;
394 while (cnt >= port_width) {
395 data = 0;
396 for (i = 0; i < port_width; ++i) {
397 data = (data << 8) | *src++;
398 }
399 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
400 return (rc);
401 }
402 wp += port_width;
403 cnt -= port_width;
404 if (count++ > 0x800) {
405 spin_wheel ();
406 count = 0;
407 }
408 }
409
410 if (cnt == 0) {
411 return (0);
412 }
413
414 /*
415 * handle unaligned tail bytes
416 */
417 data = 0;
418 for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
419 data = (data << 8) | *src++;
420 --cnt;
421 }
422 for (; i < port_width; ++i, ++cp) {
423 data = (data << 8) | (*(uchar *) cp);
424 }
425
426 return (write_data (info, wp, SWAP (data)));
427}
428
429/*-----------------------------------------------------------------------
430 * Write a word or halfword to Flash, returns:
431 * 0 - OK
432 * 1 - write timeout
433 * 2 - Flash not erased
434 */
435static int write_data (flash_info_t * info, ulong dest, FPW data)
436{
437 FPWV *addr = (FPWV *) dest;
438 ulong status;
439 int flag;
440
441 /* Check if Flash is (sufficiently) erased */
442 if ((*addr & data) != data) {
443 printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
444 return (2);
445 }
446 flash_unprotect_sectors (addr);
447 /* Disable interrupts which might cause a timeout here */
448 flag = disable_interrupts ();
449 *addr = (FPW) 0x00400040; /* write setup */
450 *addr = data;
451
452 /* arm simple, non interrupt dependent timer */
453 reset_timer_masked ();
454
455 /* wait while polling the status register */
456 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
457 if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
458 *addr = (FPW) 0x00FF00FF; /* restore read mode */
459 return (1);
460 }
461 }
462 *addr = (FPW) 0x00FF00FF; /* restore read mode */
463 return (0);
464}
465
466void inline spin_wheel (void)
467{
468 static int p = 0;
469 static char w[] = "\\/-";
470
471 printf ("\010%c", w[p]);
472 (++p == 3) ? (p = 0) : 0;
473}