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Mike Frysinger1c587432009-03-27 19:27:58 -04001/*
2 * Driver for SST serial flashes
3 *
4 * (C) Copyright 2000-2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Copyright 2008, Network Appliance Inc.
7 * Jason McMullan <mcmullan@netapp.com>
8 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
9 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
10 * Copyright (c) 2008-2009 Analog Devices Inc.
11 *
12 * Licensed under the GPL-2 or later.
13 */
14
15#include <common.h>
16#include <malloc.h>
17#include <spi_flash.h>
18
19#include "spi_flash_internal.h"
20
21#define CMD_SST_WREN 0x06 /* Write Enable */
22#define CMD_SST_WRDI 0x04 /* Write Disable */
23#define CMD_SST_RDSR 0x05 /* Read Status Register */
24#define CMD_SST_WRSR 0x01 /* Write Status Register */
25#define CMD_SST_READ 0x03 /* Read Data Bytes */
26#define CMD_SST_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
27#define CMD_SST_BP 0x02 /* Byte Program */
28#define CMD_SST_AAI_WP 0xAD /* Auto Address Increment Word Program */
29#define CMD_SST_SE 0x20 /* Sector Erase */
30
31#define SST_SR_WIP (1 << 0) /* Write-in-Progress */
32#define SST_SR_WEL (1 << 1) /* Write enable */
33#define SST_SR_BP0 (1 << 2) /* Block Protection 0 */
34#define SST_SR_BP1 (1 << 3) /* Block Protection 1 */
35#define SST_SR_BP2 (1 << 4) /* Block Protection 2 */
36#define SST_SR_AAI (1 << 6) /* Addressing mode */
37#define SST_SR_BPL (1 << 7) /* BP bits lock */
38
39struct sst_spi_flash_params {
40 u8 idcode1;
41 u16 nr_sectors;
42 const char *name;
43};
44
45struct sst_spi_flash {
46 struct spi_flash flash;
47 const struct sst_spi_flash_params *params;
48};
49
50static inline struct sst_spi_flash *to_sst_spi_flash(struct spi_flash *flash)
51{
52 return container_of(flash, struct sst_spi_flash, flash);
53}
54
55#define SST_SECTOR_SIZE (4 * 1024)
56static const struct sst_spi_flash_params sst_spi_flash_table[] = {
57 {
Mike Frysingerdd541262009-06-19 03:27:28 -040058 .idcode1 = 0x8d,
59 .nr_sectors = 128,
60 .name = "SST25VF040B",
61 },{
62 .idcode1 = 0x8e,
63 .nr_sectors = 256,
64 .name = "SST25VF080B",
65 },{
66 .idcode1 = 0x41,
67 .nr_sectors = 512,
68 .name = "SST25VF016B",
69 },{
70 .idcode1 = 0x4a,
71 .nr_sectors = 1024,
72 .name = "SST25VF032B",
73 },{
James Kosin1c091f52011-04-13 15:12:18 -040074 .idcode1 = 0x4b,
75 .nr_sectors = 2048,
76 .name = "SST25VF064C",
77 },{
Mike Frysinger1c587432009-03-27 19:27:58 -040078 .idcode1 = 0x01,
Mike Frysinger7d907f02009-06-19 03:20:06 -040079 .nr_sectors = 16,
Mike Frysinger1c587432009-03-27 19:27:58 -040080 .name = "SST25WF512",
81 },{
82 .idcode1 = 0x02,
Mike Frysinger7d907f02009-06-19 03:20:06 -040083 .nr_sectors = 32,
Mike Frysinger1c587432009-03-27 19:27:58 -040084 .name = "SST25WF010",
85 },{
86 .idcode1 = 0x03,
Mike Frysinger7d907f02009-06-19 03:20:06 -040087 .nr_sectors = 64,
Mike Frysinger1c587432009-03-27 19:27:58 -040088 .name = "SST25WF020",
89 },{
90 .idcode1 = 0x04,
Mike Frysinger7d907f02009-06-19 03:20:06 -040091 .nr_sectors = 128,
Mike Frysinger1c587432009-03-27 19:27:58 -040092 .name = "SST25WF040",
93 },
94};
95
96static int
Mike Frysinger1c587432009-03-27 19:27:58 -040097sst_enable_writing(struct spi_flash *flash)
98{
Mike Frysinger2744a4e2011-04-23 23:05:55 +000099 int ret = spi_flash_cmd_write_enable(flash);
Mike Frysinger1c587432009-03-27 19:27:58 -0400100 if (ret)
101 debug("SF: Enabling Write failed\n");
102 return ret;
103}
104
105static int
106sst_disable_writing(struct spi_flash *flash)
107{
Mike Frysinger66ecb7c2011-04-25 06:59:53 +0000108 int ret = spi_flash_cmd_write_disable(flash);
Mike Frysinger1c587432009-03-27 19:27:58 -0400109 if (ret)
110 debug("SF: Disabling Write failed\n");
111 return ret;
112}
113
114static int
Mike Frysinger1c587432009-03-27 19:27:58 -0400115sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
116{
117 int ret;
118 u8 cmd[4] = {
119 CMD_SST_BP,
120 offset >> 16,
121 offset >> 8,
122 offset,
123 };
124
125 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
126 spi_w8r8(flash->spi, CMD_SST_RDSR), buf, cmd[0], offset);
127
128 ret = sst_enable_writing(flash);
129 if (ret)
130 return ret;
131
132 ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
133 if (ret)
134 return ret;
135
Mike Frysinger61630452011-01-10 02:20:12 -0500136 return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
Mike Frysinger1c587432009-03-27 19:27:58 -0400137}
138
139static int
140sst_write(struct spi_flash *flash, u32 offset, size_t len, const void *buf)
141{
142 size_t actual, cmd_len;
143 int ret;
144 u8 cmd[4];
145
146 ret = spi_claim_bus(flash->spi);
147 if (ret) {
148 debug("SF: Unable to claim SPI bus\n");
149 return ret;
150 }
151
152 /* If the data is not word aligned, write out leading single byte */
153 actual = offset % 2;
154 if (actual) {
155 ret = sst_byte_write(flash, offset, buf);
156 if (ret)
157 goto done;
158 }
159 offset += actual;
160
161 ret = sst_enable_writing(flash);
162 if (ret)
163 goto done;
164
165 cmd_len = 4;
166 cmd[0] = CMD_SST_AAI_WP;
167 cmd[1] = offset >> 16;
168 cmd[2] = offset >> 8;
169 cmd[3] = offset;
170
171 for (; actual < len - 1; actual += 2) {
172 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
173 spi_w8r8(flash->spi, CMD_SST_RDSR), buf + actual, cmd[0],
174 offset);
175
176 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
177 buf + actual, 2);
178 if (ret) {
179 debug("SF: sst word program failed\n");
180 break;
181 }
182
Mike Frysinger61630452011-01-10 02:20:12 -0500183 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
Mike Frysinger1c587432009-03-27 19:27:58 -0400184 if (ret)
185 break;
186
187 cmd_len = 1;
188 offset += 2;
189 }
190
191 if (!ret)
192 ret = sst_disable_writing(flash);
193
194 /* If there is a single trailing byte, write it out */
195 if (!ret && actual != len)
196 ret = sst_byte_write(flash, offset, buf + actual);
197
198 done:
199 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
200 ret ? "failure" : "success", len, offset - actual);
201
202 spi_release_bus(flash->spi);
203 return ret;
204}
205
Mike Frysingerf8f07572011-04-12 01:51:29 -0400206static int sst_erase(struct spi_flash *flash, u32 offset, size_t len)
Mike Frysinger1c587432009-03-27 19:27:58 -0400207{
Richard Retanubun4e6a5152011-02-16 16:37:22 -0500208 return spi_flash_cmd_erase(flash, CMD_SST_SE, offset, len);
Mike Frysinger1c587432009-03-27 19:27:58 -0400209}
210
211static int
212sst_unlock(struct spi_flash *flash)
213{
214 int ret;
215 u8 cmd, status;
216
217 ret = sst_enable_writing(flash);
218 if (ret)
219 return ret;
220
221 cmd = CMD_SST_WRSR;
222 status = 0;
223 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &status, 1);
224 if (ret)
225 debug("SF: Unable to set status byte\n");
226
227 debug("SF: sst: status = %x\n", spi_w8r8(flash->spi, CMD_SST_RDSR));
228
229 return ret;
230}
231
232struct spi_flash *
233spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode)
234{
235 const struct sst_spi_flash_params *params;
236 struct sst_spi_flash *stm;
237 size_t i;
238
239 for (i = 0; i < ARRAY_SIZE(sst_spi_flash_table); ++i) {
240 params = &sst_spi_flash_table[i];
241 if (params->idcode1 == idcode[2])
242 break;
243 }
244
245 if (i == ARRAY_SIZE(sst_spi_flash_table)) {
246 debug("SF: Unsupported SST ID %02x\n", idcode[1]);
247 return NULL;
248 }
249
250 stm = malloc(sizeof(*stm));
251 if (!stm) {
252 debug("SF: Failed to allocate memory\n");
253 return NULL;
254 }
255
256 stm->params = params;
257 stm->flash.spi = spi;
258 stm->flash.name = params->name;
259
260 stm->flash.write = sst_write;
261 stm->flash.erase = sst_erase;
Mike Frysingerc5910872011-04-12 01:34:55 -0400262 stm->flash.read = spi_flash_cmd_read_fast;
Richard Retanubun4e6a5152011-02-16 16:37:22 -0500263 stm->flash.sector_size = SST_SECTOR_SIZE;
264 stm->flash.size = stm->flash.sector_size * params->nr_sectors;
Mike Frysinger1c587432009-03-27 19:27:58 -0400265
266 /* Flash powers up read-only, so clear BP# bits */
267 sst_unlock(&stm->flash);
268
269 return &stm->flash;
270}