blob: 46699ff635cf97879f12c6ff88acaae6ac4f8c36 [file] [log] [blame]
Akshay Saraswat79043d82014-11-13 22:38:17 +05301/*
2 * Copyright (C) 2014 Samsung Electronics
3 *
4 * Configuration settings for the SAMSUNG/GOOGLE PEACH-PI board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_PEACH_PI_H
10#define __CONFIG_PEACH_PI_H
11
12#define CONFIG_ENV_IS_IN_SPI_FLASH
Akshay Saraswat79043d82014-11-13 22:38:17 +053013#define CONFIG_ENV_SPI_BASE 0x12D30000
14#define FLASH_SIZE (0x4 << 20)
15#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
Hyungwon Hwang43900da2014-12-12 14:45:44 +090016#define CONFIG_SPI_BOOTING
Akshay Saraswat79043d82014-11-13 22:38:17 +053017
Sjoerd Simonsd7e1f022015-03-12 22:33:29 +010018#define MEM_LAYOUT_ENV_SETTINGS \
19 "bootm_size=0x10000000\0" \
20 "kernel_addr_r=0x22000000\0" \
21 "fdt_addr_r=0x23000000\0" \
22 "ramdisk_addr_r=0x23300000\0" \
23 "scriptaddr=0x30000000\0" \
24 "pxefile_addr_r=0x31000000\0"
25
Akshay Saraswat79043d82014-11-13 22:38:17 +053026#include <configs/exynos5420-common.h>
27#include <configs/exynos5-dt-common.h>
28
29#define CONFIG_BOARD_COMMON
30
Hyungwon Hwang43900da2014-12-12 14:45:44 +090031#define CONFIG_SYS_SDRAM_BASE 0x20000000
32#define CONFIG_SYS_TEXT_BASE 0x23E00000
33#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
34
Akshay Saraswat79043d82014-11-13 22:38:17 +053035/* select serial console configuration */
36#define CONFIG_SERIAL3 /* use SERIAL 3 */
Hyungwon Hwang43900da2014-12-12 14:45:44 +090037#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
Akshay Saraswat79043d82014-11-13 22:38:17 +053038
39#define CONFIG_SYS_PROMPT "Peach-Pi # "
40#define CONFIG_IDENT_STRING " for Peach-Pi"
41
42#define CONFIG_VIDEO_PARADE
43
44/* Display */
45#define CONFIG_LCD
46#ifdef CONFIG_LCD
47#define CONFIG_EXYNOS_FB
48#define CONFIG_EXYNOS_DP
49#define LCD_BPP LCD_COLOR16
50#endif
51
52#define CONFIG_POWER_TPS65090_EC
Akshay Saraswat79043d82014-11-13 22:38:17 +053053
54#define CONFIG_USB_XHCI
55#define CONFIG_USB_XHCI_EXYNOS
56
Akshay Saraswat43581c82014-11-13 22:38:19 +053057/* DRAM Memory Banks */
58#define CONFIG_NR_DRAM_BANKS 7
59#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
60
Akshay Saraswat79043d82014-11-13 22:38:17 +053061#endif /* __CONFIG_PEACH_PI_H */